CN102880432B - Method and system for increasing writing speeds of flash memory chips by aid of limited lives of data and controller of system - Google Patents
Method and system for increasing writing speeds of flash memory chips by aid of limited lives of data and controller of system Download PDFInfo
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- CN102880432B CN102880432B CN 201210372573 CN201210372573A CN102880432B CN 102880432 B CN102880432 B CN 102880432B CN 201210372573 CN201210372573 CN 201210372573 CN 201210372573 A CN201210372573 A CN 201210372573A CN 102880432 B CN102880432 B CN 102880432B
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Abstract
The invention discloses a method for increasing writing speeds of flash memory chips by the aid of the limited lives of data. A flash memory comprises a plurality of flash memory chips, and each flash memory chip comprises a plurality of flash memory pages. The method includes steps of monitoring the size of available memory space of the flash memory in real time; writing received new valid data into the flash memory pages which are not adjacent to one another when the detected current available memory space of the flash memory is larger than a preset threshold value; and writing the received new valid data into the adjacent flash memory pages which store invalid data when the detected current available memory space of the flash memory is smaller than the preset threshold value. The invention further discloses a flash memory system and a controller thereof. The method, the flash memory system and the controller in an embodiment of the invention have the advantages that the data writing speeds can be increased by effectively using the characteristic that the lives of the data are greatly different from one another in practical application, and an implementation process is simple and feasible.
Description
Technical field
The present invention relates to communication technical field, relate in particular to a kind of method, flash-memory storage system and controller thereof that utilizes data finite lifetime to improve the flash chip writing speed.
Background technology
As the solid-state non-volatile data storing technology of unique main flow, flash memory has become a ring with the fastest developing speed in the global semiconductor industrial system.Within 2010, market intelligence shows, the market of flash memory products has been broken through 20,000,000,000 dollars.Solid-state data-storage system based on flash chip mainly comprises a solid-state memory system controller and an above flash chip.
The essential information storage unit of flash chip is floating gate transistor (Floating-Gate Transistor).The threshold voltage of floating gate transistor can enter floating boom by the electronics of injection some and change.Therefore, by the accurate control to number of electrons in floating boom, each storage unit, floating gate transistor, can store a plurality of bit informations.The process of accurately controlling number of electrons in floating boom is commonly called programming.Before each storage unit can be programmed, all electronics in its floating boom must be removed, thereby it is minimum to make its threshold voltage be set to, and this process is called as wipes.In the process to information memory cell programming, industry is used a kind of method accurate control to number of electrons in floating boom with realization of gradual " programming-verification-programme again ".Increasing electron trap (traps) is introduced in " program/erase " the operation meeting (program/erase) repeated gradually in floating gate transistor, to cause the noise tolerance limit of more and more lower floating gate transistor, thereby make flash chip only have certain " program/erase " number of times limit.
The flash memory chip data read-write operation is usingd the page (page) as base unit, and the user data comprised in each page is generally 4096 bytes (byte), 8192 bytes or 16384 bytes.The memory page of some (as 256,512) forms a storage block, and flash chip consists of the storage block of a large amount of equal sizes and necessary peripheral auxiliary circuits.Data erase operation must be take storage block as unit.
When all information memory cells are programmed in to a page, can bring interference to its tight adjacent page institute canned data, bring the decline of the data storage stability of adjacent page.This is mainly because the stray capacitance between the neighbor information storage unit is caused, crosstalk (cell-to-cell interference).Along with improving constantly of flash memory system fabrication technique, can be more and more nearer between the neighbor information storage unit, directly cause the stray capacitance between the neighbor information storage unit and the neighbor information storage unit that causes between crosstalk can be increasing.In order to overcome crosstalking on the impact of data storage stability between information memory cell as far as possible, flash chip must be used enough little programming step-length to improve the noise margin of information memory cell in the process of gradual " programming-verification-programme again ", and then improves the tolerance to crosstalking between the neighbor information storage unit.But the speed of flash memory chip data programming directly is proportional to the size of programming step-length.So, when reducing the programming step-length when improving the noise margin of information memory cell, the speed of flash memory chip data programming also together with the time descend.
Visible, in existing the realization, in order to realize the enough tolerances to crosstalking between the neighbor information storage unit, the writing speed of flash chip is very restricted, and flash memory chip data writing speed on the low side is the travelling speed of the whole solid-state data-storage system of impact directly.Crosstalking between the neighbor information storage unit of minimizing flash chip has certain meaning to improving the flash memory chip data writing speed, especially in the current speed that how to promote the flash memory data writing, be the target that those skilled in the art endeavour, can effectively improve the flash memory chip data writing speed, thereby it is significant to improve the travelling speed of whole storage system.
In the prior art, by crosstalking between the neighbor information storage unit that the discontinuous mode that writes the page of user data is reduced to flash chip, for example, the China that application number is 20091014313.6 applies for a patent the programmed method that discloses a kind of flash memory device, wherein by the recto of the storage unit to comprising verso and recto, programme in advance threshold voltage is improved to certain level, and carry out subsequently verso programming operation and recto programming operation, make the skimble-scamble threshold voltage that can prevent because disturbing effect between unit causes distribute.Although the disclosed method skimble-scamble threshold voltage that disturbing effect causes between to a certain degree can preventing due to unit distributes, but only by distinguishing the odevity page, carry out data writing, easily cause the waste of storage space, and judgement and checking that the method relates to voltage all are difficult to control and operation.
In addition, application number is US2007,0849, a kind of method that reduces the impact of interference during programming is disclosed in the instructions of 992 U. S. application patent, the disturbing effect that it reduces from neighbours' upper act comprises: in the very first time, the first group of non-volatile memory device is programmed; In the second time that is different from the very first time, the second group of non-non-volatile memory device is programmed; And verify together the first group of described non-volatile memory device and the second group of described non-non-volatile memory device.The method can effectively reduce the impact of interference between neighbor memory cell during programming, but the method implementation procedure more complicated, change the program/erase procedure of existing flash-memory storage system and realizes, is unfavorable for universal the use.
Summary of the invention
Embodiments of the invention provide a kind of method, flash-memory storage system and controller thereof that utilizes data finite lifetime to improve the flash chip writing speed, can effectively utilize data lifetime in practical application and have the characteristic of larger difference and improve writing speed, and simple, the easy row of implementation procedure.
For achieving the above object, embodiments of the invention adopt following technical scheme:
A kind of data finite lifetime of utilizing utilizes data finite lifetime to improve the method for flash chip writing speed, and wherein flash memory comprises a plurality of flash chips, and each flash chip comprises a plurality of flash memory pages, and the method comprising the steps of:
The size of the free memory of Real-Time Monitoring flash memory;
When the free memory that monitors current flash memory is greater than default threshold value, the new valid data that receive are write in mutual non-conterminous flash memory pages;
When the free memory that monitors current flash memory is less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data.
A kind of controller comprises:
Microprocessing unit;
Flash interface, be coupled to described microprocessing unit and flash memory, and wherein flash memory comprises a plurality of flash chips, and each flash chip comprises a plurality of flash memory pages;
The flash memory management module, be coupled to described microprocessing unit by microprocessing unit, described flash memory is carried out to the flash memory management program, comprising:
The free memory monitoring means, the size for the free memory of Real-Time Monitoring flash memory, when the free memory that monitors current flash memory is greater than default threshold value, write the new valid data that receive in mutual non-conterminous flash memory pages;
Stale data invalid address record cell, physical address for detection of the expired invalid flash memory pages of the data that have with record, and, when the free memory that monitors current flash memory when the free memory monitoring means is less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data.A kind of flash-memory storage system comprises:
Flash memory, comprise a plurality of flash chips, and each flash chip comprises a plurality of flash memory pages;
Controller, be coupled to the size of described flash chip with the free memory of Real-Time Monitoring flash memory, when the free memory that monitors current flash memory is greater than default threshold value, the new valid data that receive write in mutual non-conterminous flash memory pages; When the free memory that monitors current flash memory is less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data.
A kind of method of utilizing data finite lifetime to improve the flash chip writing speed that the embodiment of the present invention provides, flash-memory storage system and controller thereof are by size and the detection of the free memory of monitoring flash memory, the physical address of the expired invalid flash memory pages of the data that have of record, when the free memory that monitors current flash memory is greater than default threshold value, the new valid data that receive are write in mutual non-conterminous flash memory pages with the crosstalk phenomenon in the decrease programming process, so just can corresponding increasing data write fashionable programming step-length directly to improve writing speed, when the free memory that monitors current flash memory is less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data, operate and need not take high speed write into account crosstalking of bringing, because the data in the page affected by crosstalking are payable to order.Therefore, can effectively utilize user data lifetime in practical application and exist the characteristic of larger difference to improve data write operation speed, and the realization of the embodiment of the present invention and the direct compatibility of existing solid-state memory system design, implementation procedure is simple.
The accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, below will the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the composition frame chart of a kind of flash-memory storage system in the embodiment of the present invention 1;
Fig. 2 is the composition frame chart of flash chip in the embodiment of the present invention 1;
Fig. 3 a ~ 3b utilizes the flash-memory storage system in the embodiment of the present invention 1 to carry out the schematic diagram that data write flash memory pages;
Fig. 4 is the composition frame chart of a kind of controller in the embodiment of the present invention 2;
Fig. 5 is the composition frame chart of a kind of controller in the embodiment of the present invention 3;
Fig. 6 is a kind of method flow diagram that utilizes data finite lifetime to improve the flash chip writing speed in the embodiment of the present invention 4;
Fig. 7 is a kind of method flow diagram that utilizes data finite lifetime to improve the flash chip writing speed in the embodiment of the present invention 5.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making under the creative work prerequisite the every other embodiment obtained, belong to the scope of protection of the invention.
embodiment 1
The embodiment of the present invention provides a kind of flash-memory storage system, as shown in Figure 1, flash-memory storage system 100 comprises controller 110 and flash memory 120, usually flash-memory storage system 100 can be used together with main frame 140, and connect by communication interface 130, so that main frame 140 can write to data storage system 100 or reading out data from storage system 100.In the present embodiment, main frame 140 can be any system that computing machine, digital camera, video camera, communicator, audio player or video player etc. can be stored data.Communication interface 130 can be USB interface, PCI Express interface, SATA interface, MS interface, MMC interface, SD interface, CF interface, ide interface or other applicable data transmission interfaces.In the present embodiment, described flash-memory storage system 100 is solid state hard disc (Solid State Drive, SDD), but intelligible, this flash-memory storage system 100 can be also Portable disk or storage card in other embodiments.
Flash interface 110b is electrically connected to microprocessing unit 110a and in order to access flash memory 120, and namely, the data that main frame 140 wants to write to flash memory 120 can be converted to 120 receptible forms of flash memory via flash interface 110b.Particularly, in this enforcement, flash memory management module 110c is to the acquisition of information of flash memory 120 and to send control command etc. be also to need by flash interface 110b.
Flash memory management module 110c is electrically connected to microprocessing unit 110a by microprocessing unit 110a, described flash memory 120 is carried out to the flash memory management program.Flash memory management module 110c is for managing flash memory 120, such as carrying out average abrasion (wear 1eve1i ng) method, bad block management, safeguarding mapping table (mapping table) etc.Particularly, in embodiments of the present invention, flash memory management module 110c is also for detection of the service condition of flash memory 120, to set current writing speed.Implementation is as follows: the size of the free memory of Real-Time Monitoring flash memory 120; When the free memory that monitors current flash memory 120 is greater than default threshold value, the new valid data that receive are write in mutual non-conterminous flash memory pages; When the free memory that monitors current flash memory 120 is less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data; And detect in real time the poorest possible noise tolerance limit of the current flash memory pages that will write, and set according to the poorest described possible noise tolerance limit the writing speed that current maximum allows.
Below, in conjunction with Fig. 3 a ~ 3b, further set forth the operational process of the flash-memory storage system 100 of the embodiment of the present invention.As shown in Figure 3 a, in the specific implementation, utilize the size that controller 110 Real-Time Monitoring flash memories 120 are available storage space with the available storage block number of knowing current flash memory 120, if current free memory is greater than a certain predetermined threshold value, just can only use not tight adjacent flash memory pages mutually to store new valid data.In the present embodiment, hundred deals of the total volume that this threshold value is whole storage system (as threshold value can be made as total volume 30% or 20%), concrete value depends on actual service condition.In addition, if when current free memory is greater than this predetermined threshold value, the new valid data that receive are write in mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages.For example, when user data is write to the flash memory pages of a certain storage block 124, if all flash memory pages are numbered to 0,1,2,3 ... be the flash memory pages of adjacent numbering nearest in chip, therebetween crosstalk also maximum.User data is being write fashionable, is being started most only data to be write and are numbered 0,2,4 ... the page in, understand like this crosstalk phenomenon in the decrease programming process.So, just can be corresponding increasing programming step-length, to improve writing speed.
When using above-mentioned writing mode, can improve writing speed, but many flash memory pages (as the page 1,3,5 ...) be not used to store the valid user data when starting most.In whole flash-memory storage system 100 operational processs, along with the number of times write is more and more, available storage space is by fewer and feweri; Simultaneously, along with the continuous change and renew of user data, the data that write at first flash memory pages can become expired invalid data gradually.For the flash memory pages of storing data payable to order, we just new validated user data high-speed can be write with its tight adjacent flash memory pages in, operate and need not take high speed write into account crosstalking of bringing, because the data in the flash memory pages affected by crosstalking are payable to order.Therefore, when the free memory that monitors current flash memory is less than default threshold value, when the data that the adjacent flash memory pages of a certain flash memory pages has if find are all invalid, the new valid data that receive are write in described flash memory pages.For example, user data is write fashionable, start most only data to be write and are numbered 0,2,4 ... the page in, along with the operation of system, after data in flash memory pages 2 and flash memory pages 4 being detected become expired invalid data, new valid data can be write in the flash memory pages 3 between flash memory pages 2 and flash memory pages 4.Although when the valid data by new write flash memory pages 3, can cause crosstalking of the data interior to flash memory pages 2 and flash memory pages 4, make flash memory pages 2 and the data storage stability in flash memory pages 4 descend, but, because flash memory pages 2 and the data in flash memory pages 4 have become expired invalid data, crosstalking at this moment can't bring any problem to the system operation.In the present embodiment, the data that can detect in several ways in the judgement flash memory pages are payable to order, for example, when real system moves, when if the user writes a certain logical address by new data, if in flash memory in the stored physical address with respect to this logical address original data can be set to expired invalid.In addition, added special command a: TRIM in some new operating system, it is invalid that the user can utilize this order directly to notify flash-memory storage system that some data is set to.
In above-mentioned operational process, when a certain flash memory pages data writing, before this storage block is by bulk erase, this flash memory pages can not be written into new data again.And, also comprise the poorest possible noise tolerance limit of the current flash memory pages that will write of real-time detection before writing arbitrary flash memory pages, and set according to the poorest described possible noise tolerance limit the writing speed (programming step-length) that current maximum allows.Thereby can guarantee that large step-length programming is with high speed write access customer data, and don't can cause crosstalking between the flash memory pages storing information.
In addition, though be not illustrated in the present embodiment, controller 110 can also comprise that general flash controller is normal
The functional module of seeing, such as power management module etc.
In the embodiment of the present invention, flash memory management module 110c is set in the controller 110 of flash-memory storage system 100, and this flash memory management module 110c has set up size and the detection of the free memory of Real-Time Monitoring flash memory, the physical address of the expired invalid flash memory pages of the data that have of record, and according to testing result, the new valid data that receive are write in mutual non-conterminous flash memory pages, maybe the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data, with the crosstalk phenomenon in the decrease programming process, operate and need not take high speed write into account crosstalking of bringing, and then the current writing speed of assurance flash chip.Therefore, can effectively utilize user data lifetime in practical application and exist the characteristic of larger difference to improve data write operation speed, and the realization of the embodiment of the present invention and the direct compatibility of existing solid-state memory system design, implementation procedure is simple.
embodiment 2
The embodiment of the present invention provides a kind of controller, be applicable to have on the flash-memory storage system of flash memory, wherein, this flash memory comprises a plurality of flash chips, and each flash chip is divided into a plurality of entity stores pieces, and each block storage is divided into several flash memory pages, in the present embodiment, each flash chip is usingd flash memory pages as minimum storage unit, that is to say the minimum unit that flash memory pages is data writing or reading out data.Please refer to the associated description of Fig. 2 and above-described embodiment 1 about the concrete structure of flash chip.As shown in Figure 4, the controller 300 of the embodiment of the present invention comprises microprocessing unit 310, flash interface 320 and flash memory management module 330.
Microprocessing unit 310 is controlled flash interface 320 and flash memory management module 330 for coordinating, and carries out the runnings such as writing, read and erase to flash memory.
Flash interface 320 is electrically connected to microprocessing unit 310 and, in order to the access flash memory, namely, the user data that the controller wish will write to flash memory can be converted to 120 receptible forms of flash memory via flash interface 320.Particularly, in this enforcement, the acquisition of information of 330 pairs of flash memories of flash memory management module and transmission control command etc. is also to need to send by flash interface 320.
Flash memory management module 330 is electrically connected to microprocessing unit 310 by 310 pairs of described flash memories of microprocessing unit, to carry out the flash memory management program.Flash memory management module 330 is for managing flash memory, and particularly, in embodiments of the present invention, flash memory management module 330 is for detection of the service condition of the flash memory pages of flash memory, to guarantee current writing speed.Specifically comprise free memory monitoring means 332 and stale data invalid address record cell 334:
Free memory monitoring means 332, the size for the free memory of Real-Time Monitoring flash memory, when the free memory that monitors current flash memory is greater than default threshold value, write the new valid data that receive in mutual non-conterminous flash memory pages;
Stale data invalid address record cell 334, physical address for detection of the expired invalid flash memory pages of the data that have with record, and, when the free memory that monitors current flash memory when the free memory monitoring means is less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data.
In the specific implementation, while utilizing free memory monitoring means 332, the monitoring flash memory is with the size of the available storage space of available storage block number of knowing current flash memory, if current free memory is greater than a certain predetermined threshold value, the new valid data that receive are write in mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages.For example, when user data is write to the flash memory pages of a certain storage block, if all flash memory pages are numbered to 0,1,2,3 ... be the flash memory pages of adjacent numbering nearest in chip, therebetween crosstalk also maximum.User data is being write fashionable, started most only data to be write and are numbered 0,2,4 ... the page in, in this process, crosstalking that the page that other is had to valid data due to write operation brings is very little, and write operation can be used larger programming step-length to improve writing speed.
In whole flash-memory storage system operational process, along with the number of times write is more and more, available storage space is by fewer and feweri; Simultaneously, along with the continuous change and renew of user data, the data that write at first flash memory pages can become expired invalid data gradually.For the flash memory pages of storing data payable to order, we just new validated user data high-speed can be write with its tight adjacent flash memory pages in, operate and need not take high speed write into account crosstalking of bringing, because the data in the flash memory pages affected by crosstalking are payable to order.Therefore, after the system operational process in, when the free memory that monitors current flash memory when free memory monitoring means 332 is less than default threshold value, once stale data invalid address record cell 334 finds that the data in some page are payable to order, just new valid data can be write with it tightly in adjacent memory page.Especially, if stale data invalid address record cell 334 records data that the adjacent flash memory pages of a certain flash memory pages has when all invalid, the new valid data that receive are write in described flash memory pages.For example, after the data in flash memory pages 2 and flash memory pages 4 being detected become expired invalid data, new valid data can be write in the flash memory pages 3 between flash memory pages 2 and flash memory pages 4.Although when the valid data by new write flash memory pages 3, can cause crosstalking of the data interior to flash memory pages 2 and flash memory pages 4, make flash memory pages 2 and the data storage stability in flash memory pages 4 descend, but, because flash memory pages 2 and the data in flash memory pages 4 have become expired invalid data, crosstalking at this moment can't bring any problem to the system operation.
embodiment 3
The embodiment of the present invention provides another kind of controller, be applicable to have on the flash-memory storage system of flash memory, wherein, this flash memory comprises a plurality of flash chips, and each flash chip is divided into a plurality of entity stores pieces, and each block storage is divided into several flash memory pages, in the present embodiment, each flash chip is usingd flash memory pages as minimum storage unit, that is to say the minimum unit that flash memory pages is data writing or reading out data.Please refer to the associated description of Fig. 2 and above-described embodiment 1 about the concrete structure of flash chip.As shown in Figure 5, the controller 400 of the embodiment of the present invention comprises microprocessing unit 410, flash interface 420 and flash memory management module 430
Flash interface 420 is electrically connected to microprocessing unit 410 and, in order to the access flash memory, namely, the user data that the controller wish will write to flash memory can be converted to the receptible form of flash memory via flash interface 420.Particularly, in this enforcement, the acquisition of information of 430 pairs of flash memories of flash memory management module and transmission control command etc. is also to need to send by flash interface 420.
Flash memory management module 430 is electrically connected to microprocessing unit 410 by 410 pairs of described flash memories of microprocessing unit, to carry out the flash memory management program.Flash memory management module 430 is for managing flash memory, and particularly, in embodiments of the present invention, flash memory management module 430 is for detection of the service condition of the flash memory pages of flash memory, to guarantee current writing speed.Specifically comprise free memory monitoring means 432 and stale data invalid address record cell 434, noise tolerance limit detecting unit 436 and writing speed setup unit 438:
Free memory monitoring means 432, the size for the free memory of Real-Time Monitoring flash memory, when the free memory that monitors current flash memory is greater than default threshold value, write the new valid data that receive in mutual non-conterminous flash memory pages;
Stale data invalid address record cell 434, physical address for detection of the expired invalid flash memory pages of the data that have with record, and, when the free memory that monitors current flash memory when the free memory monitoring means is less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data;
Noise tolerance limit detecting unit 436, for detection of the poorest possible noise tolerance limit of the current flash memory pages that will write; Concrete, before the storage unit of program/erase flash chip by error bit number contained in the data that detect the current storage unit be read out to estimate the noise tolerance limit of described storage unit;
Writing speed setup unit 438, the writing speed allowed for the maximum of setting current flash memory pages according to the poorest described possible noise tolerance limit.
In the specific implementation, while utilizing free memory monitoring means 432, the monitoring flash memory is with the size of the available storage space of available storage block number of knowing current flash memory, if current free memory is greater than a certain predetermined threshold value, the new valid data that receive are write in mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages.For example, when user data is write to the flash memory pages of a certain storage block, if all flash memory pages are numbered to 0,1,2,3 ... be the flash memory pages of adjacent numbering nearest in chip, therebetween crosstalk also maximum.User data is being write fashionable, started most only data to be write and are numbered 0,2,4 ... the page in, in this process, crosstalking that the page that other is had to valid data due to write operation brings is very little, and write operation can be used larger programming step-length to improve writing speed.
In whole flash-memory storage system operational process, along with the number of times write is more and more, available storage space is by fewer and feweri; Simultaneously, along with the continuous change and renew of user data, the data that write at first flash memory pages can become expired invalid data gradually.For the flash memory pages of storing data payable to order, we just new validated user data high-speed can be write with its tight adjacent flash memory pages in, operate and need not take high speed write into account crosstalking of bringing, because the data in the flash memory pages affected by crosstalking are payable to order.Therefore, after the system operational process in, when the free memory that monitors current flash memory when free memory monitoring means 432 is less than default threshold value, once stale data invalid address record cell 434 finds that the data in some page are payable to order, just new valid data can be write with it tightly in adjacent memory page.Low especially, if stale data invalid address record cell 434 records data that the adjacent flash memory pages of a certain flash memory pages has when all invalid, the new valid data that receive are write in described flash memory pages.For example, after the data in flash memory pages 2 and flash memory pages 4 being detected become expired invalid data, new valid data can be write in the flash memory pages 3 between flash memory pages 2 and flash memory pages 4.Although when the valid data by new write flash memory pages 3, can cause crosstalking of the data interior to flash memory pages 2 and flash memory pages 4, make flash memory pages 2 and the data storage stability in flash memory pages 4 descend, but, because flash memory pages 2 and the data in flash memory pages 4 have become expired invalid data, crosstalking at this moment can't bring any problem to the system operation.
And, before writing arbitrary flash memory pages, also utilize noise tolerance limit detecting unit 436 to detect in real time the poorest possible noise tolerance limit of the current flash memory pages that will write, then utilize writing speed setup unit 438 to set according to the poorest described possible noise tolerance limit the writing speed (programming step-length) that current maximum allows.Thereby can guarantee that large step-length programming is with high speed write access customer data, and don't can cause crosstalking between the flash memory pages storing information.
embodiment 4
The embodiment of the present invention provides a kind of method of utilizing data finite lifetime to improve the flash chip writing speed, be applicable in the control of controller to flash memory of flash-memory storage system, wherein, this flash memory comprises a plurality of flash chips, and each flash chip is divided into a plurality of entity stores pieces, and each block storage is divided into several flash memory pages, in the present embodiment, each flash chip is usingd flash memory pages as minimum storage unit, that is to say the minimum unit that flash memory pages is data writing or reading out data.Please refer to the associated description of Fig. 2 and above-described embodiment 1 about the concrete structure of flash chip.As shown in Figure 6, the method comprises:
Step S101: the size of the free memory of Real-Time Monitoring flash memory;
Concrete, in the present embodiment, can monitor the size of free memory of flash memory to know that the available storage block number in current storage system is available storage space by multiple existing mode.
Step S102: when the free memory that monitors current flash memory is greater than default threshold value, the new valid data that receive are write in mutual non-conterminous flash memory pages;
Concrete, if, when monitoring current free memory and being greater than a certain predetermined threshold value, the new valid data that receive can be write in mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages.For example, when user data is write to the flash memory pages of a certain storage block, if all flash memory pages are numbered to 0,1,2,3 ... be the flash memory pages of adjacent numbering nearest in chip, therebetween crosstalk also maximum.User data is being write fashionable, started most only data to be write and are numbered 0,2,4 ... the page in, in this process, crosstalking that the page that other is had to valid data due to write operation brings is very little, and write operation can be used larger programming step-length to improve writing speed.
Step S103: when the free memory that monitors current flash memory is less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data.
Concrete, along with the number of times write is more and more, available storage space is by fewer and feweri; Simultaneously, along with the continuous change and renew of user data, the data that write at first flash memory pages can become expired invalid data gradually.For the flash memory pages of storing data payable to order, we just new validated user data high-speed can be write with its tight adjacent flash memory pages in, operate and need not take high speed write into account crosstalking of bringing, because the data in the flash memory pages affected by crosstalking are payable to order.Therefore, after the system operational process in, when the free memory that monitors current flash memory is less than default threshold value, once find that the data in some page are payable to order, just new valid data can be write with it tightly in adjacent memory page.When the data that the adjacent flash memory pages of a certain flash memory pages has if find especially are all invalid, the new valid data that receive are write in described flash memory pages.For example, after the data in flash memory pages 2 and flash memory pages 4 being detected become expired invalid data, new valid data can be write in the flash memory pages 3 between flash memory pages 2 and flash memory pages 4.Although when the valid data by new write flash memory pages 3, can cause crosstalking of the data interior to flash memory pages 2 and flash memory pages 4, make flash memory pages 2 and the data storage stability in flash memory pages 4 descend, but, because flash memory pages 2 and the data in flash memory pages 4 have become expired invalid data, crosstalking at this moment can't bring any problem to the system operation.
Fig. 6 is that the data finite lifetime of utilizing exemplified according to the invention process improves the process flow diagram of the method for flash chip writing speed, and wherein these steps are that the mechanical order that the microprocessor of the controller of flash-memory storage system is carried out the flash memory management module completes.It must be appreciated, the proposed by the invention method step that utilizes data finite lifetime to improve the flash chip writing speed is not limited to the execution sequence shown in Fig. 6, and those skilled in the art can change arbitrarily the method step that utilizes data finite lifetime to improve the flash chip writing speed according to spirit of the present invention.
embodiment 5
The embodiment of the present invention provides another kind to utilize data finite lifetime to improve the method for flash chip writing speed, is applicable in the control of controller to flash memory of flash-memory storage system,
Wherein, this flash memory comprises a plurality of flash chips, each flash chip is divided into a plurality of entity stores pieces, each block storage is divided into several flash memory pages, in the present embodiment, each flash chip is usingd flash memory pages as minimum storage unit, that is to say the minimum unit that flash memory pages is data writing or reading out data.Please refer to the associated description of Fig. 2 and above-described embodiment 1 about the concrete structure of flash chip.As shown in Figure 7, the method comprises:
Step S201: the size of the free memory of Real-Time Monitoring flash memory;
Concrete, in the present embodiment, can monitor the size of free memory of flash memory to know that the available storage block number in current storage system is available storage space by multiple existing mode.
Step S202: when the free memory that monitors current flash memory is greater than default threshold value, the new valid data that receive are write in mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages; And detect the poorest possible noise tolerance limit of described flash memory pages before writing flash memory pages, and set according to the poorest described possible noise tolerance limit the writing speed that current maximum allows;
Concrete, if, when monitoring current free memory and being greater than a certain predetermined threshold value, the new valid data that receive can be write in mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages.For example, when user data is write to the flash memory pages of a certain storage block, if all flash memory pages are numbered to 0,1,2,3 ... be the flash memory pages of adjacent numbering nearest in chip, therebetween crosstalk also maximum.User data is being write fashionable, started most only data to be write and are numbered 0,2,4 ... the page in, in this process, crosstalking that the page that other is had to valid data due to write operation brings is very little, and write operation can be used larger programming step-length to improve writing speed.And detect in real time the poorest possible noise tolerance limit of the current flash memory pages that will write before writing flash memory pages, then according to the poorest described possible noise tolerance limit, set the writing speed (programming step-length) that current maximum allows.Thereby can guarantee that large step-length programming is with high speed write access customer data, and don't can cause crosstalking between the flash memory pages storing information.
Step S203: when the free memory that monitors current flash memory is less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data.
Concrete, along with the number of times write is more and more, available storage space is by fewer and feweri; Simultaneously, along with the continuous change and renew of user data, the data that write at first flash memory pages can become expired invalid data gradually.For the flash memory pages of storing data payable to order, we just new validated user data high-speed can be write with its tight adjacent flash memory pages in, operate and need not take high speed write into account crosstalking of bringing, because the data in the flash memory pages affected by crosstalking are payable to order.Therefore, after the system operational process in, when the free memory that monitors current flash memory is less than default threshold value, once find that the data in some page are payable to order, just new valid data can be write with it tightly in adjacent memory page.When the data that the adjacent flash memory pages of a certain flash memory pages has if find especially are all invalid, the new valid data that receive are write in described flash memory pages.For example, after the data in flash memory pages 2 and flash memory pages 4 being detected become expired invalid data, new valid data can be write in the flash memory pages 3 between flash memory pages 2 and flash memory pages 4.Although when the valid data by new write flash memory pages 3, can cause crosstalking of the data interior to flash memory pages 2 and flash memory pages 4, make flash memory pages 2 and the data storage stability in flash memory pages 4 descend, but, because flash memory pages 2 and the data in flash memory pages 4 have become expired invalid data, crosstalking at this moment can't bring any problem to the system operation.
Fig. 7 is that the data finite lifetime of utilizing exemplified according to the invention process improves the process flow diagram of the method for flash chip writing speed, and wherein these steps are that the mechanical order that the microprocessor of the controller of flash-memory storage system is carried out the flash memory management module completes.It must be appreciated, the proposed by the invention method step that utilizes data finite lifetime to improve the flash chip writing speed is not limited to the execution sequence shown in Fig. 6, and those skilled in the art can change arbitrarily the method step that utilizes data finite lifetime to improve the flash chip writing speed according to spirit of the present invention.
One of ordinary skill in the art will appreciate that all or part of flow process realized in above-described embodiment method, that the mode that can add necessary common hardware by software realizes, can certainly complete by hardware, but in a lot of situation, the former is better embodiment.Understanding based on such, the part that technical scheme of the present invention contributes to prior art in essence in other words can embody with the form of software product, this computer software product is stored in the storage medium can read, floppy disk, hard disk or CD etc. as computing machine, comprise that some instructions are with so that a computer equipment (can make personal computer, server, or the network equipment etc.) carry out the described method of elder brother embodiment of the present invention.
The above is the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvements and modifications, these improvements and modifications also are considered as protection scope of the present invention.
Claims (5)
1. a method of utilizing data finite lifetime to improve the flash chip writing speed, wherein flash memory comprises a plurality of flash chips, and each flash chip comprises a plurality of flash memory pages, it is characterized in that, and the method comprising the steps of:
The size of the free memory of Real-Time Monitoring flash memory, detect the poorest possible noise tolerance limit of described flash memory pages and set according to the poorest described possible noise tolerance limit the writing speed that current maximum allows;
When the free memory that monitors current flash memory is greater than default threshold value, the new valid data that receive are write in mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages;
When the free memory that monitors current flash memory is less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data.
2. the method for utilizing data finite lifetime to improve the flash chip writing speed as claimed in claim 1, it is characterized in that, when the free memory that monitors current flash memory is less than default threshold value, when the data that the adjacent flash memory pages of a certain flash memory pages has if find are all invalid, the new valid data that receive are write in described flash memory pages.
3. a controller, is characterized in that, comprising:
Microprocessing unit;
Flash interface, be coupled to described microprocessing unit and flash memory, and wherein flash memory comprises a plurality of flash chips, and each flash chip comprises a plurality of flash memory pages;
The flash memory management module, be coupled to described microprocessing unit by microprocessing unit, described flash memory is carried out to the flash memory management program, comprising:
The free memory monitoring means, the size that is used for the free memory of Real-Time Monitoring flash memory, when the free memory that monitors current flash memory is greater than default threshold value, the new valid data that receive are write in mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages;
Stale data invalid address record cell, physical address for detection of the expired invalid flash memory pages of the data that have with record, and, when the free memory that monitors current flash memory when the free memory monitoring means is less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data;
Noise tolerance limit detecting unit, for detection of the poorest possible noise tolerance limit of the current flash memory pages that will write;
The writing speed setup unit, the writing speed allowed for set current maximum according to the poorest described possible noise tolerance limit.
4. controller as claimed in claim 3, it is characterized in that, when the free memory that monitors current flash memory when the free memory monitoring means is less than default threshold value, if, when the data that the adjacent flash memory pages of a certain flash memory pages of stale data invalid address recording unit records has are all invalid, the new valid data that receive are write in described flash memory pages.
5. a flash-memory storage system, is characterized in that, comprising:
Flash memory, comprise a plurality of flash chips, and each flash chip comprises a plurality of flash memory pages;
Controller, be coupled to the size of described flash chip with the free memory of Real-Time Monitoring flash memory, detects the poorest possible noise tolerance limit of described flash memory pages and set according to the poorest described possible noise tolerance limit the writing speed that current maximum allows; When the free memory that monitors current flash memory is greater than default threshold value, the new valid data that receive are write in mutual non-conterminous flash memory pages, and between the flash memory pages of data writing across a flash memory pages; When the free memory that monitors current flash memory is less than default threshold value, the new valid data that receive are write in the adjacent flash memory pages of the flash memory pages that has invalid data.
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| CN104252883B (en) * | 2013-06-26 | 2017-06-13 | 深圳市江波龙电子有限公司 | Flash memory management method and system |
| CN107015918B (en) * | 2017-03-31 | 2019-11-05 | 建荣半导体（深圳）有限公司 | A kind of flash management system, method and flash chip |
| CN110007856B (en) * | 2019-03-05 | 2020-08-04 | 四川九洲电器集团有限责任公司 | Data storage method and device and flash memory chip |
| CN113521745B (en) * | 2021-06-17 | 2024-01-09 | 广州三七极耀网络科技有限公司 | Data storage method, device and equipment of AI model training architecture of FPS game |
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