CN102880012A - Exposure method capable of improving process registration accuracy - Google Patents

Exposure method capable of improving process registration accuracy Download PDF

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Publication number
CN102880012A
CN102880012A CN2012103436598A CN201210343659A CN102880012A CN 102880012 A CN102880012 A CN 102880012A CN 2012103436598 A CN2012103436598 A CN 2012103436598A CN 201210343659 A CN201210343659 A CN 201210343659A CN 102880012 A CN102880012 A CN 102880012A
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China
Prior art keywords
exposure
mask plate
silicon chip
exposure method
alignment precision
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CN2012103436598A
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Chinese (zh)
Inventor
朱骏
张旭昇
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Shanghai Huali Microelectronics Corp
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Shanghai Huali Microelectronics Corp
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Priority to CN2012103436598A priority Critical patent/CN102880012A/en
Publication of CN102880012A publication Critical patent/CN102880012A/en
Pending legal-status Critical Current

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Abstract

The invention discloses an exposure method capable of improving process registration accuracy. The exposure method comprises the following steps of: firstly, photo-etching and exposing a silicon wafer by using a first exposure graph; and secondly, photo-etching and exposing the silicon wafer by using a second exposure graph, and thus forming pattern units on the surface of the silicon wafer at intervals, wherein the first exposure graph and the second exposure graph are formed on the same mask plate. By adoption of the exposure method provided by the invention, the problem that a lens of a stepper is non-uniformly heated can be solved, so the thermal deformation of the lens is reduced, and the process registration accuracy is improved.

Description

A kind of exposure method that improves the technique alignment precision
Technical field
The present invention relates to field of microelectronic fabrication, relate in particular to a kind of method of photolithographic exposure that improves the technique alignment precision for the step and repeat exposure litho machine.
Background technology
Photoetching technique is followed the continuous progress of integrated circuit fabrication process, constantly dwindling of live width, it is more and more less that the area of semiconductor devices is just becoming, and semi-conductive layout develops into the integrated circuit of integrating high-density multifunction from common simple function discrete device; By initial IC(integrated circuit) subsequently to the LSI(large scale integrated circuit), the VLSI(VLSI (very large scale integrated circuit)), until the ULSI(ULSI of today), the area of device further dwindles, function is more comprehensively powerful.Consider the complicacy of technique research and development, the restriction of chronicity and high cost etc. unfavorable factor, how on the basis of prior art level, further to improve the integration density of device, dwindle the area of chip, as much as possiblely on same piece of silicon chip obtain effective chip-count, thereby the raising overall interests will more and more be subject to the chip designer, the attention of manufacturer.
In semiconductor was made, mask plate was serving as the role of carrier, relies on just it, and photoetching can realize at silicon chip deviser's thinking, allows semiconductor realize various functions.Along with photoetching technique constantly strides forward to more tiny technology node, the price of mask plate is also constantly increased sharply.If can't satisfy the demand of technology, the qualification rate of product can't guarantee that the thing followed is exactly waste, the missing the market gold demand phase of dropping in advance, commercial massive losses.
Mask plate is not moved during step-by-step movement repeated exposure litho machine (Stepper) exposure, finish the exposure of a unit (shot) by single exposure, the step-by-step movement repeated exposure photoetching machine lens expanded by heating that existing photolithographic exposure mode can cause when the excessive mask plate figure of the X/Y size difference that exposes is inhomogeneous, and then affects alignment precision.
If the layout pattern X/Y size difference of this mask plate is excessive, for step-by-step movement repeated exposure litho machine, can cause the inhomogeneous problem of optical lens local heating.This problem can cause figure deformation to worsen, and then reduces the alignment precision performance of litho machine.Take 55 nanometer technologies as example, the requirement of alignment precision is 70nm, and when X/Y difference during greater than 9mm, product namely can't satisfy process requirements.And the difference between the X/Y is larger, and the degradation of alignment precision also increases sharply.
Summary of the invention
The present invention is directed to the deficiencies in the prior art part a kind of solution is provided, when having the excessive mask plate figure of X/Y size difference, if the X size of figure is less than 12.25mm(1 doubly) or Y size during less than 15.75mm, discharging then the mask plate figure can be repeated.In the exposure process respectively the figure put of counterweight physical pendulum intert exposure, and then realize step-by-step movement repeated exposure photoetching machine lens thermally equivalent, thereby reduce the deformation of camera lens calorifics, improved the technique alignment precision.
To achieve these goals, the invention provides a kind of exposure method that improves the technique alignment precision, comprise following sequential steps:
At first use the first exposure figure to the silicon chip photolithographic exposure, use the second exposure figure to the silicon chip photolithographic exposure again, so that silicon chip surface forms up and down pattern unit separately, described the first exposing patterns and the second exposing patterns are on same mask plate.
The exposure method of another improved technique alignment precision that the present invention also provides, comprise following sequential steps: be used alternatingly two or more exposure figure silicon chip is carried out photolithographic exposure, so that silicon chip surface forms the pattern unit that distributes separately, described two kinds or two kinds of exposing patterns are on same mask plate.
In a preferred embodiment provided by the invention, the directions X size of wherein said mask plate figure less than 12.25 mm and/or Y-direction size less than 15.75 mm.
The present invention also provides a kind of mask plate, two or more mask plate figures of arranging on the described mask plate.
In a preferred embodiment provided by the invention, the mask plate figure is laterally arranged side by side or is vertically arranged side by side on the wherein said mask plate.
In a preferred embodiment provided by the invention, the directions X size of described mask plate figure less than 12.25 mm and/or Y-direction size less than 15.75 mm.
Method provided by the invention can solve step-by-step movement repeated exposure photoetching machine lens nonuniform heating problem, thereby reduces the deformation of camera lens calorifics, has improved the technique alignment precision.
Description of drawings
Fig. 1 the invention provides the mask plate synoptic diagram that uses in the method.
Fig. 2 is the silicon chip synoptic diagram of processing among the present invention.
Fig. 3 is that different silicon chips adopt and the invention provides performance test alignment precision deviation map behind the method photolithographic exposure.
Embodiment
The invention provides the method that solves step-by-step movement repeated exposure photoetching machine lens nonuniform heating, by the inhomogeneous problem of the method fine solution optical lens local heating of energy, also solve technique alignment precision problem simultaneously.
By the following examples method provided by the invention is described in further detail, in order to better understand the content of the invention, but the content of embodiment does not limit the protection domain of the invention.
The mask plate (mask plate 3 structures are such as Fig. 1 (a) with (b)) that uses among traditional masks plate layout type and the present invention is compared, because restriction physically, the actual graphical zone (in 1 times of situation) of the mask plate maximum that conventional semi-conductor chip uses in making can only be 26mm(X) * 33mm(Y).If the X size of figure is less than 12.25mm(1 doubly) or Y size during less than 15.75mm (considering 1.5mm mask plate photo-shield strip demand), discharging then the mask plate figure can be repeated.
When exposing, the exposure mode that adopt to intert namely uses on the mask plate 3 4-1 zone and 4-2 district to expose successively, and then realization camera lens thermally equivalent, with the alignment precision decline that prevents that camera lens deformation from causing.
Photolithographic exposure is with two or more mask plate figures of arranging on the mask plate, and the mask plate figure is laterally arranged side by side or vertically arranged side by side on the mask plate, such as Fig. 1 (a) with (b).
The concrete steps of method of photolithographic exposure comprise following 3 kinds:
(1) at first, form the first exposure figure (4-1 zone) and the second exposure figure (4-2 zone) such as Fig. 1 (a) or Fig. 1 (b) mask plate that is shown in 3.Use the first exposure figure (4-1 zone) to the silicon chip photolithographic exposure, use again the second exposure figure (4-2 zone) to the silicon chip photolithographic exposure.Successively photolithographic exposure forms pattern as shown in Figure 2 so that silicon chip surface forms up and down pattern unit separately on the silicon chip.
(2) at first, form the first exposure figure (4-1 zone) and the second exposure figure (4-2 zone) such as Fig. 1 (a) or Fig. 1 (b) mask plate that is shown in 3.Use the second exposure figure (4-2 zone) to the silicon chip photolithographic exposure, use again the first exposure figure (4-1 zone) to the silicon chip photolithographic exposure.Successively photolithographic exposure forms pattern as shown in Figure 2 so that silicon chip surface forms up and down pattern unit separately on the silicon chip.
(3) at first, form the first exposure figure (4-1 zone) and the second exposure figure (4-2 zone) such as Fig. 1 (a) or Fig. 1 (b) mask plate that is shown in 3.Use the first exposure figure (4-1 zone) and the second exposure figure (4-2 is regional) to the silicon chip photolithographic exposure that hockets.Successively photolithographic exposure forms pattern as shown in Figure 2 so that silicon chip surface forms up and down pattern unit separately on the silicon chip.
Select in same batch different silicon chips to adopt to the invention provides method and carry out photolithographic exposure, the silicon chip behind the photolithographic exposure is carried out the test of alignment precision, test result as shown in Figure 3.Among the figure, ◆ line (OVLX_MIN) is the minimum alignment precision deviate of directions X on the silicon chip, ■ line (OVLX_MAX) is the maximum alignment precision deviate of directions X on the silicon chip, ▲ line (OVLY_MIN) is the minimum alignment precision deviate of Y-direction on the silicon chip, and * line (OVLY_MAX) is the maximum alignment precision deviate of directions X on the silicon chip.
Compare the result of the silicon test behind the conventional means photolithographic exposure, can improve 20% alignment precision by exposure light irradiation method provided by the invention, satisfy the requirement of producing.
More than specific embodiments of the invention are described in detail, but it is just as example, the present invention is not restricted to specific embodiment described above.To those skilled in the art, any equivalent modifications that the present invention is carried out and substituting also all among category of the present invention.Therefore, not breaking away from impartial conversion and the modification of doing under the spirit and scope of the present invention, all should contain within the scope of the invention.

Claims (6)

1. the exposure method that can improve the technique alignment precision is characterized in that, comprises following sequential steps:
At first use the first exposure figure to the silicon chip photolithographic exposure, use the second exposure figure to the silicon chip photolithographic exposure again, so that silicon chip surface forms the pattern unit that distributes separately, described the first exposing patterns and the second exposing patterns are on same mask plate.
2. exposure method that can improve the technique alignment precision, it is characterized in that, comprise following sequential steps: be used alternatingly two or more exposure figure silicon chip is carried out photolithographic exposure, so that silicon chip surface forms up and down pattern unit separately, described two kinds or two kinds of exposing patterns are on same mask plate.
3. exposure method according to claim 1 and 2 is characterized in that, the directions X size of described mask plate figure less than 12.25 mm and/or Y-direction size less than 15.75 mm.
4. a mask plate is characterized in that, two or more mask plate figures of arranging on the described mask plate.
5. described mask plate according to claim 4 is characterized in that, the mask plate figure is laterally arranged side by side or vertically arranged side by side on the described mask plate.
6. according to claim 4 or 5 described exposure methods, it is characterized in that, the directions X size of described mask plate figure less than 12.25 mm and/or Y-direction size less than 15.75 mm.
CN2012103436598A 2012-09-17 2012-09-17 Exposure method capable of improving process registration accuracy Pending CN102880012A (en)

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Application Number Priority Date Filing Date Title
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103345125A (en) * 2013-06-27 2013-10-09 上海华力微电子有限公司 System and method for improving photolithography process capacity

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001110719A (en) * 1999-10-14 2001-04-20 Hitachi Ltd Exposure method
CN101281364A (en) * 2007-04-03 2008-10-08 奇美电子股份有限公司 Colorful optical filter, liquid crystal display panel, LCD device and manufacturing method thereof
US20100310972A1 (en) * 2009-06-03 2010-12-09 Cain Jason P Performing double exposure photolithography using a single reticle
CN102365588A (en) * 2009-04-03 2012-02-29 株式会社V技术 Exposure method and exposure apparatus

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001110719A (en) * 1999-10-14 2001-04-20 Hitachi Ltd Exposure method
CN101281364A (en) * 2007-04-03 2008-10-08 奇美电子股份有限公司 Colorful optical filter, liquid crystal display panel, LCD device and manufacturing method thereof
CN102365588A (en) * 2009-04-03 2012-02-29 株式会社V技术 Exposure method and exposure apparatus
US20100310972A1 (en) * 2009-06-03 2010-12-09 Cain Jason P Performing double exposure photolithography using a single reticle

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103345125A (en) * 2013-06-27 2013-10-09 上海华力微电子有限公司 System and method for improving photolithography process capacity
CN103345125B (en) * 2013-06-27 2015-04-08 上海华力微电子有限公司 System and method for improving photolithography process capacity

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Application publication date: 20130116