CN102866351A

CN102866351A - Switch state detection circuit

Info

Publication number: CN102866351A
Application number: CN2012103387591A
Authority: CN
Inventors: 杨昌文
Original assignee: SHIYAN KERNEL TRONIX CO Ltd
Current assignee: SHIYAN KERNEL TRONIX CO Ltd
Priority date: 2012-09-13
Filing date: 2012-09-13
Publication date: 2013-01-09
Anticipated expiration: 2032-09-13
Also published as: CN102866351B

Abstract

The invention relates to a switch state detection circuit, which belongs to a state detection circuit, and solves the problems that the existing single chip microprocessor cannot utilize the input/output (I/O) port to simultaneously detect three states of a low-speed switch for power connection, grounding and suspension and the resource is limited when an analog/digital (A/D) port of a central processing unit (CPU) is used for detecting the low-speed switch. In the switch state detection circuit, a clock generating module generates a periodic triggering signal to be respectively transmitted to a square wave generating module and a judging module; and the square wave generating module generates periodically overturned high level and low level to be transmitted to a level conversion circuit, an electric signal after the level conversion of the level conversion circuit is transmitted to a drive circuit to be subjected to voltage and current amplification, the output end of the drive circuit is connected with N analog-digital conversion modules through N first limiting resistances and N second limiting resistances, which are sequentially connected with one another in serial, and the N analog-digital conversion module outputs digital quantity to be transmitted to the judging module to be judged. The switch state detection circuit only utilizes the I/O port of the CPU and is free from utilizing the A/D port, so that the high state, low state and suspension state of the switch can be detected, and the switch state detection circuit is applicable to the low-speed switch with the switch frequency of 100Hz and less.

Description

A kind of switch condition detection circuit

Technical field

The invention belongs to state detection circuit, particularly a kind of switch condition detection circuit is for detection of the on off state of low speed switch.

Background technology

At present, use single-chip microcomputer that the on off state of low speed switch is detected, common have following four kinds: (1) as shown in Figure 1, use the I/O mouth P0 of CPU, low speed switch to ground connection detects, and can only detect ground connection and the unsettled two states of switch, can not detect and connect power supply status.(2) as shown in Figure 2, use the I/O mouth of CPU, the low speed switch of docking power supply VCC detects, and what can only detect low speed switch connects power supply and unsettled two states, can not detect ground state.(3) as shown in Figure 3, use the I/O mouth of CPU, the moving contact of low speed switch switches between power supply VCC and ground connection, and what can detect low speed switch connects power supply and ground connection two states, but can not detect vacant state.(4) as shown in Figure 4, use the analog to digital conversion mouth AD0 of CPU, the moving contact of low speed switch switches between power supply VCC and ground connection, and what can detect low speed switch connects power supply, ground connection and unsettled three kinds of states, but the A/D mouth resource-constrained of CPU.Described low speed switch refers to that switching frequency is 100Hz and following switch.

Summary of the invention

The invention provides a kind of switch condition detection circuit, when solving existing single-chip microcomputer and using the I/O mouth can not detect simultaneously low speed switch to connect the problem of power supply, ground connection and unsettled three kinds of states and use the A/D mouth of CPU to detect low speed switch, the problem of resource-constrained.

A kind of switch condition detection circuit of the present invention comprises clock generation module, square wave generation module, level shifting circuit, driving circuit, analog-to-digital conversion module and judge module, it is characterized in that:

Described clock generation module produces the periodic triggers signal, delivers to respectively square wave generation module and judge module;

Described square wave generation module is triggered by the periodic triggers signal, produce the high and low level of punctuated turning over, deliver to level shifting circuit, level shifting circuit carries out the electric signal after the level conversion, deliver to driving circuit and carry out the voltage and current amplification, N successively first, second current-limiting resistance of series connection given in driving circuit output simultaneously, and N first, second current-limiting resistance tie point is connected by the slowdown monitoring switch output point with N respectively; N the second current-limiting resistance other end connects respectively N analog-to-digital conversion module, and N analog-to-digital conversion module output digital quantity delivered to judge module; N=1～50;

Described judge module is judged the digital quantity of N analog-to-digital conversion module output respectively: judge whether that the Contemporary Digital amount is not equal to digital quantity last time, be then judge by slowdown monitoring switch unsettled, otherwise judge again whether the Contemporary Digital amount is 0, be then to judge by slowdown monitoring switch ground connection, otherwise judgement is connect power supply by slowdown monitoring switch; Contemporary Digital amount, last time, digital quantity and periodic triggers signal were synchronous.

Described switch condition detection circuit is characterized in that:

Described clock generation module adopts the crystal oscillating circuit among the CPU, and described square wave generation module, analog-to-digital conversion module and judge module all load among the CPU, and the square wave generation module is by the delivery outlet realization of CPU, and analog-to-digital conversion module is realized by the input port of CPU.

The present invention only uses delivery outlet and input port (the I/O mouth) of CPU, without the A/D mouth, can detect switch high/low/unsettled three kinds of states, when solving existing single-chip microcomputer and using the I/O mouth can not detect simultaneously low speed switch to connect the problem of power supply, ground connection and unsettled three kinds of states and use the A/D mouth of CPU to detect low speed switch, the problem of resource-constrained, being applicable to the detector switch frequency is 100Hz and following low speed switch.

Description of drawings

Fig. 1 (A) is existing the first testing circuit; Use the I/O mouth of CPU, the switch of ground connection detected,

Fig. 1 (B) judges schematic flow sheet for existing the first testing circuit;

Fig. 2 (A) is existing the second testing circuit; Use the I/O mouth of CPU, the switch of docking power supply detects,

Fig. 2 (B) judges schematic flow sheet for existing the second testing circuit;

Fig. 3 (A) is existing the third testing circuit; Use the I/O mouth of CPU, switch is for connecing power supply/grounding switch,

Fig. 3 (B) judges schematic flow sheet for existing the third testing circuit;

Fig. 4 (A) is existing the 4th kind of testing circuit; Use the A/D mouth of CPU, switch is for connecing power supply/grounding switch,

Fig. 4 (B) judges schematic flow sheet for existing the 4th kind of testing circuit;

Fig. 5 is principle of the invention schematic diagram;

Fig. 6 is that the embodiment of the invention forms schematic diagram;

Fig. 7 is the judge module schematic flow sheet.

Embodiment

The present invention is further described below in conjunction with drawings and Examples.

As shown in Figure 5, the present invention includes clock generation module, square wave generation module, level shifting circuit, driving circuit, analog-to-digital conversion module and judge module; Described clock generation module produces the periodic triggers signal, delivers to respectively square wave generation module and judge module;

Described square wave generation module is triggered by the periodic triggers signal, produce the high and low level of punctuated turning over, deliver to level shifting circuit, level shifting circuit carries out the electric signal after the level conversion, deliver to driving circuit and carry out the voltage and current amplification, 2 successively the first current-limiting resistance R1, the second current-limiting resistance R2 of series connection are given in driving circuit output simultaneously, and 2 first, second current-limiting resistance tie points are connected with the output point of the first tested switch S 1 and the second tested switch S 2 respectively; 2 second current-limiting resistance R2 other ends connect respectively 2 analog-to-digital conversion modules, and 2 analog-to-digital conversion module output digital quantities are delivered to judge module;

Described judge module is judged the digital quantity of 2 analog-to-digital conversion module outputs respectively: judge whether that the Contemporary Digital amount is not equal to digital quantity last time, be then judge by slowdown monitoring switch unsettled, otherwise judge again whether the Contemporary Digital amount is 0, be then to judge by slowdown monitoring switch ground connection, otherwise judgement is connect power supply by slowdown monitoring switch; Contemporary Digital amount, last time, digital quantity and periodic triggers signal were synchronous.

As shown in Figure 6, the embodiment of the invention comprises clock generation module, square wave generation module, level shifting circuit, analog-to-digital conversion module and judge module, and described clock generation module produces the periodic triggers signal, delivers to respectively square wave generation module and judge module;

In the present embodiment, the crystal oscillating circuit of single-chip microcomputer consists of clock generation module, adopts the interior I/O mouth P0 of single-chip microcomputer as square wave generation module, is that dutycycle is 50% TTL square wave in the A point output cycle; Consist of level shifting circuit from the A point to the circuit the B point, consist of driving circuit from the B point to the circuit the C point, the I/O mouth P1 of single-chip microcomputer, I/O mouth P2 consist of 2 analog-to-digital conversion modules, and judge module is carried in the single-chip microcomputer.

According to circuit power, the voltage of ordering as A is during for high (corresponding TTL is for high) → and triode T1 conducting → B point voltage is that low → triode T2 cut-off/T3 conducting → C point voltage is low; When the voltage of ordering as A on the contrary, is low (corresponding TTL is low) → triode T1 cut-off → B point voltage is that height → triode T2 conducting/T3 cut-off → C point voltage is for high; Just produced square wave with A point equifrequent, equal duty ratio, antiphase at the C point like this.

As shown in Figure 7, judge module is judged the digital quantity of N analog-to-digital conversion module output respectively: judge whether that the Contemporary Digital amount is not equal to digital quantity last time, be then judge by slowdown monitoring switch unsettled, otherwise judge again whether the Contemporary Digital amount is 0, be then to judge by slowdown monitoring switch ground connection, otherwise judgement is connect power supply by slowdown monitoring switch; Contemporary Digital amount, last time, digital quantity and periodic triggers signal were synchronous.

Claims

1. a switch condition detection circuit comprises clock generation module, square wave generation module, level shifting circuit, driving circuit, analog-to-digital conversion module and judge module, it is characterized in that:

2. switch condition detection circuit as claimed in claim 1 is characterized in that: