CN102856448A - Method for manufacturing LED (light-emitting diode) chip - Google Patents
Method for manufacturing LED (light-emitting diode) chip Download PDFInfo
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- CN102856448A CN102856448A CN2012103516253A CN201210351625A CN102856448A CN 102856448 A CN102856448 A CN 102856448A CN 2012103516253 A CN2012103516253 A CN 2012103516253A CN 201210351625 A CN201210351625 A CN 201210351625A CN 102856448 A CN102856448 A CN 102856448A
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Abstract
The invention discloses a method for manufacturing a LED (light-emitting diode) chip, which comprises the following steps of: manufacturing a masking layer on a sapphire substrate, wherein the masking layer is Si3N4; manufacturing a photoresist pattern on the masking layer; carrying out laser marking on the exposed masking layer; removing the photoresist pattern; using the masking layer as a protection layer and corroding the side wall of a stress relief line by mixed solution of phosphoric acid and sulfuric acid so as to remove a marking product; removing the masking layer by cleaning solution; growing a GaN-based semiconductor epitaxial layer on the sapphire substrate obtained by the steps, of which the surface is provided with the stress relief line; etching each chip unit; manufacturing a passivating layer on the surface of a chip and ensuring an N electrode and a P electrode to be exposed so as to obtain a LED wafer; and carrying out back grinding and thinning on the LED wafer and then carrying out splitting to obtain the LED chip. Due to the adoption of the method, the light emergent efficiency of the chip can be improved, so that the brightness of the chip can be effectively improved.
Description
Technical field
The present invention relates to a kind of manufacture method of semiconductor device.
Background technology
In recent years, third generation semiconductor material with wide forbidden band take GaN and SiC as representative is subject to people's extensive concern and energetically research, especially III-V hi-nitride semiconductor material and alloy and the heterojunction material relevant with them have very large advantage aspect high temperature, the Deep trench termination.
Can at present, the bluish-green LED of high brightness succeeds in developing, but the existence of high threading dislocation density has limited the further raising of these device performances, therefore making a breakthrough aspect the high performance LED of realization, reduce the GaN dislocation density most important.
The GaN based light-emitting diode of generally using in the world now mainly is that heteroepitaxy is on smooth substrate, wherein substrate can be sapphire etc., the shortcoming of this structure is: owing to there not being the backing material of Lattice Matching, the GaN based light-emitting diode all is that heteroepitaxial growth is on the substrates such as sapphire, carborundum or silicon, the difference of lattice constant makes epitaxial material exist a lot of dislocations, these drawbacks limit the internal quantum efficiency of light-emitting diode; When light entered substrate from epitaxial loayer, because the interface is more smooth, the incidence angle of light was smaller, and GaN and refractive index of substrate are more or less the same, and cause reflectivity low, and most of light can escape into substrate, can not return epitaxial loayer by usable reflection, greatly reduce the light extraction efficiency of GaN based light-emitting diode.
In order to improve the light extraction efficiency of GaN based light-emitting diode, existing multinomial work launches around patterned substrate, mainly is by the etching sapphire, makes graph substrate.It is 1020080087406,1020060127623 Korean Patent such as publication number, make the hemisphere mask at sapphire, obtain hemispheric pattern at the etching sapphire, although the said method part has reduced epitaxy defect and has improved light extraction efficiency, but still there is following shortcoming: because sapphire refractive index is 1.8, refractive index ratio with GaN is more close, when light enters patterned substrate from epitaxial loayer, it is not obvious that reflectivity improves, and falls flat for the improvement of GaN based light-emitting diode light emission rate.
Summary of the invention
For the defects that exists in the prior art, the invention provides a kind of manufacture method of light-emitting diode chip for backlight unit, adopt the method can improve the light extraction efficiency of chip, thus can the Effective Raise chip brightness.
In order to solve the problems of the technologies described above, the present invention adopts following technical scheme:
A kind of manufacture method of led chip may further comprise the steps:
(1), make masking layer in Sapphire Substrate, masking layer is Si
3N
4
Preferred 6～8 microns of masking layer thickness.
(2), make photoetching agent pattern at described masking layer, described photoetching agent pattern forms a plurality of unit on the masking layer surface, has the part masking layer to expose between each unit.
(3), carry out laser scoring at the masking layer that exposes, draw to described Sapphire Substrate, form and discharge line of tension, this release line of tension is divided into a plurality of chip units with Sapphire Substrate; The optical maser wavelength that laser scoring adopts is 200-400nm, and discharging the line of tension width is the 2-15 micron, and depth of score is the 15-50 micron.
Preferably, optical maser wavelength is 355nm, and discharging the line of tension width is 6 microns, and depth of score is 25 microns.
(4), remove described photoetching agent pattern.
The preferred stripper that adopts cleans, and scavenging period is 10-20 minute.
(5), with described masking layer as protective layer, use the mixed liquor of phosphoric acid, sulfuric acid to corrode discharging the line of tension sidewall, remove the line product.
Preferably, the volume ratio of phosphoric acid, sulfuric acid is 1:3, and corrosion temperature is 300-350 ℃, and etching time is 50-60 minute.
(6), use cleaning fluid to remove described masking layer, cleaning fluid is hydrofluoric acid.
(7), has the Grown on Sapphire Substrates GaN base semiconductor epitaxial loayer that discharges line of tension on the surface that above-mentioned steps obtains, this semiconductor epitaxial layers comprises at least n type semiconductor layer, is positioned at the active layer on the described n type semiconductor layer, and is positioned at the p type semiconductor layer on the described active layer.
During the preparation semiconductor epitaxial layers, the technology such as preferable alloy organic chemical vapor deposition, molecular beam epitaxy, hydride gas-phase epitaxy.
(8), each chip unit is carried out etching, with the described N-type GaN layer of exposed portions serve, then make the N electrode, make transparency electrode and P electrode at P type GaN layer at the N-type GaN layer that exposes.
(9) make passivation layer at chip surface, and expose the N electrode and the P electrode obtains the LED wafer; The LED wafer is carried out the grinding back surface attenuate, and sliver obtains led chip again.
Embodiment
Describe the present invention below in conjunction with specific embodiment, but not as a limitation of the invention.
The manufacture method of led chip of the present invention comprises the steps:
(1), makes masking layer in Sapphire Substrate.Described Sapphire Substrate can be common Sapphire Substrate or graphical sapphire substrate.Described masking layer need on the one hand the adhesiveness with Sapphire Substrate good, come off avoiding, need on the other hand anti-laser emission, high temperature resistant phosphoric acid and sulfuric acid corrosion.The material of masking layer is SiO
2, Si
3N
4, or one or more metals among Ni, Ti, Cr, Al, Ag, the Pt and the combination of Au, such as Ni/Au, Ti/Au, Cr/Au, Ti/Al/Ti/Au, Ni/Ag/Au, Cr/Pt/Au etc., the optional 5-10 micron of the thickness of masking layer.
Masking layer is preferably SiO
2, preferred 6～8 microns of thickness.
(2), make photoetching agent pattern at described masking layer, described photoetching agent pattern forms a plurality of unit on the masking layer surface, has the part masking layer to expose between each unit.Described photoetching agent pattern is only used as identification when laser scribing.
(3), to the step 2 resulting structures, carry out laser scribing at the masking layer that exposes, draw to described Sapphire Substrate, form and discharge line of tension, it is divided into a plurality of chip units.The optical maser wavelength that laser scribing is adopted is 200-400nm, and discharging the line of tension width is the 2-15 micron, and depth of score is the 15-50 micron.In one embodiment, optical maser wavelength is 355nm, and discharging the line of tension width is 6 microns, and depth of score is 25 microns.
(4), remove described photoetching agent pattern.The employing stripper cleans, and scavenging period is 5-60min.
(5), with described masking layer as mask, use the mixed liquor of phosphoric acid, sulfuric acid to corrode discharging the line of tension sidewall, remove the line product.The volume ratio of described phosphoric acid and sulfuric acid is X: Y, X+Y=1, and 0＜X＜1, corrosion temperature is 200-400 ℃, more preferably 300～350 ℃.Etching time is 30-90 minute.In one embodiment, the volume ratio of phosphoric acid, sulfuric acid is 1/4 to 3/4, and corrosion temperature is 230 ℃, and etching time is 50～60min.
(6), use cleaning fluid to remove described masking layer.When using cleaning fluid to remove described masking layer, described cleaning fluid is different because of masking layer, SiO2, Si3N4 adopt BOE (Buffered Oxide Etch) solution or hydrofluoric acid to remove, Ni adopts nitric acid to remove, Ti adopts the concentrated hydrochloric acid of hydrofluoric acid, heat or the concentrated sulfuric acid of heat to remove, and Cr adopts the mixed liquor of hydrochloric acid and Cr to remove, and Al adopts highly basic or diluted acid to remove, Ag adopts the concentrated sulfuric acid of nitric acid and heat to remove, and Pt, Au adopt chloroazotic acid to remove.In one embodiment, use BOE to remove SiO2, scavenging period is 10-60min.
(7), growing semiconductor epitaxial loayer on the step 6 resulting structures, owing to having formed the release line of tension on the Sapphire Substrate, the semi-conducting materials such as GaN can't be grown at the release line of tension, so but spontaneous each monomer chip structure that is extended upward the dark release line of tension separation of formation by described release line of tension that grows into of extension.Before growing epitaxial, growth substrates is rule, help to discharge stress, reduce epitaxial growth GaN dislocation density, improve the epitaxial loayer crystal quality, reduce owing to the non-radiative recombination center density that defective and dislocation produce, improving internal quantum efficiency.This semiconductor epitaxial layers comprises at least n type semiconductor layer, is positioned at the active layer on the described n type semiconductor layer, and is positioned at the p type semiconductor layer on the described active layer.
Wherein, during the preparation semiconductor epitaxial layers, can adopt the technology such as metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride gas-phase epitaxy (HVPE).The present embodiment is preferably and utilizes metal organic chemical vapor deposition technology grow successively N-type GaN layer, active layer and P type GaN layer on Sapphire Substrate.Active layer is generally quantum well layer.
(8), on the step 7 resulting structures, each chip unit is carried out etching, with the described N-type GaN layer of exposed portions serve, then make the N electrode, make transparency electrode and P electrode at P type GaN layer at the N-type GaN layer that exposes.
(9) make SiO at chip surface at last
2Passivation layer, and expose N electrode and P electrode.Wherein, making transparency electrode, N/P electrode and passivation layer after the etching is techniques well known, and it is described that its making step is not restricted to this example, for example, also can make first passivation layer and make the N/P electrode again, and the material of passivation layer also is not limited to SiO
2Resulting LED wafer is carried out the grinding back surface attenuate, obtain led chip with the breaking machine sliver again.
Carry out again epitaxial growth GaN after chip unit scratched following benefit is arranged: 1) avoid laser scribing to the damage of GaN; 2) Sapphire Substrate is discharged through stress after ruling, can effectively reduce epitaxial growth GaN dislocation density, improve the epitaxial loayer crystal quality, reduce because the non-radiative recombination center density that defective and dislocation produce, thereby improve internal quantum efficiency; 3) mixed liquor of phosphoric acid, sulfuric acid can be removed sapphire line product, reduces the line product to Optical Absorption, increases the bright dipping of chip sidewall; 4) because the compactness difference between the Sapphire Substrate sheet is less, so the acid solution etching period is consistent, technology stability is good, and GaN is because difference, its compactness of growth conditions often there are differences, the acid solution etching period is inconsistent, technology stability is relatively poor.
Adopt the photoelectric parameter contrast of 10 * 23mil chip that method of the present invention obtains and conventional 10 * 23mil chip, as shown in the table.Can find out, luminous power (mW) promotes 15%, other photoelectric parameters are suitable, thus the inventive method can effectively reduce the GaN epitaxial loayer dislocation density, improve the epitaxial loayer crystal quality, reduce the line product to Optical Absorption, improve the light extraction efficiency of led chip.
Other process conditions that relate among the present invention are the common process condition, belong to the category that those skilled in the art are familiar with, and do not repeat them here.Above-described embodiment is the unrestricted technical scheme of the present invention in order to explanation only.Any technical scheme that does not break away from spirit and scope of the invention all should be encompassed in the middle of the patent claim of the present invention.
Claims (6)
1. the manufacture method of a led chip is characterized in that, the method may further comprise the steps:
(1), make masking layer in Sapphire Substrate, masking layer is Si
3N
4
(2), make photoetching agent pattern at described masking layer, described photoetching agent pattern forms a plurality of unit on the masking layer surface, has the part masking layer to expose between each unit;
(3), carry out laser scoring at the masking layer that exposes, draw to described Sapphire Substrate, form and discharge line of tension, this release line of tension is divided into a plurality of chip units with Sapphire Substrate; The optical maser wavelength that laser scoring adopts is 200-400nm, and discharging the line of tension width is the 2-15 micron, and depth of score is the 15-50 micron;
(4), remove described photoetching agent pattern;
(5), with described masking layer as protective layer, use the mixed liquor of phosphoric acid, sulfuric acid to corrode discharging the line of tension sidewall, remove the line product;
(6), use cleaning fluid to remove described masking layer;
(7), has the Grown on Sapphire Substrates GaN base semiconductor epitaxial loayer that discharges line of tension on the surface that above-mentioned steps obtains, this semiconductor epitaxial layers comprises at least n type semiconductor layer, is positioned at the active layer on the described n type semiconductor layer, and is positioned at the p type semiconductor layer on the described active layer;
(8), each chip unit is carried out etching, with the described N-type GaN layer of exposed portions serve, then make the N electrode, make transparency electrode and P electrode at P type GaN layer at the N-type GaN layer that exposes;
(9) make passivation layer at chip surface, and expose the N electrode and the P electrode obtains the LED wafer; The LED wafer is carried out the grinding back surface attenuate, and sliver obtains led chip again.
2. the method for claim 1 is characterized in that, described masking layer thickness is 6～8 microns.
3. the method for claim 1 is characterized in that, the optical maser wavelength in the step (3) is 355nm, and discharging the line of tension width is 6 microns, and depth of score is 25 microns.The method of claim 1 is characterized in that, adopts stripper to clean in the step (4), and scavenging period is 10-20 minute.
4. the method for claim 1 is characterized in that, the phosphoric acid in the step (5), the volume ratio of sulfuric acid are 1:3, and corrosion temperature is 300-350 ℃, and etching time is 50-60 minute.
5. the method for claim 1 is characterized in that, the cleaning fluid in the step (6) is hydrofluoric acid.
6. the method for claim 1 is characterized in that, during the preparation semiconductor epitaxial layers, can adopt the technology such as metal organic chemical vapor deposition, molecular beam epitaxy, hydride gas-phase epitaxy.
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|---|---|---|---|
| CN2012103516253A CN102856448A (en) | 2012-09-20 | 2012-09-20 | Method for manufacturing LED (light-emitting diode) chip |
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|---|---|---|---|
| CN2012103516253A CN102856448A (en) | 2012-09-20 | 2012-09-20 | Method for manufacturing LED (light-emitting diode) chip |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104701427A (en) * | 2015-02-13 | 2015-06-10 | 西安神光皓瑞光电科技有限公司 | Vertical LED chip preparation method |
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|---|---|---|---|---|
| KR20050104151A (en) * | 2004-04-28 | 2005-11-02 | 주식회사 이츠웰 | Gan-based light emitting diode and manufacturing method of the same |
| CN101908505A (en) * | 2010-06-24 | 2010-12-08 | 上海蓝光科技有限公司 | Method for manufacturing light-emitting diode chip |
| CN202167535U (en) * | 2011-07-27 | 2012-03-14 | 南通同方半导体有限公司 | Light-emitting diode structure capable of removing stress |
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2012
- 2012-09-20 CN CN2012103516253A patent/CN102856448A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20050104151A (en) * | 2004-04-28 | 2005-11-02 | 주식회사 이츠웰 | Gan-based light emitting diode and manufacturing method of the same |
| CN101908505A (en) * | 2010-06-24 | 2010-12-08 | 上海蓝光科技有限公司 | Method for manufacturing light-emitting diode chip |
| CN202167535U (en) * | 2011-07-27 | 2012-03-14 | 南通同方半导体有限公司 | Light-emitting diode structure capable of removing stress |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104701427A (en) * | 2015-02-13 | 2015-06-10 | 西安神光皓瑞光电科技有限公司 | Vertical LED chip preparation method |
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Application publication date: 20130102 |