CN102856261A - Method for preparing metal, ferroelectric substance, insulator and semiconductor structure - Google Patents

Method for preparing metal, ferroelectric substance, insulator and semiconductor structure Download PDF

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CN102856261A
CN102856261A CN2012103301497A CN201210330149A CN102856261A CN 102856261 A CN102856261 A CN 102856261A CN 2012103301497 A CN2012103301497 A CN 2012103301497A CN 201210330149 A CN201210330149 A CN 201210330149A CN 102856261 A CN102856261 A CN 102856261A
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insulations
ferroelectric
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CN102856261B (en
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王瑶
陈静怡
邓元
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Beihang University
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Abstract

A method for preparing a metal, ferroelectric substance, insulator and semiconductor structure is an in-situ growth technology for a Bi2SiO5 insulating layer in an MFIS (metal, ferroelectric substance, insulator and semiconductor) structure, and is characterized in that Bi2O3 is generated by Bi salt precursor sol in a thermal treatment process owing to volatility of bismuth oxide, on the one hand, BiFeO3 of a ferroelectric layer is reacted with amorphous SiO2 on a Si substrate at a growth temperature to generate an insulating layer, and on the other hand, lost Bi in a ferroelectric layer growth process is supplemented. The method includes seven steps. The method is scientific in conception and simple in process, and has high practical value and a wide application prospect in the technical field of novel microelectronic materials.

Description

The preparation method of a kind of metal-ferroelectric-insulator-semiconductor structure
Technical field
The present invention relates to the preparation method of a kind of metal-ferroelectric-insulator-semiconductor structure, relate in particular to the preparation method of a kind of metal-ferroelectric of growth in situ insulating barrier-insulator-semiconductor (MFIS) structure, it is a kind of film in-situ growth technology and utilizes this technology to prepare a kind of ferroelectric metal-ferroelectric for non-volatile ferroelectric holder-insulator-semiconductor structure, belongs to the microelectronics new material technology field.
Background technology
Ferroelectric material has spontaneous polarization, has two kinds of polarized states, therefore can be used for area information storage.As a kind of nonvolatile storage, its canned data can not lost because of outage, and ferroelectric memory (Ferroelectric RandomAccess Memory, FeRAM) has good application prospect.Present commercial FeRAM mainly consists of (1T-1C) by a transistor and a ferroelectric condenser, and is multiplex in smart card, mobile communication and personal data storage, as: USB flash disk, personal digital assistant(PDA) etc.But the FeRAM density of data storage is low, and the behaviour that reads of data does and has destructiveness, for improving these shortcomings, has developed field-effect transistor FeRAM(FETFeRAM on the FeRAM basis).FETFeRAM after the improvement has that memory cell is little, low energy consumption, nondestructive reading be according to advantages such as manipulations, but exist ferroelectric thin film and Si substrate having at the interface counterdiffusion, both thermal stress not to mate unfavorable factors such as (thermal coefficient of expansion of Si are generally less than common oxide) in this structure, reduced the performance of FETFeRAM.For overcoming above shortcoming, between ferroelectric layer and semiconductor Si layer, insert one deck insulating material, consist of metal-ferroelectric-insulator-semiconductor structure (Metal Ferroelectric Insulator Semiconductor, MFIS).Insulating barrier act as isolation ferroelectric layer and Si substrate in the MFIS structure, avoids the two at the interface reaction.Therefore require insulating material to have good thermal stability, low-leakage current, higher dielectric constant and can form good interface with Si.The insulating material that is usually used in the MFIS structure has: Y 2O 3, HfO 2, ZrO 2, Al 2O 3, SrTiO 3Deng.The ferroelectric material that consists of the MFIS structure has: (Bi, La) 4Ti 3O 12, SrBi 2Ta 2O 9, SrBi 2Nb 2O 9Deng the Bi laminated perovskite structure, because they have good ferroelectric properties and fatigue durability is good, confining force is long, very potential in the FETFeRAM field.
BiFeO 3As a kind of lead-free ferroelectric material with fine iron electrical property that rose in recent years, the remanent polarization (P of its film r) up to ~ 100 μ C/cm 2, be expected to substitute conventional iron electric material Pb (Zi xTi 1-x) O 3At present, with BiFeO 3The research that is applied to the FETFeRAM field is also fewer, and the structure that has been reported has: BiFeO 3/ SrTiO 3/ GaN, BiFeO 3/ ZrO 2/ Si and BiFeO 3/ Bi 2Ti 2O 7/ Si.Capacitance-voltage (C-V) curve is that the important electrical property of MFIS structure characterizes, because the polarization of ferroelectric material upset causes that obvious hysteretic characteristics appears in the C-V curve in the MFIS structure, and " Memory windows " (memory window, V commonly used m) estimate the performance of MFIS structure; V mSize be back and forth two C-V curves at the width of overlapping position not, Memory windows equals 2V in theory c(V c: the ferroelectric thin film coercive voltage).But these MFIS Memory windows values of report are larger from the theoretical value gap at present, and topmost reason comes from the charge injection in semiconductor Si or the metal electrode.Improve two interfaces of ferroelectric/insulating barrier and insulating barrier/Si in conjunction with being the effective way that reduces Si charge injection raising MFIS performance for this reason.Seeking suitable intermediate insulation layer material is the key that realizes MFIS well-formed's performance.Consider Bi 2SiO 5Be Bi-O and Si-O layer structure, dielectric constant has good thermal stability about 30, and leakage current is little.The more important thing is Bi 2SiO 5(100) face and Si(100) the face mismatch is ~ 0.5%, can form good interface with Si; And studies show that, at Bi 2SiO 5/ Si at the interface electric charge injection and catch seldom, therefore select Bi 2SiO 5As based on BiFeO 3The insulating barrier of the MFIS structure of ferroelectric thin film makes up Pt/BiFeO 3/ Bi 2SiO 5/ Si ferroelectric memory.
Summary of the invention
The invention provides the preparation method of a kind of metal-ferroelectric-insulator-semiconductor structure, it is Bi in a kind of MFIS structure 2SiO 5The in-situ growth technology of insulating barrier is characterized in that: utilize the bismuth oxide effumability, generate Bi by Bi salt precursor body colloidal sol in heat treatment process 2O 3, at ferroelectric layer BiFeO 3Under the growth temperature on the one hand with the Si substrate on amorphous SiO 2Reaction generates insulating barrier, replenishes on the other hand simultaneously the Bi that lacks in the ferroelectric layer growth course.
The present invention be on the other hand made up a kind of based on BiFeO 3The MFIS structure of ferroelectric thin film is characterized by the Pt/BiFeO that is grown on the single crystalline Si 3/ Bi 2SiO 5Multilayer film has more excellent performance, and Memory windows can reach 3.5 volts.
The preparation method of a kind of metal-ferroelectric of the present invention-insulator-semiconductor structure, the method concrete steps are as follows:
Step 1: Bi oxide precursor colloidal sol is by bismuth nitrate (Bi (NO 3) 36H 2O) with citric acid in molar ratio 1:1.5 be dissolved in the ethylene glycol monoemethyl ether, the gained solution concentration is 0.15mol/L.
Step 2: BiFeO 3The precursor sol liquid solution is by bismuth nitrate (Bi (NO 3) 36H 2O), ferric nitrate ((FeNO 3) 36H 2O) be dissolved in the ethylene glycol monoemethyl ether by cation mol ratio 1:1.5 with citric acid, the gained solution concentration is 0.2mol/L, leaves standstill after stirring 24 hours.
Step 3: the Si substrate adopts deionized water, absolute ethyl alcohol and deionized water to clean in ultrasound environments successively 10 minutes, places afterwards rapid heat-treatment furnace to be warming up to rapidly 500 ° of C insulations and is cooled to room temperature after 5 minutes.
Step 4: the Si substrate after will processing places on the sol evenning machine, spin coating one deck Bi oxide precursor colloidal sol, rotating speed 3000rpm, 30 seconds spin coating time, after the film forming institute's film forming is dried half an hour under 80 ° of C, put into rapid heat-treatment furnace, be warming up to rapidly 200 ° of C insulations 5 minutes, and then be rapidly heated to 400 ° of C insulations 5 minutes, obtain after the cooling by the thin Bi of one deck 2O 3The Si substrate that covers.
Step 5: at Bi 2O 3Spin coating BiFeO on the substrate that covers 3Colloidal sol, rotating speed 4000rpm, 30 seconds spin coating time, film forming becomes wet film to dry half an hour under 80 ° of C institute, puts into rapid heat-treatment furnace and carries out organic substance decomposing coke discharging heat treatment: be warming up to rapidly 200 ° of C insulations 5 minutes, and then be rapidly heated to 400 ° of C insulations 5 minutes, repeat above technique after the cooling, by control spin coating number of times, obtain the amorphous thin film of predetermined thickness.
Step 6: the BiFeO of last spin coating 3Film is warming up to rapidly 625 ° of C insulations of crystallization temperature 5 minutes 400 ° of C insulations after 5 minutes, so that BiFeO 3In the time of thin film crystallization, Bi 2O 3Unformed SiO with the autoxidation formation of Si surface 2The reaction original position generates Bi 2SiO 5, obtain BiFeO 3/ Bi 2SiO 5/ Si structure.
Step 7: sputtering electrode material---metal platinum electrode 104 namely consists of based on BiFeO 3The MFIS structure as shown in Figure 1 of ferroelectric thin film.
Advantage and effect: the present invention compared with the prior art, its major advantage is: processing step is easy, take full advantage of Bi based compound characteristics, generate simultaneously insulating barrier and ferroelectric layer in the MFIS structure, gained MFIS structural behaviour is excellent, and the key technical indexes Memory windows value can reach 3.5V when electric field strength 35kV/mm.
Description of drawings:
Fig. 1: MFIS structural representation of the present invention
101-semiconductor Si substrate, the intermediate insulating layer of 102-growth in situ, 103-multiferroic film, 104-metal platinum electrode
Fig. 2: many iron property (BFO) in the MFIS structure of the present invention/insulator (BSO)/semiconductor Si is high resolution transmission electron microscopy (HRTEM) figure at the interface
Fig. 3: the X-ray energy spectrum (EDX) of scanning along the line in the zone shown in MFIS structure scanning electron microscopy of the present invention (SEM) figure and the purple line
Fig. 4: the capacitance-voltage of MFIS structure of the present invention (C-V) curve under the different voltage conditions
Fig. 5: be FB(flow block) of the present invention.
Embodiment:
See Fig. 5, the preparation method of a kind of metal-ferroelectric of the present invention-insulator-semiconductor (MFIS) structure, the method concrete steps are as follows:
Step 1: Bi oxide precursor colloidal sol is by bismuth nitrate (Bi (NO 3) 36H 2O) with citric acid in molar ratio 1:1.5 be dissolved in the ethylene glycol monoemethyl ether, the gained solution concentration is 0.15mol/L.
Step 2: BiFeO 3The precursor sol liquid solution is by bismuth nitrate (Bi (NO 3) 36H 2O), ferric nitrate ((FeNO 3) 36H 2O) be dissolved in the ethylene glycol monoemethyl ether by cation mol ratio 1:1.5 with citric acid, the gained solution concentration is 0.2mol/L, leaves standstill after stirring 24 hours.
Step 3: the Si substrate adopts deionized water, absolute ethyl alcohol and deionized water to clean in ultrasound environments successively 10 minutes, places afterwards rapid heat-treatment furnace to be warming up to rapidly 500 ° of C insulations and is cooled to room temperature after 5 minutes.
Step 4: the Si substrate after will processing places on the sol evenning machine, spin coating one deck Bi oxide precursor colloidal sol, rotating speed 3000rpm, 30 seconds spin coating time, after the film forming institute's film forming is dried half an hour under 80 ° of C, put into rapid heat-treatment furnace, be warming up to rapidly 200 ° of C insulations 5 minutes, and then be rapidly heated to 400 ° of C insulations 5 minutes, obtain after the cooling by the thin Bi of one deck 2O 3The Si substrate that covers;
Step 5: at Bi 2O 3Spin coating BiFeO on the substrate that covers 3Colloidal sol, rotating speed 4000rpm, 30 seconds spin coating time, film forming becomes wet film to dry half an hour under 80 ° of C institute, puts into rapid heat-treatment furnace and carries out organic substance decomposing coke discharging heat treatment: be warming up to rapidly 200 ° of C insulations 5 minutes, and then be rapidly heated to 400 ° of C insulations 5 minutes, repeat above technique after the cooling, by control spin coating number of times, obtain the amorphous thin film of predetermined thickness.
Step 6: the BiFeO of last spin coating 3Film is warming up to rapidly 625 ° of C insulations of crystallization temperature 5 minutes 400 ° of C insulations after 5 minutes, so that BiFeO 3In the time of thin film crystallization, Bi 2O 3Unformed SiO with the autoxidation formation of Si surface 2The reaction original position generates Bi 2SiO 5, obtain BiFeO 3/ Bi 2SiO 5/ Si structure.
Step 7: sputtering electrode material---metal platinum electrode 104 namely consists of based on BiFeO 3The MFIS structure as shown in Figure 1 of ferroelectric thin film.
Between top electrode and bottom electrode, apply from negative electricity and be pressed onto positive voltage, reduce conversion electric field strength to negative voltage from positive voltage again, record the capacitance variations curve of this MFIS structure as shown in Figure 4.When maximum electric field intensity was 25kV/mm, the Memory windows value reached 2 volts.Rising electric field strength is during to 35kV/mm, and the Memory windows value increases to 3.5 volts.
Fig. 2 is at the interface high resolution transmission electron microscopy (HRTEM) figure of many iron property (BFO) in the MFIS structure of the present invention/insulator (BSO)/semiconductor Si; Fig. 3 is the X-ray energy spectrum (EDX) that scans along the line in the zone shown in MFIS structure scanning electron microscopy of the present invention (SEM) figure and the purple line; Fig. 4 is capacitance-voltage (C-V) curve synoptic diagram of MFIS structure of the present invention under the different voltage conditions.

Claims (1)

1. the preparation method of metal-ferroelectric-insulator-semiconductor structure, it is characterized in that: the method concrete steps are as follows:
Step 1: Bi oxide precursor colloidal sol is by bismuth nitrate (Bi (NO 3) 36H 2O) with citric acid in molar ratio 1:1.5 be dissolved in the ethylene glycol monoemethyl ether, the gained solution concentration is 0.15mol/L;
Step 2: BiFeO 3The precursor sol liquid solution is by bismuth nitrate (Bi (NO 3) 36H 2O), ferric nitrate ((FeNO 3) 36H 2O) be dissolved in the ethylene glycol monoemethyl ether by cation mol ratio 1:1.5 with citric acid, the gained solution concentration is 0.2mol/L, leaves standstill after stirring 24 hours;
Step 3: the Si substrate adopts deionized water, absolute ethyl alcohol and deionized water to clean in ultrasound environments successively 10 minutes, places afterwards rapid heat-treatment furnace to be warming up to rapidly 500 ° of C insulations and is cooled to room temperature after 5 minutes;
Step 4: the Si substrate after will processing places on the sol evenning machine, spin coating one deck Bi oxide precursor colloidal sol, rotating speed 3000rpm, 30 seconds spin coating time, after the film forming institute's film forming is dried half an hour under 80 ° of C, put into rapid heat-treatment furnace, be warming up to rapidly 200 ° of C insulations 5 minutes, and then be rapidly heated to 400 ° of C insulations 5 minutes, obtain after the cooling by the thin Bi of one deck 2O 3The Si substrate that covers;
Step 5: at Bi 2O 3Spin coating BiFeO on the substrate that covers 3Colloidal sol, rotating speed 4000rpm, 30 seconds spin coating time, film forming becomes wet film to dry half an hour under 80 ° of C institute, puts into rapid heat-treatment furnace and carries out organic substance decomposing coke discharging heat treatment: be warming up to rapidly 200 ° of C insulations 5 minutes, and then be rapidly heated to 400 ° of C insulations 5 minutes, repeat above technique after the cooling, by control spin coating number of times, obtain the amorphous thin film of predetermined thickness;
Step 6: the BiFeO of last spin coating 3Film is warming up to rapidly 625 ° of C insulations of crystallization temperature 5 minutes 400 ° of C insulations after 5 minutes, so that BiFeO 3In the time of thin film crystallization, Bi 2O 3Unformed SiO with the autoxidation formation of Si surface 2The reaction original position generates Bi 2SiO 5, obtain BiFeO 3/ Bi 2SiO 5/ Si structure;
Step 7: sputtering electrode material---the metal platinum electrode namely consists of based on BiFeO 3The MFIS structure of ferroelectric thin film.
CN201210330149.7A 2012-09-07 2012-09-07 Method for preparing metal, ferroelectric substance, insulator and semiconductor structure Expired - Fee Related CN102856261B (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103771532A (en) * 2014-03-04 2014-05-07 西北大学 Preparation method of BiFeO3 material, BiFeO3/TiO2 composite film and application thereof
CN103839946A (en) * 2014-03-10 2014-06-04 中国科学院半导体研究所 MFIS structure based on tetragonal phase bismuth ferrite and preparation method thereof
CN105788864A (en) * 2016-02-29 2016-07-20 湘潭大学 Method for improving negative capacitance of PZT ferroelectric thin film
CN110451810A (en) * 2019-09-20 2019-11-15 陕西科技大学 A kind of CuO doping Bi2SiO5The preparation method of polycrystalline glass

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030224537A1 (en) * 2002-05-28 2003-12-04 National Chiao Tung University Ferroelectric thin film processing for ferroelectric field-effect transistor
CN101050120A (en) * 2007-05-11 2007-10-10 清华大学 Method for preparing bismuth ferrite based multifunctioanl oxide ceramic material

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030224537A1 (en) * 2002-05-28 2003-12-04 National Chiao Tung University Ferroelectric thin film processing for ferroelectric field-effect transistor
CN101050120A (en) * 2007-05-11 2007-10-10 清华大学 Method for preparing bismuth ferrite based multifunctioanl oxide ceramic material

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103771532A (en) * 2014-03-04 2014-05-07 西北大学 Preparation method of BiFeO3 material, BiFeO3/TiO2 composite film and application thereof
CN103771532B (en) * 2014-03-04 2016-02-10 西北大学 BiFeO 3the preparation method of material, BiFeO 3/ TiO 2the application of laminated film and this laminated film
CN103839946A (en) * 2014-03-10 2014-06-04 中国科学院半导体研究所 MFIS structure based on tetragonal phase bismuth ferrite and preparation method thereof
CN103839946B (en) * 2014-03-10 2016-09-14 中国科学院半导体研究所 MFIS structure based on Tetragonal bismuth ferrite and preparation method
CN105788864A (en) * 2016-02-29 2016-07-20 湘潭大学 Method for improving negative capacitance of PZT ferroelectric thin film
CN105788864B (en) * 2016-02-29 2017-12-08 湘潭大学 A kind of method of raising PZT ferroelectric thin film negative capacitances
CN110451810A (en) * 2019-09-20 2019-11-15 陕西科技大学 A kind of CuO doping Bi2SiO5The preparation method of polycrystalline glass
CN110451810B (en) * 2019-09-20 2021-08-03 陕西科技大学 CuO doped Bi2SiO5Method for producing polycrystalline glass

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