CN102854692A - Electrophoresis type display panel - Google Patents

Electrophoresis type display panel Download PDF

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Publication number
CN102854692A
CN102854692A CN2012103219168A CN201210321916A CN102854692A CN 102854692 A CN102854692 A CN 102854692A CN 2012103219168 A CN2012103219168 A CN 2012103219168A CN 201210321916 A CN201210321916 A CN 201210321916A CN 102854692 A CN102854692 A CN 102854692A
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layer
common voltage
display panel
conductive layer
electrically connected
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CN102854692B (en
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郑美君
黄智源
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AU Optronics Corp
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AU Optronics Corp
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Abstract

An electrophoresis type display panel comprises a substrate, a pixel array, a plurality of leads, an electrophoresis display medium layer, an electrode layer, a common voltage pad and a covering layer. The substrate has a display area and a non-display area around the display area, and the non-display area includes a lead area. The pixel array is located in the display area and comprises a plurality of signal lines and a plurality of pixel units electrically connected with the signal lines. The signal lines extend from the display area into the lead area, and a plurality of leads in the lead area are electrically connected with the signal lines. The electrophoretic display medium layer is positioned above the pixel array, and the electrode layer is positioned above the electrophoretic display medium layer. The common voltage pad is disposed in the non-display region and in a portion of the lead region, and is electrically insulated from the lead and electrically connected to the electrode layer. The covering layer covers the electrophoretic display medium layer.

Description

Electrophoresis type display panel
Technical field
The invention relates to a kind of display panel, and particularly relevant for a kind of electrophoresis type display panel.
Background technology
Wish the at any time requirement of Information in order to satisfy the modern, by the electronics technology of making rapid progress, novel electronic display unit is a barrage of being suggested.Use electrophoresis type display panel (electrophoretic display, EPD) Electronic Paper (electronic paper), because on the effect of image display, be similar to ink manifesting on paper, therefore easilier for the user watch for a long time, and be common on the device as reading electronic book.In addition, electrophoresis type display panel (EPD) also possesses the advantage that low power consumption is arranged, and is fit to especially be used on many carry-on electronic installations.
On the present panel designs, all design large-area demonstration block, or attempt reducing the electronic component on the integrated circuit, so that the reduction that non-display area can be relative on the substrate in fixed size how seeking.No exception in the design of electrophoresis type display panel (EPD).Because the electrode layer of the electrophoretic display medium layer in the electrophoresis type display panel (EPD) and its top must be contained such as pel array or other necessary electronic components, therefore by changing the configuration of some electronic components of electrophoresis type display panel (EPD), can reduce the electrophoretic display medium layer that need to be covered on the aforementioned electronic element and the size of electrode layer, and save consumptive material.Yet, electronic component is in configuration or stray capacitance (parasitic capacitance) effect that produces when overlapping, can impact the inner signal transmission of electrophoresis type display panel (EPD), be when reconfiguring electronic component, the factor that need to consider.
Summary of the invention
The invention provides a kind of electrophoresis type display panel, it has better space utilization.
The invention provides a kind of electrophoresis type display panel, comprise substrate, pel array, a plurality of leads, electrophoretic display medium layer, electrode layer, common voltage pad and overlayer.Substrate has the viewing area and is positioned at viewing area non-display area on every side, and non-display area comprises lead district.Pel array is arranged in the viewing area of substrate, and pel array comprises many signal line and a plurality of pixel cells that are electrically connected with signal wire, and signal wire extends to the lead district from the viewing area.A plurality of leads is arranged in the lead district of non-display area and is electrically connected with signal wire respectively.The electrophoretic display medium layer is positioned at the top of pel array, and electrode layer is positioned at the top of electrophoretic display medium layer.The common voltage pad is arranged in the non-display area and is arranged in the lead district of part, and common voltage pad and lead-in wire are electrically insulated and are electrically connected with electrode layer.Overlayer covers the electrophoretic display medium layer.
Based on above-mentioned, the electrophoresis type display panel of one embodiment of the invention has the common voltage pad, and contacts with electrode layer by the common voltage pad, to provide common voltage to the electrophoretic display medium layer.The common voltage pad is the lead district that is arranged in part, and and lead wire insulation.In other words, the present invention utilizes the space on the lead district, and the common voltage pad is set, and reduces the space that the required consumption of a blank block on substrate of common voltage pad is set.Therefore, the present invention has better space utilization.
For above-mentioned feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and cooperate accompanying drawing to be described in detail below.
Description of drawings
Figure 1A is according in one embodiment of the invention, looks synoptic diagram on the part of electrophoresis type display panel.
Figure 1B is according in one embodiment of the invention, looks synoptic diagram on the electrophoresis type display panel.
Fig. 2 is in the electrophoresis type display panel of Figure 1B, along the sectional view of I-I ' profile line and II-II ' profile line.
Fig. 3 is in another embodiment of the present invention, the section of structure of pel array.
Fig. 4 is in the electrophoresis type display panel of Fig. 2 embodiment, along the sectional view of III-III ' profile line.
Description of reference numerals
Figure BDA00002091871500021
Embodiment
Figure 1A is in one embodiment of the invention, looks synoptic diagram on the part of electrophoresis type display panel, and Figure 1B in one embodiment of the invention, looks synoptic diagram on the electrophoresis type display panel.Figure 1A only illustrates Figure 1B middle part blockette and framework.Please refer to Figure 1A and Figure 1B, electrophoresis type display panel 100 comprises substrate 10, pel array 140, a plurality of leads 132, electrophoretic display medium layer 160, electrode layer 170, common voltage pad 180 and overlayer 190.
According to Figure 1A, in electrophoresis type display panel 100, substrate 10 can be hard substrate or flexible base plate, and material can be glass, quartz, plastic cement or other suitable material.Substrate 10 can be divided into viewing area 110 and be positioned at viewing area non-display area 120 on every side, and non-display area comprises lead district 130.
Pel array 140 is arranged in the viewing area 110 of substrate 10, for electric crystal array film (Thin Film Transistor Array) but not as limit.Pel array 140 comprises many signal line 140a and a plurality of pixel cell 140b that are electrically connected with signal wire, and signal wire 140a extends to the lead district 130 from the viewing area.Because pel array 140 comprises electric crystal array film (TFT Array), therefore the many signal line 140a in the pel array 140 can be data line common in the pel array 140 or sweep trace, and signal wire 140a can be electrically connected with the electric crystal array film of a plurality of pixel cell 140b.
Lead-in wire 132 is positioned at the lead district 130 of non-display area 120, and is electrically connected with signal wire 140a.Signal wire 140a extends to the lead district 130 in the non-display area 120 from viewing area 110, and is electrically connected with lead-in wire 132 in the lead district 130.Pixel cell 140b can be electrically connected with relevant drive unit (such as gate drivers, source electrode driver (not shown) or control circuit 122) by lead-in wire 132.
With reference to Figure 1B, electrophoretic display medium layer 160 is positioned at pel array 140 tops in addition, and electrode layer 170 is positioned at electrophoretic display medium layer 160 top.Generally speaking, comprise electrophoresis liquid (not shown) and a plurality of electrically charged particle (not shown) in the electrophoretic display medium layer 160, but be not limited to this.Electrically charged particle is scattered in the electrophoresis liquid, and can the relatively mobile and arrangement with the variation of extra electric field.Electrophoresis liquid can be transparent or colored electrophoresis liquid, and such as black electrophoresis liquid or white electrophoresis liquid, and electrically charged particle also can be charged pigment particle, for example white electrically charged particle, the electrically charged particle of black or other color belt charge particle.Because the electrically charged particle in the electrophoretic display medium layer 160 can be controlled it via the adjustment extra electric field and move, therefore except the pixel voltage that the pel array 140 that is disposed at electrophoretic display medium layer 160 below provides, the electrode layer 170 of electrophoretic display medium layer 160 top also is used for providing common voltage.By the difference of each pixel voltage and common voltage, electrophoretic display medium layer 160 can be divided into a plurality of block of pixels and adjust, to reach the display effect that needs.
In Figure 1B, electrode layer 170 is disposed on the electrophoretic display medium layer 160, so common voltage pad 180 is as the path that the common voltage of electrode layer 170 is provided.In the present embodiment, referring to Figure 1B, common voltage pad 180 is arranged in the non-display area 120 and is arranged in the lead district 130 of part.Common voltage pad 180 is electrically connected to provide common voltage with electrode layer 170, but is electrically insulated with lead-in wire 132 in the lead district 130, in order to avoid sweep signal or the data-signal in going between impacted.
Overlayer 190 places the top of electrode layer 170.Overlayer 190 protection pel arrays 140, electrophoretic display medium layer 160 and electrode layer 170, and be to cover electrophoretic display medium layer 160 fully.
For the electrophoresis type display panel 100 in clearer expression above-described embodiment, Fig. 2 is in the electrophoresis type display panel of Figure 1B, along I-I ' profile line with along the sectional view of II-II '.With reference to Figure 1B and Fig. 2, the I-I ' profile line among Figure 1B is respectively the sectional view of corresponding viewing area 110 and non-display area 120 with II-II ' profile line.
With reference to Figure 1B, also comprise electrostatic discharging element district 150 between the lead district 130 of non-display area 120 and the viewing area 110.Common voltage pad 180 is arranged in lead district 130, and does not extend to electrostatic discharging element district 150.The setting in electrostatic discharging element district 150 can protect other electron component not to be subjected to the damage of static discharge phenomenon.
According to Fig. 2, in present embodiment, comprise substrate 10, pel array 140, electrophoretic display medium layer 160, electrode layer 170 and overlayer 190 in the viewing area 110 in corresponding I-I ' profile line.Pel array 140 has a plurality of pixel cell 140b, and each pixel cell 140b comprises active member 141, flatness layer 142 and pixel electrode 143.Active member 141 is membrane transistor (TFT), it comprises gate electrode 141a, source electrode 141b, drain electrode 141c, semiconductor layer 141d and dielectric layer 141e, and gate electrode 141a, dielectric layer 141e, semiconductor layer 141d, source electrode 141b and drain electrode 141c sequentially stack on substrate 10.Gate electrode 141a is in pel array 140, and the signal wire 140a corresponding with it is electrically connected, and the source electrode 141b signal wire 140a corresponding with it is electrically connected.
Flatness layer 142 covers active member 141, is positioned on the active member 141, and in order to protect active member 141.Also include insulation course 145 between flatness layer 142 and the dielectric layer 141e.Pixel electrode 143 is positioned on the flatness layer 142 and with active member 141 and is electrically connected, and pixel electrode 143 comprises transparency conducting layer 143a and metal level 143b.
In addition, each pixel cell 140b can comprise storage capacitors Cs, is made of with voltage electrode 144 together drain electrode 141c, dielectric layer 141e.Common voltage electrode 144 is electrically connected to provide common voltage with the common voltage source (not shown), and pixel electrode 143 is electrically connected by contact window W and active member 141.In more detail, by contact window W, pixel electrode is electrically connected with the drain electrode 141c that consists of storage capacitors Cs, and then is electrically connected with active member 141.Storage capacitors Cs is mainly the pixel voltage that stores and keep pixel cell 140b.
According to above-described embodiment; the material of transparency conducting layer 143a can be indium tin oxide (indium tin oxide; ITO); and the material of metal level 143b is single metal, multiple layer metal or alloy; it can protect pel array 140 to avoid scraping damage, corrosion, and can block external light to restrain the generation of photocurrent.Yet the formation of pixel electrode 143 is not as limit.With reference to Fig. 3, Fig. 3 is in another embodiment of the present invention, the section of structure of pel array.In this embodiment, pixel electrode 143 only is transparency conducting layer, and the flatness layer 142a that metal level 146 then is positioned at a part upward contacts with the flatness layer 142b of another part to cover active member 141 and to expose pixel electrode 143.Pixel electrode 143 is electrically connected by contact window W and storage capacitors Cs, further says, pixel electrode 143 is electrically connected by contact window W and active member 141.
Again with reference to Fig. 2, a side of electrophoretic display medium layer 160 is the pixel electrode 143 of pel array 140, and its opposite side is electrode layer 170.The common voltage that the pixel voltage that provides by pixel electrode 143 and electrode layer 170 provide drives electrophoretic display medium layer 160 to reach the effect of demonstration.
According to Fig. 2 and relevant embodiment, comprise a plurality of leads 132, dielectric layer 141e, insulation course 145, flatness layer 142, common voltage pad 180, electrophoretic display medium layer 160, electrode layer 170 and overlayer 190 in substrate 10, the lead district 130 in the non-display area 120 of corresponding II-II ' profile line.Lead-in wire 132 tops that together electricity consumption bond pad 180 overlaps, have insulation course 145, flatness layer 142, completely cutting off the common voltage pad 180 above flatness layer 142, and the lead-in wire 132 that reduces common voltage pad 180 and lead district 130 too near and produce parasitic capacitance effect.Common voltage pad 180 can comprise transparency conducting layer 180a and metal level 180b, but not as limit.170 of common voltage pad 180 and electrode layers, more comprise conducting resinl 172, be positioned on the common voltage pad 180, and common voltage pad 180 is electrically connected by conducting resinl 172 and electrode layer 170.The material of conducting resinl 172 can be silver or other suitable conductive material.Electrode layer 170 covers common voltage pad 180 fully, and extends in the viewing area 110, so that common voltage pad 180 can provide common voltage to electrophoretic display medium layer 160.In non-display area 120, electrode layer 170 is the electrophoretic display medium layer 160 of cover part also.
In design, the part lead district 130 that overlaps of together electricity consumption bond pad 180 has a plurality of leads 132.Aforesaid lead-in wire 132 is electrically connected with the signal wire 140a that is connected to grid in the pel array.In other words, the lead-in wire 132 that overlaps of together electricity consumption bond pad 180 be with signal wire 140a in sweep trace be electrically connected.Because in the pel array, be linked to the signal wire 140a of source electrode usually all with complicated data-signal, in order to reduce the impact between signal, the lead district 130 that together electricity consumption bond pad 180 overlaps normally comprises the lead-in wire 132 that is electrically connected with sweep trace.Simultaneously by the blocking of insulation course 145 and flatness layer 142, further reduce lead-in wire 132 interference to each other of common voltage pad 180 and lead district 130.In addition, considering conducting resinl 172 has strike-through and partially pastes equal error in processing procedure, common voltage pad 180 optimum systems can only cover on the lead district 130 of a part, to avoid having influence on electronic component and stacking framework in the viewing area 110 because of the factor on the processing procedure.
According to above-described embodiment, the ability of common voltage to electrode layer 170 that provide is provided common voltage pad 180.Yet because common voltage pad 180 is disposed at lead district 130 tops of part, in order to make common voltage pad 180 can be electrically connected to smoothly the common voltage source of external circuit, electrophoresis type display panel can more comprise and turns line structure 182, it is positioned at the next door of common voltage pad 180, and together electricity consumption bond pad 180 is electrically connected.Turn line structure 182 and be arranged on outside the lead district 130, with the path as the common voltage source that common voltage pad 180 is provided.
Fig. 4 is in the electrophoresis type display panel 100 of Fig. 2 embodiment, along the section of structure of III-III ' profile line.According to above-described embodiment, with reference to Fig. 4, III-III ' profile line is corresponding common voltage pad 180 and the sectional view that turns line structure 182.Turn line structure 182 and comprise the first conductive layer 182a, the first insulation course 182b and conductive layer 182c.The first insulation course 182b covers the first conductive layer 182a, and the first insulation course 182b has the first opening op1 to expose the first conductive layer 182a.Conductive layer 182c is positioned on the first insulation course 182b, and is electrically connected the first conductive layer 182a by the first opening op1.According to Fig. 4, common voltage pad 180 is electrically connected to the conductive layer 182c that turns in the line structure 182.
In one embodiment of the invention, the the first conductive layer 182a that turns in the line structure 182 has common voltage, and conductive layer 182c is by the first conductive layer 182a, and then provide common voltage to common voltage pad 180, via conducting resinl 172 and electrode layer 170, at last common voltage is offered electrophoretic display medium layer 160 to drive again.Yet the structure that turns line structure 182 is not limited to this, in other embodiment, the first conductive layer 182a also can be with pixel cell 140b in common voltage electrode 144 be electrically connected.
Turn line structure 182 and more can comprise the second conductive layer 182d and the second insulation course 182e.The second conductive layer 182d is positioned at the first conductive layer 182a below, and the second insulation course 182e covers the second conductive layer 182d, and is disposed between the first conductive layer 182a and the second conductive layer 182d.The second insulation course 182e and the first insulation course 182b have the second opening op2 to expose the second conductive layer 182d.
In another embodiment of this case, with reference to Fig. 4, common voltage pad 180 is electrically connected to the conductive layer 182c that turns in the line structure 182.Conductive layer 182c is positioned on the first insulation course 182b, and is electrically connected the second conductive layer 182d by the second opening op2.The the second conductive layer 182d that turns in the line structure 182 has common voltage, and conductive layer 182c is by the second conductive layer 182d, and then provide common voltage to common voltage pad 180, via conducting resinl 172 and electrode layer 170, at last common voltage is offered electrophoretic display medium layer 160 to drive again.Simultaneously, common voltage also can be electrically connected common voltage electrode 144 with the required voltage of the storage capacitors Cs that offers pixel cell 140b via the first conductive layer 182a.For processing procedure convenient, conductive layer 182c can with Fig. 2 in pixel electrode 143 have identical formation, comprise transparency conducting layer 182c ' and metal level 182c ".Turn to comprise on the line structure 182 and turn line structure protective seam 186, and overlayer 190 is covered in and turns on the line structure protective seam 186.
In sum, the common voltage pad of electrophoretic display panel of the present invention is to be arranged on the lead district of part, and this kind design can be dwindled the required size of covering electrophoretic display medium layer and overlayer thereon, and then the use of minimizing consumptive material.In addition, by turning line structure, the common voltage pad can provide the electrode layer of common voltage to electrophoretic display medium layer top in the situation that the reduction signal mixes, so that common voltage can be used for driving pel array and electrophoretic display medium layer simultaneously.
Although the present invention is with embodiment openly as above, so it is not to limit the present invention, any those skilled in the art without departing from the spirit and scope of the present invention, when doing a little change and retouching, so protection scope of the present invention is as the criterion with claims.

Claims (12)

1. electrophoresis type display panel comprises:
One substrate, this substrate have a viewing area and are positioned at this viewing area non-display area on every side, and this non-display area comprises a lead district;
One pel array is arranged in this viewing area of this substrate, and this pel array comprises many signal line and a plurality of pixel cells that are electrically connected with described signal wire, and wherein said signal wire extends to this lead district from this viewing area;
A plurality of leads is arranged in this lead district of this non-display area and is electrically connected with described signal wire respectively;
One electrophoretic display medium layer is positioned at the top of this pel array;
One electrode layer is positioned at the top of this electrophoretic display medium layer;
Electricity consumption bond pad altogether is arranged in this non-display area and is arranged in this lead district of part, wherein this common voltage pad and described lead-in wire be electrically insulated and with this electrode layer electric connection; And
One overlayer is positioned at the top of this electrode layer.
2. electrophoresis type display panel as claimed in claim 1 is characterized in that, also comprises a conducting resinl, is positioned on this common voltage pad, and this common voltage pad is electrically connected by this conducting resinl and this electrode layer.
3. electrophoresis type display panel as claimed in claim 1 is characterized in that, this electrode layer covers this common voltage pad fully.
4. electrophoresis type display panel as claimed in claim 1 is characterized in that, this overlayer covers this electrophoretic display medium layer fully.
5. electrophoresis type display panel as claimed in claim 1, it is characterized in that, this non-display area more comprises an electrostatic discharging element district, this electrostatic discharging element district is positioned between this lead district and this viewing area, and this common voltage pad is arranged in this lead district and does not extend to this electrostatic discharging element district.
6. electrophoresis type display panel as claimed in claim 1 is characterized in that, this common voltage pad overlaps with the described lead-in wire of part.
7. electrophoresis type display panel as claimed in claim 6 is characterized in that, described signal wire comprises multi-strip scanning line and many data lines, and this common voltage pad overlaps with the described lead-in wire that is electrically connected to described sweep trace.
8. electrophoresis type display panel as claimed in claim 1 is characterized in that, comprises that also one turns line structure, is positioned at the next door of this common voltage pad and is electrically connected with this common voltage pad, and this turns line structure and comprises:
One first conductive layer;
One first insulation course covers this first conductive layer, wherein has one first opening in this first insulation course to expose this first conductive layer; And
One conductive layer is positioned on this first insulation course, and is electrically connected this first conductive layer by this first opening, and wherein this conductive layer and this common voltage pad are electrically connected.
9. electrophoresis type display panel as claimed in claim 8 is characterized in that, this turns line structure and also comprises:
One second conductive layer is positioned at this first conductive layer below; And
One second insulation course, cover this second conductive layer and be disposed at this first conductive layer and this second conductive layer between, wherein have one second opening in this second insulation course and this first insulation course exposing this second conductive layer, and this conductive layer more is electrically connected this second conductive layer by this second opening.
10. electrophoresis type display panel as claimed in claim 1 is characterized in that, each pixel cell comprises:
One active member;
One flatness layer covers this active member; And
One pixel electrode is positioned on this flatness layer, and wherein this pixel electrode and this active member are electrically connected.
11. electrophoresis type display panel as claimed in claim 10 is characterized in that, this pixel electrode comprises a metal level and a transparency conducting layer.
12. electrophoresis type display panel as claimed in claim 10 is characterized in that, also comprises a metal level, be positioned on this flatness layer of a part covering this active member, and this pixel electrode comprises a transparency conducting layer and contacts with this flatness layer of another part.
CN201210321916.8A 2012-07-06 2012-09-03 Electrophoresis type display panel Expired - Fee Related CN102854692B (en)

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TW101124447A TWI603140B (en) 2012-07-06 2012-07-06 Electrophoretic display
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CN103488333A (en) * 2013-06-11 2014-01-01 友达光电股份有限公司 Touch panel and manufacturing method of touch display panel
CN110571321A (en) * 2018-06-05 2019-12-13 群创光电股份有限公司 Electronic device

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Publication number Priority date Publication date Assignee Title
JP6634080B2 (en) 2014-11-07 2020-01-22 イー インク コーポレイション Electro-optical display applications

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TWI372282B (en) * 2008-08-25 2012-09-11 Au Optronics Corp Liquid crystal display panel and manufacturing method thereof
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CN101615604A (en) * 2008-06-27 2009-12-30 索尼株式会社 Semiconductor device and semiconductor integrated circuit
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CN103488333A (en) * 2013-06-11 2014-01-01 友达光电股份有限公司 Touch panel and manufacturing method of touch display panel
TWI489118B (en) * 2013-06-11 2015-06-21 Au Optronics Corp Touch panel and manufacturing method of touch display panel
CN103488333B (en) * 2013-06-11 2016-06-01 友达光电股份有限公司 Touch panel and manufacturing method of touch display panel
CN110571321A (en) * 2018-06-05 2019-12-13 群创光电股份有限公司 Electronic device

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