CN102314034A - Active element, pixel structure, driving circuit and display panel - Google Patents
Active element, pixel structure, driving circuit and display panel Download PDFInfo
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- CN102314034A CN102314034A CN2011102636395A CN201110263639A CN102314034A CN 102314034 A CN102314034 A CN 102314034A CN 2011102636395 A CN2011102636395 A CN 2011102636395A CN 201110263639 A CN201110263639 A CN 201110263639A CN 102314034 A CN102314034 A CN 102314034A
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Abstract
The invention provides an active element, a pixel structure, a driving circuit and a display panel. The pixel structure comprises a scanning cable, a data cable, the active element, a first insulation layer, a pixel electrode, a capacitor electrode and a second insulation layer. The active element comprises a grid, a gully, a source and a drain, wherein the scanning cable is electrically connected with the grid, and the source is electrically connected with the data cable. The first insulation layer is arranged between the grid and the gully. The pixel electrode is electrically connected with the drain. The capacitor electrode is arranged on the first insulation layer. The second insulation layer covers the first insulation layer and the capacitor electrode, and is arranged between the capacitor electrode and the drain.
Description
Technical field
The dot structure, driving circuit and the display panel that the present invention relates to a kind of active component and have this active component.
Background technology
Generally speaking, the dot structure of LCD comprises active component and pixel electrode.Active component is used as the on-off element of liquid crystal display.And in order to control other dot structure, can choose specific pixel via corresponding scanning line and data line usually, and through suitable operating voltage is provided, with demonstration to video data that should pixel.In addition, also comprise reservior capacitor (storage capacitor) in the dot structure, make dot structure have the function that voltage keeps.Just, reservior capacitor can store the above-mentioned operating voltage that applies, to keep the stability of dot structure display frame.
For reservior capacitor is set, generally can in dot structure, form capacitance electrode in dot structure.Yet,, will reduce the aperture opening ratio of dot structure if increase the area of capacitance electrode for the capacitance that increases reservior capacitor.
There has been at present a kind of dot structure that capacitance electrode is designed below data line, to increase the aperture opening ratio of dot structure.Yet because of capacitance electrode and the overlapping load (loading) that can increase dot structure of data line, therefore, this kind dot structure can increase display panel and drive required power supply and comparatively power consumption.
Summary of the invention
Dot structure, driving circuit and display panel that the present invention provides a kind of active component and has this active component, the design of its capacitance electrode can make dot structure have high aperture, and can not increase the load of dot structure.
The present invention proposes a kind of dot structure, comprises sweep trace, data line, first active component, first insulation course, pixel electrode, capacitance electrode and second insulation course.First active component comprises first grid, first raceway groove, first source electrode and first drain electrode, and wherein sweep trace and grid electrically connect, and source electrode and data line electrically connect.First insulation course is between the first grid and first raceway groove.The pixel electrode and first drain electrode electrically connect.Capacitance electrode is positioned on first insulation course.Second insulation course covers first insulation course and capacitance electrode, and second insulation course is between the capacitance electrode and first drain electrode.
The present invention proposes a kind of display panel, and it has viewing area and non-display area, and viewing area and non-display area do not overlap each other, and said display panel comprises a plurality of aforesaid dot structures and at least one driving circuit.Dot structure is arranged in the viewing area.Driving circuit is arranged in non-display area, and wherein driving circuit comprises at least one second active component, and it comprises second grid, second raceway groove, second source electrode and second drain electrode.Second grid is positioned on first insulation course, and second insulation course covers second grid.Second raceway groove is positioned on first insulation course of second grid top.Second source electrode and second drain electrode are positioned on second raceway groove.
The present invention proposes a kind of driving circuit, comprises first grid; First insulation course covers first grid; Second grid is positioned on second insulation course; Second insulation course covers first insulation course and second grid; First raceway groove is arranged on second insulation course of first grid top; Second raceway groove is arranged on second insulation course of second grid top; First source electrode and second drain electrode are positioned on first raceway groove; And second source electrode and second the drain electrode, be positioned on second raceway groove.
The present invention proposes a kind of active component, and it comprises grid, raceway groove, first insulation course, source electrode, drain electrode, capacitance electrode and second insulation course.First insulation course is between grid and raceway groove.Source electrode and drain electrode are positioned at the raceway groove top.Capacitance electrode is positioned on first insulation course.Second insulation course covers first insulation course and capacitance electrode, and between capacitance electrode and drain electrode.
Based on above-mentioned, because capacitance electrode of the present invention is positioned on first insulation course, and second insulation course is between capacitance electrode and drain electrode, thereby capacitance electrode and drain electrode formation electric capacity.Owing to can use thin insulation course between capacitance electrode and the drain electrode, therefore the area that capacitance electrode can reduce the photic zone that takies dot structure is set, thereby can make dot structure have high aperture.In addition, because of the capacitive coupling portion of capacitance electrode of the present invention not and the overlapping setting of data line, so the design of this kind capacitance electrode can not increase the load of dot structure.
For letting the above-mentioned feature and advantage of the present invention can be more obviously understandable, hereinafter is special lifts embodiment, and conjunction with figs. elaborates as follows.
Description of drawings
Figure 1A is the schematic top plan view according to the dot structure of the embodiment of the invention.
Figure 1B is the diagrammatic cross-section of Figure 1A along profile line A-A '.
Fig. 2 A is the schematic top plan view according to the dot structure of the embodiment of the invention.
Fig. 2 B is the diagrammatic cross-section of Fig. 2 A along profile line A-A '.
Fig. 3 A is the schematic top plan view according to the dot structure of the embodiment of the invention.
Fig. 3 B is the diagrammatic cross-section of Fig. 3 A along profile line A-A '.
Fig. 4 is the schematic top plan view according to the dot structure of the embodiment of the invention.
Fig. 5 is the diagrammatic cross-section according to the dot structure of the embodiment of the invention.
Fig. 6 is the diagrammatic cross-section according to the display panel of the embodiment of the invention.
Fig. 7 is the schematic top plan view of display panel according to another embodiment of the present invention.
Fig. 8 is dot structure and the diagrammatic cross-section of driving circuit in the display panel of Fig. 7.
Fig. 9 is the diagrammatic cross-section according to dot structure in the display panel of another embodiment and driving circuit.
Figure 10 is the synoptic diagram according to the driving circuit of the embodiment of the invention.
Figure 11 is part active component and the diagrammatic cross-section of capacitor in the driving circuit of Figure 10.
Figure 12 is according to the part active component in the driving circuit of another embodiment and the diagrammatic cross-section of capacitor.
Description of reference numerals
100,200: substrate 102,104: insulation course
106,170,212: passivation layer 110a, 110a ': connecting portion
110b, 110b ': capacitive coupling portion 150,160: bed course
160a: lower electrode 160b: upper strata bed course
202: polysilicon layer 202c: channel region
202s: source area 202d: drain region
Insulation course 206 in 204: the first: grid
208: auxiliary 210: the second insulation courses of dielectric layer
400: display panel 402: viewing area
404: non-display area SL, SL ': sweep trace
DL, DL '; Data line CL, CL ': capacitance electrode
U, U ': pixel region A: alignment pattern
G, G ', G1, G2: grid
CH, CH ', CH1, CH2: raceway groove
OM, OM1, OM2: ohmic contact layer
S, S ', SM, S1, S2: source electrode
D, D ', DM, D1, D2: drain electrode
PE, PE ', 214: pixel electrode
V, V ', V1～V3: contact window
DR: driving circuit T, T ', T1, T2: active component
C1, C2: capacitor Eb: bottom electrode
Et: top electrode E1: first electrode
E2: the second electrode E3: third electrode
Gn, Gn-1, Gn+1: sweep trace Vss: data line
CK: time signal line H, L, XCK: signal wire
M1～M7: active component
Embodiment
First embodiment
Figure 1A is the schematic top plan view according to the dot structure of the embodiment of the invention.Figure 1B is the diagrammatic cross-section of Figure 1A along profile line A-A '.Please be simultaneously with reference to Figure 1A and Figure 1B, the dot structure of present embodiment comprises the sweep trace SL that is arranged on the substrate 100, data line DL, active component T, first insulation course 102, pixel electrode PE, capacitance electrode CL and second insulation course 104.
Have pixel region U on the substrate 100, and in a pixel region U dot structure is set.The material of substrate 100 can be glass, quartz, organic polymer or light tight/reflecting material (for example: conductive material, wafer, pottery or other material applicatory) or other material applicatory.Sweep trace SL and data line DL are arranged on the substrate 100.
Sweep trace SL and data line DL hand over more each other, and (cross over) is provided with.In other words, the bearing of trend of the bearing of trend of data line DL and sweep trace SL is not parallel, and preferably, the bearing of trend of data line DL is vertical with the bearing of trend of sweep trace SL.In addition, sweep trace SL belongs to different retes with data line DL, and accompanies first insulation course 102 and second insulation course 104 between data line DL and the sweep trace SL.Based on the consideration of electric conductivity, sweep trace SL and data line DL generally are to use metal material.Yet, the invention is not restricted to this, according to other embodiment, sweep trace SL and data line DL also can use other conductive materials.For example: the oxides of nitrogen of the nitride of alloy, metal material, the oxide of metal material, metal material or other suitable material) or metal material and other lead the stack layer of material.
Active component T comprises grid G, raceway groove CH, source S and drain D.Grid G and sweep trace SL electrically connect, and source S and data line DL electrically connect.According to present embodiment, grid G is arranged on the substrate 100, and grid G is to belong to same rete with sweep trace SL, and the material of the material of grid G and sweep trace SL is same or similar.Raceway groove CH is positioned on second insulation course 104 of grid G top.The material of raceway groove CH for example is amorphous silicon, polysilicon, metal-oxide semiconductor (MOS) or other semiconductor materials.Source S and drain D are arranged on the both sides of raceway groove CH.In the present embodiment, source S and drain D are to belong to same rete with data line DL, in other words, be to form with same rete patterning, and the material of the material of source S and drain D and data line DL are same or similar.In an embodiment, if raceway groove CH adopts amorphous silicon material, then can also comprise ohmic contact layer OM between raceway groove CH and source S and the drain D, its material can be through doped amorphous silicon.
Capacitance electrode CL is positioned at the grid G top substantially and is positioned at the drain D below.In other words, the rete of capacitance electrode CL is between the rete of the rete of grid G and drain D.According to present embodiment, capacitance electrode CL comprises connecting portion 110a and the 110b of capacitive coupling portion.The overlapping part of 110b of capacitive coupling portion and drain D is the reservior capacitor that constitutes this dot structure.In other words, the 110b of capacitive coupling portion is the bottom electrode as reservior capacitor, and drain D is the top electrode as reservior capacitor.In addition, connecting portion 110a is connected with the 110b of capacitive coupling portion, and the perimeter that connecting portion 110a extends to substrate 110 is to be electrically connected to common voltage (Vcom).Similarly, based on the consideration of electric conductivity, capacitance electrode CL generally is to use metal material.Yet, the invention is not restricted to this, according to other embodiment, capacitance electrode CL also can use other conductive materials.For example: the oxides of nitrogen of the nitride of alloy, metal material, the oxide of metal material, metal material or other suitable material) or metal material and other lead the stack layer of material.
According to present embodiment, the bearing of trend of the connecting portion 110a of capacitance electrode CL is parallel with the bearing of trend of sweep trace SL.The bearing of trend of the 110b of capacitive coupling portion of capacitance electrode CL is vertical with connecting portion 110a.In the present embodiment, for each dot structure, the 110b of capacitive coupling portion is that extend the position at the place from connecting portion 110a toward sweep trace SL.In addition, according to present embodiment, capacitance electrode CL and part of grid pole G are overlapping.More detailed, the partly overlapping setting of the 110b of capacitive coupling portion of capacitance electrode CL and grid G.In addition, the connecting portion 110a of capacitance electrode CL and data line DL also overlap.
In the present embodiment, the overlapping part at data line DL and capacitance electrode CL can further be provided with bed course 150.Said bed course 150 for example is to constitute (for example the channel material layer 160a of the bed course 160 among Fig. 2 B and Ohmic contact material layer 160b are constituted mode) by channel material layer (indicate) and Ohmic contact material layer (indicating).The channel material layer is when forming raceway groove CH, to define simultaneously, and the Ohmic contact material layer is when forming ohmic contact layer OM, to define simultaneously.Bed course 150 is set between data line DL and capacitance electrode CL can reduces both overlapping parts generation electric leakages.Yet the present invention does not limit the material of bed course 150.According to other embodiment, bed course 150 can also adopt other materials.
In the present embodiment; Shown in Figure 1B; Between grid G and raceway groove CH, accompany first insulation course 102 and second insulation course 104, and first insulation course 102 between grid G and raceway groove CH and second insulation course 104 are as the gate insulator of active component T.In addition, between capacitance electrode CL (110b of capacitive coupling portion) and drain D, accompany second insulation course 104, be positioned at second insulation course 104 between capacitance electrode CL (110b of capacitive coupling portion) and the drain D as capacitance dielectric layer.The material of first, second insulation course 102,104 comprises monox, silicon nitride, silicon oxynitride or other suitable dielectric material respectively.Particularly, the thickness of second insulation course 104 is less than the thickness of first insulation course 102.At this, the thickness of second insulation course 104 (capacitance dielectric layer) for example is about 700～1500 dusts, and totalling (gate insulator) thickness of first insulation course 102 and second insulation course 104 for example is about 3300～5100 dusts.
The drain D of pixel electrode PE and active component T electrically connects.Pixel electrode PE can be the combination of transparent pixels electrode, reflective pixel electrode or transparent pixels electrode and reflective pixel electrode.The material of said transparent pixels electrode can comprise metal oxide, for example is indium tin oxide, indium-zinc oxide, aluminium tin-oxide, aluminium zinc oxide, indium germanium zinc oxide or other suitable oxide or the above-mentioned stack layer of the two at least.The material of reflective pixel electrode for example is the metal material with highly reflective.
According to present embodiment, connecting portion 110a and the pixel electrode PE of above-mentioned capacitance electrode CL overlap.In addition, the pixel electrode PE that present embodiment illustrated also comprises a plurality of alignment pattern A, and it for example is the orientation slit.Yet, the invention is not restricted to this.According to other embodiment, pixel electrode PE can also not be provided with alignment pattern A.
In addition, in the present embodiment, shown in Figure 1B, between pixel electrode PE and active component T (source S and drain D), also comprise being provided with passivation layer 106,170.Passivation layer 106,170 has contact window V, so that pixel electrode PE and drain D electrically connect.Passivation layer 106 generally can be described as protective seam again, and its material can be monox, silicon nitride, silicon oxynitride or other suitable dielectric material.Passivation layer 170 can be described as flatness layer, and its material for example is inorganic insulating material, organic insulation or organic photo material or the like.
What deserves to be mentioned is that in the dot structure shown in Figure 1A, data line DL is arranged on the edge of pixel region U, sweep trace SL, active component T and capacitance electrode CL are the centres that is arranged at pixel region U.Yet, the present invention not restricting data line DL, sweep trace SL, active component T and capacitance electrode CL in the position of pixel region U.
According to embodiments of the invention, can also comprise in data line DL and the overlapping part of capacitance electrode CL bed course 150 is set.Bed course 150 can be to define simultaneously in forming raceway groove CH and ohmic contact layer OM.The purpose that bed course 150 is set is the situation that can avoid data line DL and capacitance electrode CL to be short-circuited herein or to leak electricity.
In addition, in the dot structure of Figure 1A and Figure 1B, the 110b of capacitive coupling portion of capacitance electrode CL also overlaps with overlapping setting of raceway groove CH or/and grid G for example.Because the 110b of capacitive coupling portion and the overlapping setting of raceway groove CH of capacitance electrode CL, thereby raceway groove CH can reduce the situation of generation short circuit between the 110b of capacitive coupling portion and the drain D of capacitance electrode CL or electric leakage.
According to other embodiment, capacitance electrode can be not and gate overlap yet, shown in Fig. 2 A and Fig. 2 B.Fig. 2 A is the schematic top plan view according to the dot structure of the embodiment of the invention, and Fig. 2 B is the diagrammatic cross-section of Fig. 2 A along profile line A-A '.
Please with reference to Fig. 2 A and Fig. 2 B, the embodiment of 2A and Fig. 2 B is similar with the embodiment of Figure 1A and Figure 1B, therefore in this embodiment with Figure 1A and Figure 1B components identical with identical symbolic representation, and no longer repeat to give unnecessary details.The embodiment difference of the embodiment of Fig. 2 A and Fig. 2 B and Figure 1A and Figure 1B be capacitance electrode CL not with grid G/overlapping setting of raceway groove CH.More detailed, the 110b of capacitive coupling portion of capacitance electrode CL not with grid G/overlapping setting of raceway groove CH.
In addition and since the 110b of capacitive coupling portion of capacitance electrode CL not with grid G/overlapping setting of raceway groove CH, thereby bed course 160 can further be set in the overlapping part of drain D and capacitance electrode CL.Bed course 160 comprises bed course 160a of lower floor and upper strata bed course 160b.The material of the bed course 160a of lower floor for example is identical with raceway groove CH material, and the material of upper strata bed course 160b for example is identical with the material of ohmic contact layer OM.In the overlapping part of drain D and capacitance electrode CL bed course 160 is set and prevents that drain D and capacitance electrode CL from producing electric leakage or situation of short circuit at this place.
In the above-described embodiments, capacitance electrode CL is between grid G and drain D, and the 110b of capacitive coupling portion of capacitance electrode CL and the overlapping part of drain D are the reservior capacitors that constitutes this dot structure.Because the grid G of active component T and drain D whereabouts just are non-photic zones originally.Therefore, compared to the design of the capacitance electrode of traditional reservior capacitor, utilize the design of capacitance electrode CL of the present invention can make dot structure have high aperture opening ratio.In addition; The present invention is arranged at capacitance electrode CL the stray capacitance (Cgd) that also can further reduce between grid G and the drain D between grid and the drain D; Thereby reduce the coupling (coupling) of grid to drain electrode, and improve picture quality, for example reduce flicker (flicker) phenomenon.
In addition, in the present embodiment, the thickness of second insulation course 104 (capacitance dielectric layer) is merely 700～1500 dusts, and it is far below the thickness of first insulation course 102 and second insulation course 104 (gate insulator) addition.Because the thickness of second insulation course 104 (capacitance dielectric layer) is enough thin, even therefore reduce the capacitance electrode area for the aperture opening ratio that increases dot structure, this reservior capacitor still can have enough storage capacitors values.
In addition, because capacitance electrode CL is between grid G and drain D, and covered grid G partly.Therefore, capacitance electrode CL also can stop the light (for example being the light of backlight module) from substrate 100 back sides, to reduce the said light leakage current effect that is caused for raceway groove CH backlight.
In above-mentioned two embodiment, the 110b of capacitive coupling portion of capacitance electrode CL is arranged on the position near active component T.So, the invention is not restricted to this.According to other embodiment, the 110b of capacitive coupling portion of capacitance electrode CL also can be arranged on the part away from active component T, shown in Fig. 3 A and Fig. 3 B.
Fig. 3 A is the schematic top plan view according to the dot structure of the embodiment of the invention, and Fig. 3 B is the diagrammatic cross-section of Fig. 3 A along profile line A-A '.Please with reference to Fig. 3 A and Fig. 3 B, the embodiment of 3A and Fig. 3 B is similar with the embodiment of Fig. 3 A and Fig. 3 B, therefore in this embodiment with Fig. 3 A and Fig. 3 B components identical with identical symbolic representation, and no longer repeat to give unnecessary details.The embodiment difference of the embodiment of Fig. 3 A and Fig. 3 B and Fig. 2 A and Fig. 2 B is that active component T is arranged on the edge of pixel region U, and capacitance electrode CL is arranged on the centre of pixel region U.Therefore, capacitance electrode CL is not arranged on the part near active component T.
In addition, in the present embodiment since the 110b of capacitive coupling portion of capacitance electrode CL not can with grid G/overlapping setting of raceway groove CH, thereby bed course 160 can further be set in the overlapping part of drain D and capacitance electrode CL.Bed course 160 comprises bed course 160a of lower floor and upper strata bed course 160b.The material of the bed course 160a of lower floor for example is identical with raceway groove CH material, and the material of upper strata bed course 160b for example is identical with the material of ohmic contact layer OM.In the overlapping part of drain D and capacitance electrode CL bed course 160 is set and prevents that drain D and capacitance electrode CL from producing electric leakage or situation of short circuit at this place.
Except the dot structure of above-mentioned several kinds of forms, the present invention is provided with the dot structure that also can be applicable to other kinds form between grid G and the drain D with capacitance electrode CL, and is as shown in Figure 4.The dot structure of Fig. 4 is similar with the dot structure of Fig. 1, and difference mainly is to be that the dot structure of Fig. 4 is the dot structure of horizontally set, and sweep trace is across the centre at pixel region.Therefore, in the dot structure of Fig. 4, be to represent with similar sign with Fig. 1 components identical.
Please with reference to Fig. 4, the dot structure of this embodiment is arranged among the pixel region U ', and dot structure comprises sweep trace SL ', data line DL ', active component T ', pixel electrode PE ' and capacitance electrode CL '.
Sweep trace SL ' and data line DL ' hand over more each other, and (cross over) is provided with.In other words, the bearing of trend of the bearing of trend of data line DL ' and sweep trace SL ' is not parallel, and preferably, the bearing of trend of data line DL ' is vertical with the bearing of trend of sweep trace SL '.The material of sweep trace SL ' and data line DL ' can be same or similar with the material of the sweep trace SL of above-mentioned Fig. 1 and data line DL.
Active component T ' comprises grid G ', raceway groove CH ', source S ' and drain D '.Grid G ' electrically connect source S with sweep trace SL ' ' electrically connect with data line DL '.Similarly, grid G ', raceway groove CH ', source S ' and drain D ' material can be same or similar with the described grid G of Fig. 1, raceway groove CH, source S and drain D.
Capacitance electrode CL ' is positioned at grid G ' and drain D ' between.According to present embodiment, capacitance electrode CL ' comprises connecting portion 110a ' and the 110b ' of capacitive coupling portion.110b ' of capacitive coupling portion and drain D ' overlapping part is the reservior capacitor that constitutes this dot structure.In other words, the 110b ' of capacitive coupling portion is the bottom electrode as reservior capacitor, drain D ' be top electrode as reservior capacitor.Connecting portion 110a ' is connected with the 110b ' of capacitive coupling portion, and connecting portion 110a ' electrically connects with common voltage (Vcom).The material of capacitance electrode CL ' can be same or similar with the material of the capacitance electrode CL of above-mentioned Fig. 1.
Similarly, the bearing of trend of the connecting portion 110a ' of capacitance electrode CL ' is parallel with the bearing of trend of sweep trace SL '.The bearing of trend of the 110b ' of capacitive coupling portion of capacitance electrode CL ' is vertical with connecting portion 110a '.In the present embodiment, for each dot structure, the 110b ' of capacitive coupling portion is that extend the position at the place from connecting portion 110a ' toward sweep trace SL '.In addition, according to present embodiment, capacitance electrode CL ' and grid G ' partly overlapping.More detailed, 110b ' of capacitive coupling portion and the grid G of capacitance electrode CL ' ' setting of overlapping.In addition, the connecting portion 110a ' of capacitance electrode CL ' overlaps with data line DL '.
In the present embodiment, the overlapping part at data line DL ' and capacitance electrode CL ' can further be provided with bed course 150 '.Said bed course 150 ' for example is to be made up of channel material layer (not indicating) and Ohmic contact material layer (not indicating).Bed course 150 ' is set between data line DL ' and capacitance electrode CL ' can reduces both overlapping parts generation electric leakages.
The drain D of pixel electrode PE ' and active component T ' ' electrically connect.Pixel electrode PE ' can be the combination of transparent pixels electrode, reflective pixel electrode or transparent pixels electrode and reflective pixel electrode.
Similarly, in the dot structure of Fig. 4, in grid G ' and raceway groove CH ' between also comprise and be provided with first insulation course and second insulation course.In capacitance electrode CL ' (110b ' of capacitive coupling portion) and drain D ' between also comprise second insulation course.The thickness of second insulation course for example is about 700～1500 dusts, and the gross thickness that adds of first insulation course and second insulation course for example is about 3300～5100 dusts.Between pixel electrode PE ' and active component T ' (source S ' and drain D '), also comprise and be provided with passivation layer.Passivation layer has contact window V ', so that pixel electrode PE ' and drain D ' electrically connect.
Between in the embodiment of Fig. 4, capacitance electrode CL ' is positioned at grid G ' and drain D ', and 110b ' of capacitive coupling portion and the drain D of capacitance electrode CL ' ' overlapping part is the reservior capacitor that constitutes this dot structure.Because the grid G of active component T ' ' and drain D ' whereabouts just is non-photic zone originally.Therefore, compared to the design of the capacitance electrode of traditional reservior capacitor, utilize the design of the capacitance electrode CL ' of present embodiment can make dot structure have high aperture opening ratio.In addition; The stray capacitance (Cgd) that also can further reduce grid G between the present invention is arranged at grid G with capacitance electrode CL ' ' and drain D ' between ' and drain D '; Thereby reduce the coupling (coupling) of grid to drain electrode, and improve picture quality, for example reduce flicker (flicker) phenomenon.
In addition, in the present embodiment, because the thickness of second insulation course is enough thin, even reduce capacitance electrode CL ' area for the aperture opening ratio that increases dot structure, this reservior capacitor still can have enough storage capacitors values.In addition, because capacitance electrode CL ' is positioned at grid G ' and drain D ' between, and covered grid G partly '.Therefore, capacitance electrode CL ' also can stop the light from backlight module, to reduce the said light leakage current effect that is caused for raceway groove CH ' backlight.
In the dot structure of above-mentioned several embodiment, its active component all is to be that example is explained with the bottom grid film transistor.So, the invention is not restricted to this.According to other embodiment, dot structure of the present invention also can adopt the top grid type thin film transistor (TFT), is described below.
Fig. 5 is the diagrammatic cross-section according to the dot structure of the embodiment of the invention.Please with reference to Fig. 5; The active component of this dot structure comprises the polysilicon layer 202 that is arranged on the substrate 200, grid 206, first insulation course 204, auxiliary dielectric layer 208, second insulation course 210, source S M and drain D M, capacitance electrode 220 and pixel electrode 214, and wherein polysilicon layer 202, grid 206, source S M and drain D M constitute active component.
Polysilicon layer 202 has source area 202s, drain region 202d and channel region 202c.Source area 202s and drain region 202d for example are the doped region of doped N-type ion or the doped region of doping P type ion.
First insulation course 204 covers polysilicon layer 202 and substrate 200.The material of first insulation course 204 comprises monox, silicon nitride, silicon oxynitride or other suitable dielectric material.
Grid 206 is arranged on first insulation course 204 of channel region 202c top.Grid 206 electrically connects with sweep trace (not illustrating), and the material of grid 206 for example is that oxides of nitrogen or other suitable material or metal material and other of oxide, the metal material of nitride, the metal material of metal, alloy, metal material led the stack layer of material.
Auxiliary dielectric layer 208 cover gate 206 and first insulation course 204.The material of auxiliary dielectric layer 208 comprises monox, silicon nitride, silicon oxynitride or other suitable dielectric material.
Capacitance electrode 220 is arranged on the auxiliary dielectric layer 208.The material of capacitance electrode 220 for example is that oxides of nitrogen or other suitable material or metal material and other of oxide, the metal material of nitride, the metal material of metal, alloy, metal material led the stack layer of material.
Second insulation course 210 covers capacitance electrode 220.The material of second insulation course 210 comprises monox, silicon nitride, silicon oxynitride or other suitable dielectric material.
Source S M and drain D M are arranged on second insulation course 210.Source S M and data line (not illustrating) electrically connect.The material of source S M and drain D M for example is that oxides of nitrogen or other suitable material or metal material and other of oxide, the metal material of nitride, the metal material of metal, alloy, metal material led the stack layer of material.In addition, source S M and drain D M see through contact window V1, V2 respectively and with source area 202s and drain region 202d electric connection.In other words, contact window V1, V2 have run through second insulation course 210, auxiliary dielectric layer 208 and first insulation course 204 so that source S M and drain D M can see through contact window V1, V2 respectively with source area 202s and drain region 202d electric connection.
Particularly, capacitance electrode 220 is between grid 206 and drain D M.And capacitance electrode 220 is the reservior capacitor that constitutes this dot structure with the overlapping part of drain D M.In other words, capacitance electrode 220 is the bottom electrodes as reservior capacitor, and drain D M is the top electrode as reservior capacitor.Because between grid 206 and drain D M, and grid 206 just is non-printing opacity with drain D M script to present embodiment with capacitance electrode 220.Therefore the area that capacitance electrode can reduce the photic zone that takies dot structure is set herein.In other words, compared to the design of the capacitance electrode of traditional reservior capacitor, utilize the design of the capacitance electrode 220 of present embodiment can make dot structure have high aperture opening ratio.In addition, the present invention is arranged at the stray capacitance (Cgd) that also can further reduce between grid 206 and the drain D M between grid 206 and the drain D M with capacitance electrode 220, thereby can improve picture quality.
In addition, passivation layer 212 covers source S M and drain D M.The material of passivation layer 212 can be inorganic insulating material (for example being silicon nitride, monox, silicon oxynitride), organic insulation, organic photo material or other materials.
Pixel electrode 214 is arranged on the passivation layer 212, and sees through contact window V3 and drain D M electric connection.In other words, contact window V3 runs through passivation layer 212, so that pixel electrode 214 sees through contact window V3 and drain D M electrically connects.
Fig. 6 is the diagrammatic cross-section according to the display panel of the embodiment of the invention.Please with reference to Fig. 6, display panel comprises first substrate 310, pel array 312, second substrate 320 and display medium 330.Pel array 312 is arranged on first substrate 310, and pel array 312 is to be made up of a plurality of dot structure, and this dot structure can be the dot structure shown in the arbitrary embodiment of above-mentioned Fig. 1 to Fig. 5.Second substrate 320 can be simple blank substrate, colored optical filtering substrates or is provided with the substrate of electrode layer.Display medium 330 can be liquid crystal molecule, electrophoretic display medium or other medium applicatory.
Comprehensive the above, present embodiment is arranged at capacitance electrode between grid and the drain electrode, so the area that capacitance electrode can reduce the photic zone that takies dot structure is set herein.Therefore, compared to the design of the capacitance electrode of traditional reservior capacitor, utilize the design of the capacitance electrode of embodiment can make dot structure have high aperture opening ratio.
In addition, present embodiment is arranged at the stray capacitance (Cgd) that also can further reduce between grid and the drain electrode between grid and the drain electrode with capacitance electrode, thereby can improve picture quality.In addition, because the thickness of second insulation course is enough thin, even therefore reduce the capacitance electrode area for the aperture opening ratio that increases dot structure, this reservior capacitor still can have enough storage capacitors values.
Moreover, because capacitance electrode is between grid and drain electrode, and covered the raceway groove of part.Therefore, capacitance electrode also can stop the light (for example being the light of backlight module) from substrate back, and is said backlight for light leakage current effect that raceway groove was caused to reduce.In addition, because of the capacitive coupling portion of the capacitance electrode of present embodiment not and the overlapping setting of data line, so the design of this kind capacitance electrode can not increase the load of dot structure.
Second embodiment
Fig. 7 is the schematic top plan view of display panel according to another embodiment of the present invention.Fig. 8 is the dot structure that is arranged in pixel region and the diagrammatic cross-section of driving circuit in the display panel of Fig. 7.Please with reference to Fig. 7 and Fig. 8; The display panel 400 of present embodiment has viewing area 402 and non-display area 404; And in the viewing area 402 of display panel 400, have a plurality of pixel region U, in the non-display area 404 of display panel 400, have at least one driving circuit DR.Non-display area 404 is roughly around viewing area 402.Driving circuit DR can be positioned at the side, both sides, three sides of viewing area 402 or on every side.Present embodiment is that the both sides that are positioned at viewing area 402 with driving circuit DR are that example is explained, but the invention is not restricted to this.
Hold the above, a plurality of pixel region U of viewing area 402 are arrayed, and correspondence is provided with a dot structure among each pixel region U.Therefore, the dot structure that in viewing area 402, has a plurality of arrayed.
The dot structure that is arranged in each pixel region U can be like described any dot structure of previous first embodiment.In other words, the dot structure among each pixel region U can be dot structure, the dot structure of Fig. 4 or the dot structure of Fig. 5 of dot structure, Fig. 3 A and Fig. 3 B of dot structure, Fig. 2 A and Fig. 2 B of Figure 1A and Figure 1B.At this, in order to specify the display panel of present embodiment, the dot structure among each pixel region U is that the dot structure with Fig. 2 A and Fig. 2 B is that example is explained, but not as limit.
In the present embodiment, the dot structure among each pixel region U comprises the first active component T1 and pixel electrode PE.The first active component T1 comprises first grid G1, the first raceway groove CH1, first source S 1 and first drain D 1.First grid G1 and sweep trace (not being illustrated in Fig. 8) electrically connect, and first source S 1 electrically connects with data line (not being illustrated in Fig. 8).The material of above-mentioned first grid G1, the first raceway groove CH1, first source S 1 and first drain D 1 is identical or similar with the described grid G of previous first embodiment, raceway groove CH, source S and drain D respectively, therefore in this no longer repeat specification.In addition, between the first raceway groove CH1 and first source S, 1/ first drain D 1, also ohmic contact layer OM1 can be set further.In addition, first drain D 1 of the pixel electrode PE and the first active component T1 electrically connects.
What deserves to be mentioned is; As shown in Figure 8; Between the first grid G1 and the first raceway groove CH1, accompany first insulation course 102 and second insulation course 104, so first insulation course 102 between the first grid G1 and the first raceway groove CH1 and second insulation course 104 are the gate insulators as the first active component T1.The material of first, second insulation course 102,104 comprises monox, silicon nitride, silicon oxynitride or other suitable dielectric material respectively.Totalling (gate insulator) thickness of first insulation course 102 and second insulation course 104 for example is about 3300～5100 dusts.
In addition, can further comprise capacitance electrode (capacitive coupling portion) 110b among each pixel region U.The rete of capacitance electrode (capacitive coupling portion) 110b is between the rete of the rete of first grid G1 and first drain D 1.Capacitance electrode (capacitive coupling portion) 110b and first drain D, 1 overlapping part are the reservior capacitors that constitutes this dot structure.In other words, capacitance electrode (capacitive coupling portion) 110b is the bottom electrode as reservior capacitor, and first drain D 1 is the top electrode as reservior capacitor.And second insulation course 104 that is positioned between capacitance electrode (capacitive coupling portion) 110b and first drain D 1 is the capacitance dielectric layers as reservior capacitor.At this, the thickness of second insulation course 104 (capacitance dielectric layer) for example is about 700～1500 dusts.
The driving circuit DR that is arranged in the non-display area 404 for example is gate driver circuit, source electrode drive circuit or comprises gate driver circuit and source electrode drive circuit.Particularly, driving circuit DR comprises at least one second active component T2, and this second active component T2 comprises second grid G2, the second raceway groove CH2, second source S 2 and second drain D 2.The material of the second above-mentioned raceway groove CH2, second source S 2 and second drain D 2 is identical or similar with the described raceway groove CH of previous first embodiment, source S and drain D respectively; The material of above-mentioned second grid G2 for example is same or similar with the material of the described capacitance electrode of previous first embodiment, therefore in this no longer repeat specification.In addition, between the second raceway groove CH2 and second source S, 2/ second drain D 2, also ohmic contact layer OM2 can be set further.
What deserves to be mentioned is that as shown in Figure 8, second grid G2 is positioned on first insulation course 102, and second insulation course 104 covers second grid G2.Therefore, between the second grid G2 and the second raceway groove CH2, be to accompany second insulation course 104, thereby second insulation course 104 is the gate insulators as the second active component T2.At this, the thickness of second insulation course 104 for example is about 700～1500 dusts.
According to present embodiment, said driving circuit DR also further comprises at least one capacitor.Said capacitor comprises bottom electrode Eb and top electrode Et.Bottom electrode Eb is positioned on first insulation course 102, and second insulation course 104 covers bottom electrode Eb.At this, bottom electrode E1 for example be with dot structure in capacitance electrode (capacitive coupling portion) 110b belong to same rete.In addition, top electrode Et is positioned on second insulation course 104 of bottom electrode Eb top.At this, top electrode Et belongs to same rete with first source S, 1/ first drain D 1 of the first active component T1 and second source S, 2/ second drain D 2 of the second active component T2.Therefore, in the present embodiment, the capacitor of driving circuit DR is to be made up of top electrode Et, bottom electrode Eb and second insulation course 104 (capacitance dielectric layer).
Hold the above, in the driving circuit DR of present embodiment, the second active component T2 be with second insulation course 104 as gate insulator, because of the thickness of second insulation course 104 is enough thin, therefore can improve the drain current of the second active component T2.Base this, present embodiment can the overall efficiency of keeping existing active component dwindle down the area of the second active component T2 in advance, and then make this driving circuit DR can be applied in the narrow frame display panel.
In addition, in the driving circuit of present embodiment, the capacitor that is designed is as capacitance dielectric layer with second insulation course 104.Because the thickness of second insulation course 104 is enough thin, therefore can improve the storage capacitors value of capacitor.Similarly, present embodiment can be under the prerequisite of the storage capacitors value of keeping existing capacitor and is dwindled the area of capacitor (bottom electrode Eb and top electrode Et), and then makes this driving circuit DR can be applied in the narrow frame display panel.
Fig. 9 is the diagrammatic cross-section according to dot structure in the display panel of another embodiment and driving circuit.The embodiment of Fig. 9 is similar with the embodiment of above-mentioned Fig. 8, so components identical is with identical symbolic representation, and no longer repeat specification.The embodiment of Fig. 9 and the embodiment of Fig. 8 part inequality are that the capacitor of driving circuit DR comprises the first electrode E1, the second electrode E2 and third electrode E3.At this, the second electrode E2 promptly is equal to the bottom electrode Eb of Fig. 8, and third electrode E3 promptly is equal to the top electrode Et of Fig. 8.And present embodiment also is provided with the first electrode E1 below the second electrode E2.Therefore, the first electrode E1 is positioned on the substrate 100, and first insulation course 102 covers the first electrode E1.The second electrode E2 is positioned on first insulation course 102, and second insulation course 104 covers the second electrode E2.Third electrode E3 is positioned on second insulation course 104 of second electrode E2 top.
In other words, the capacitor of present embodiment is that the capacitor by two parallel connections constitutes, and therefore can improve the storage capacitors value of capacitor.Similarly; Present embodiment can be under the prerequisite of the storage capacitors value of keeping existing capacitor and is dwindled the area of capacitor (the first electrode E1, the second electrode E2 and third electrode E3), and then makes this driving circuit DR can be applied in the narrow frame display panel.
The 3rd embodiment
Figure 10 is the synoptic diagram according to the driving circuit of the embodiment of the invention.Figure 11 is a wherein active component and the diagrammatic cross-section of a capacitor wherein in the driving circuit of Figure 10.Please with reference to Figure 10, the driving circuit of present embodiment for example is the driving circuit DR that can be applied to display panel shown in Figure 7, and the driving circuit DR of present embodiment is to be example with the gate driver circuit, but the invention is not restricted to this.In the present embodiment, driving circuit comprises a plurality of active component M1～M7 and a plurality of capacitor C1～C2.In addition; Sweep trace Gn electrically connects active element M7, M6 and capacitor C2; Sweep trace Gn+1, Gn-1 electrically connect active element M1, M4 respectively, and data line Vss electrically connects active element M2, and time signal line CK electrically connects active element M7 and capacitor C1; Signal wire H, L electrically connect active element M4, M1 respectively, and signal wire XCK electrically connects active element M5.
Hold the above, in the driving circuit of Figure 10, active component M1～M7 is made up of the described first active component T1 of Figure 11 and the second active component T2.In other words, the part among active component M1～M7 is to be made up of the described first active component T1 of Figure 11, and the another part among active component M1～M7 is to be made up of the described second active component T2 of Figure 11.
Please with reference to Figure 11, the first active component T1 comprises first grid G1, the first raceway groove CH1, first source S 1 and first drain D 1.In addition, between the first raceway groove CH1 and first source S, 1/ first drain D 1, also ohmic contact layer OM1 can be set further.In addition; Between the first grid G1 and the first raceway groove CH1, accompany first insulation course 102 and second insulation course 104, so first insulation course 102 between the first grid G1 and the first raceway groove CH1 and second insulation course 104 are the gate insulators as the first active component T1.The material of first, second insulation course 102,104 comprises monox, silicon nitride, silicon oxynitride or other suitable dielectric material respectively.Totalling (gate insulator) thickness of first insulation course 102 and second insulation course 104 for example is about 3300～5100 dusts.
The second active component T2 comprises second grid G2, the second raceway groove CH2, second source S 2 and second drain D 2.In addition, between the second raceway groove CH2 and second source S, 2/ second drain D 2, also ohmic contact layer OM2 can be set further.At this, second grid G2 is positioned on first insulation course 102, and second insulation course 104 covers second grid G2.Therefore, between the second grid G2 and the second raceway groove CH2, be to accompany second insulation course 104, thereby second insulation course 104 is the gate insulators as the second active component T2.The thickness of second insulation course 104 for example is about 700～1500 dusts.
In addition, capacitor C1, C2 comprise bottom electrode Eb and top electrode Et respectively.Bottom electrode Eb is positioned on first insulation course 102, and second insulation course 104 covers bottom electrode Eb.Top electrode Et is positioned on second insulation course 104 of bottom electrode Eb top.Therefore, capacitor C1, C2 are made up of top electrode Et, bottom electrode Eb and second insulation course 104 (capacitance dielectric layer).
Hold the above; In the driving circuit of present embodiment; The first active component T1 be with first insulation course 102 and second insulation course 104 as gate insulator, therefore the first active component T1 can be applied in the active component that needs thicker gate insulator in the driving circuit.In addition, the second active component T2 be with second insulation course 104 as gate insulator, because of the thickness of second insulation course 104 is enough thin, therefore can improve the drain current of the second active component T2.Base this, present embodiment can the overall efficiency of keeping existing active component dwindle down the area of the second active component T2 in advance, and then dwindle this driving circuit entire area.
In addition, be as capacitance dielectric layer with second insulation course 104 because of capacitor C1, C2.Because the thickness of second insulation course 104 is enough thin, therefore can improve the storage capacitors value of capacitor.Similarly, present embodiment can be under the prerequisite of the storage capacitors value of keeping existing capacitor and is dwindled the area of capacitor (bottom electrode Eb and top electrode Et), so dwindle this driving circuit can entire area.
Figure 12 is according to the part active component in the driving circuit of another embodiment and the diagrammatic cross-section of capacitor.The embodiment of Figure 12 is similar with the embodiment of above-mentioned Figure 11, so components identical is with identical symbolic representation, and no longer repeat specification.The embodiment of Figure 12 and the embodiment of Figure 11 part inequality are that the capacitor C1 of driving circuit, C2 comprise the first electrode E1, the second electrode E2 and third electrode E3.At this, the second electrode E2 promptly is equal to the bottom electrode Eb of Figure 11, and third electrode E3 promptly is equal to the top electrode Et of Figure 11.And present embodiment also is provided with the first electrode E1 below the second electrode E2.Therefore, the first electrode E1 is positioned on the substrate 100, and first insulation course 102 covers the first electrode E1.The second electrode E2 is positioned on first insulation course 102, and second insulation course 104 covers the second electrode E2.Third electrode E3 is positioned on second insulation course 104 of second electrode E2 top.
In other words, the capacitor of present embodiment is that the capacitor by two parallel connections constitutes, and therefore can improve the storage capacitors value of capacitor.Similarly, present embodiment can be under the prerequisite of the storage capacitors value of keeping existing capacitor and is dwindled the area of capacitor (the first electrode E1, the second electrode E2 and third electrode E3), and then the entire area of dwindling this driving circuit.
Though the present invention discloses as above with embodiment; Right its is not in order to qualification the present invention, and those of ordinary skill in any affiliated technical field is not breaking away from the spirit and scope of the present invention; When can doing a little change and retouching, so protection scope of the present invention defines and is as the criterion when looking claim.
Claims (26)
1. a dot structure is positioned on the substrate, comprising:
Sweep trace and data line;
First active component comprises first grid, first raceway groove, first source electrode and first drain electrode, and wherein this sweep trace and this first grid electrically connect, and this first source electrode and this data line electrically connect;
Pixel electrode electrically connects with this first drain electrode;
First insulation course is between this first grid and this first raceway groove;
Capacitance electrode is positioned on this first insulation course; And
Second insulation course covers this first insulation course and this capacitance electrode, and this second insulation course is between this capacitance electrode and this first drain electrode.
2. dot structure as claimed in claim 1, wherein this capacitance electrode comprises:
Capacitive coupling portion constitutes reservior capacitor with this first drain electrode overlapping; And
Connecting portion is connected with this capacitive coupling portion.
3. dot structure as claimed in claim 2, wherein the bearing of trend of this connecting portion is parallel with the bearing of trend of this sweep trace.
4. dot structure as claimed in claim 2, wherein this connecting portion and this pixel electrode are overlapped at least.
5. dot structure as claimed in claim 4, wherein this connecting portion and this data line are overlapped at least.
6. dot structure as claimed in claim 2, wherein this capacitive coupling portion is vertical with this connecting portion substantially.
7. dot structure as claimed in claim 1; Wherein the thickness of this second insulation course is less than the thickness of this first insulation course; And the thickness of this second insulation course is about 700～1500 dusts, and the thickness totalling of this first insulation course and this second insulation course is about 3300～5100 dusts.
8. dot structure as claimed in claim 1; Wherein this substrate has pixel region; This data line is arranged on the edge of this pixel region, and this sweep trace, this first active component and this capacitance electrode are arranged at the centre of this pixel region, and wherein this pixel electrode has a plurality of alignment pattern.
9. dot structure as claimed in claim 1 also comprises passivation layer, and between this pixel electrode and this first active component, wherein this passivation layer has contact window, and this pixel electrode electrically connects with this first drain electrode through this contact window.
10. dot structure as claimed in claim 1, wherein this capacitance electrode is not overlapping with this first grid.
11. dot structure as claimed in claim 1, wherein this capacitance electrode and this first grid or this first ditch trace overlap.
12. dot structure as claimed in claim 1 also comprises passivation layer, between this pixel electrode and this first active component.
13. dot structure as claimed in claim 12 also comprises auxiliary dielectric layer, between this first grid and this second insulation course, wherein this capacitance electrode is located between this auxiliary dielectric layer and this second insulation course.
14. a display panel, it has viewing area and non-display area, and this display panel comprises:
A plurality of dot structures as claimed in claim 1 are arranged in this viewing area; And
At least one driving circuit is arranged in this non-display area, and wherein this driving circuit comprises at least one second active component, and this second active component comprises:
Second grid is positioned on this first insulation course, and this second insulation course covers this second grid;
Second raceway groove is positioned on this first insulation course of this second grid top; And
Second source electrode and second drain electrode are positioned on this second raceway groove.
15. display panel as claimed in claim 14 also comprises at least one capacitor, is arranged in this non-display area, wherein this capacitor comprises:
Bottom electrode is positioned on this first insulation course, and this second insulation course covers this bottom electrode; And
Top electrode is positioned on this second insulation course of this bottom electrode top.
16. display panel as claimed in claim 14 also comprises at least one capacitor, is arranged in this non-display area, wherein this capacitor comprises:
First electrode, and this first insulation course covers this first electrode;
Second electrode is positioned on this first insulation course, and this second insulation course covers this second electrode; And
Third electrode is positioned on this second insulation course of this second electrode top.
17. a driving circuit comprises:
First grid;
First insulation course covers this first grid;
Second grid is positioned on this first insulation course;
Second insulation course covers this first insulation course and this second grid;
First raceway groove is arranged on this second insulation course of this first grid top;
Second raceway groove is arranged on this second insulation course of this second grid top;
First source electrode and second drain electrode are positioned on this first raceway groove; And
Second source electrode and second drain electrode are positioned on this second raceway groove.
18. driving circuit as claimed in claim 17; Wherein the thickness of this second insulation course is less than the thickness of this first insulation course; And the thickness of this second insulation course is about 700～1500 dusts, and the thickness totalling of this first insulation course and this second insulation course is about 3300～5100 dusts.
19. driving circuit as claimed in claim 17 also comprises at least one capacitor, this capacitor comprises:
Bottom electrode is positioned on this first insulation course, and this second insulation course covers this bottom electrode; And
Top electrode is positioned on this second insulation course of this bottom electrode top.
20. driving circuit as claimed in claim 17 also comprises at least one capacitor, this capacitor comprises:
First electrode, and this first insulation course covers this first electrode;
Second electrode is positioned on this first insulation course, and this second insulation course covers this second electrode; And
Third electrode is positioned on this second insulation course of this second electrode top.
21. an active component comprises:
Grid;
Raceway groove;
First insulation course is between this grid and this raceway groove;
Source electrode and drain electrode are positioned at this raceway groove top;
Capacitance electrode is positioned on this first insulation course; And
Second insulation course covers this first insulation course and this capacitance electrode, and this second insulation course is between this capacitance electrode and this drain electrode.
22. active component as claimed in claim 21, wherein this capacitance electrode comprises capacitive coupling portion, and this capacitive coupling portion and this drain electrode overlapping constitute reservior capacitor.
23. active component as claimed in claim 21, wherein this capacitance electrode not with this gate overlap.
24. active component as claimed in claim 21, wherein this capacitance electrode and this grid or this ditch trace overlap.
25. active component as claimed in claim 21, wherein this raceway groove is positioned at this grid top.
26. active component as claimed in claim 21 also comprises auxiliary dielectric layer, between this grid and this second insulation course, wherein this capacitance electrode is located between this auxiliary dielectric layer and this second insulation course, and this raceway groove is positioned at this grid below.
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| CN201110263639.5A CN102314034B (en) | 2010-09-26 | 2011-09-07 | Active element, pixel structure, driving circuit and display panel |
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| CN201010293365XA CN102064180A (en) | 2010-09-26 | 2010-09-26 | Active element, pixel structure and display panel |
| CN201110263639.5A CN102314034B (en) | 2010-09-26 | 2011-09-07 | Active element, pixel structure, driving circuit and display panel |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103760702A (en) * | 2013-11-20 | 2014-04-30 | 友达光电股份有限公司 | Display panel |
| CN103943635A (en) * | 2014-03-28 | 2014-07-23 | 京东方科技集团股份有限公司 | Array substrate and display device |
| CN107851582A (en) * | 2015-09-02 | 2018-03-27 | Ｎｉｓｓｈａ株式会社 | The manufacture method of active component and active component |
| CN108663862A (en) * | 2014-02-25 | 2018-10-16 | 群创光电股份有限公司 | Display panel |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI415268B (en) * | 2011-09-22 | 2013-11-11 | Au Optronics Corp | Thin film transistor device and pixel structure and driving circuit of display panel |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6411347B1 (en) * | 1998-12-19 | 2002-06-25 | Lg. Philips Lcd Co., Ltd. | Storage capacitor in a liquid crystal display and a method of manufacturing thereof |
| US20070004070A1 (en) * | 2005-06-30 | 2007-01-04 | Lg.Philips Lcd Co., Ltd. | Array substrate for liquid crystal display and method for fabricating the same |
| US20070103610A1 (en) * | 2005-11-09 | 2007-05-10 | Lg.Philips Lcd Co., Ltd. | Array substrate for liquid crystal display device and method of fabricating the same |
| CN101030588A (en) * | 2007-04-24 | 2007-09-05 | 友达光电股份有限公司 | Array base plate and its production |
-
2010
- 2010-09-26 CN CN201010293365XA patent/CN102064180A/en active Pending
-
2011
- 2011-09-07 CN CN201110263639.5A patent/CN102314034B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6411347B1 (en) * | 1998-12-19 | 2002-06-25 | Lg. Philips Lcd Co., Ltd. | Storage capacitor in a liquid crystal display and a method of manufacturing thereof |
| US20070004070A1 (en) * | 2005-06-30 | 2007-01-04 | Lg.Philips Lcd Co., Ltd. | Array substrate for liquid crystal display and method for fabricating the same |
| US20070103610A1 (en) * | 2005-11-09 | 2007-05-10 | Lg.Philips Lcd Co., Ltd. | Array substrate for liquid crystal display device and method of fabricating the same |
| CN101030588A (en) * | 2007-04-24 | 2007-09-05 | 友达光电股份有限公司 | Array base plate and its production |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103760702A (en) * | 2013-11-20 | 2014-04-30 | 友达光电股份有限公司 | Display panel |
| CN103760702B (en) * | 2013-11-20 | 2016-08-10 | 友达光电股份有限公司 | Display panel |
| CN108663862A (en) * | 2014-02-25 | 2018-10-16 | 群创光电股份有限公司 | Display panel |
| CN108663862B (en) * | 2014-02-25 | 2020-02-07 | 群创光电股份有限公司 | Display panel |
| CN103943635A (en) * | 2014-03-28 | 2014-07-23 | 京东方科技集团股份有限公司 | Array substrate and display device |
| CN103943635B (en) * | 2014-03-28 | 2017-12-05 | 京东方科技集团股份有限公司 | Array base palte and display device |
| CN107851582A (en) * | 2015-09-02 | 2018-03-27 | Ｎｉｓｓｈａ株式会社 | The manufacture method of active component and active component |
| CN107851582B (en) * | 2015-09-02 | 2019-02-22 | Ｎｉｓｓｈａ株式会社 | The manufacturing method of active component and active component |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102314034B (en) | 2014-05-14 |
| CN102064180A (en) | 2011-05-18 |
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