CN102854683B - Metal oxide in-plane switching liquid crystal display panel and manufacturing method thereof - Google Patents

Metal oxide in-plane switching liquid crystal display panel and manufacturing method thereof Download PDF

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Publication number
CN102854683B
CN102854683B CN201210362681.7A CN201210362681A CN102854683B CN 102854683 B CN102854683 B CN 102854683B CN 201210362681 A CN201210362681 A CN 201210362681A CN 102854683 B CN102854683 B CN 102854683B
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tft
electrode
common electrode
lattice
sweep trace
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CN102854683A (en
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焦峰
王海宏
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Nanjing CEC Panda LCD Technology Co Ltd
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Nanjing CEC Panda LCD Technology Co Ltd
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Abstract

The invention provides a metal oxide in-plane switching liquid crystal display panel and a manufacturing method thereof. The metal oxide in-plane switching liquid crystal display panel comprises a scanning line, a signal line, pixel units, a common electrode line and a grid-shaped common electrode, wherein the signal line and the scanning line are crossed; the pixel units are subjected to crossed limitation of the scanning line and the signal line, and each pixel unit comprises a thin film transistor and a grid-shaped pixel electrode. Each thin film transistor comprises a thin film transistor (TFT) grid electrode electrically connected with the scanning line, a TFT source electrode electrically connected with a signal line connecting line, a TFT drain electrode electrically connected with the pixel electrode and a TFT channel region located between the TFT source electrode and the TFT drain electrode and positioned on a bottom layer. The common electrode line is parallel to the scanning line, the grid-shaped common electrode is electrically connected with the common electrode line, and the grid-shaped common electrode and the grid-shaped pixel electrodes are crossed in a pixel region. A metal oxide serves as a TFT channel semiconductor, the source electrode, the drain electrode, the grid-shaped pixel electrode or the grid-shaped common electrode to be used, the TFT driving capability can be improved, and a process can be simplified.

Description

A kind of metal oxide XY switch type display panels and manufacture method thereof
Technical field
The present invention relates to a kind of metal oxide XY switch type display panels and manufacture method thereof.
Background technology
Traditional CRT monitor relies on the phosphor powder that cathode-ray tube (CRT) electron emission clashes on screen to show image, but the principle of liquid crystal display is completely different.Conventionally, liquid crystal display (LCD) device has upper substrate and infrabasal plate, have each other certain intervals and mutually over against.Be formed on a plurality of electrodes on two substrates mutually over against.Liquid crystal is clipped between upper substrate and infrabasal plate.Voltage is applied on liquid crystal by the electrode on substrate, thereby the arrangement that then changes liquid crystal molecule according to acted on voltage shows image, because liquid crystal indicator utilizing emitted light not as mentioned above, and it needs light source to show image.Therefore, liquid crystal indicator has and is positioned at liquid crystal panel backlight below.Thereby control from the light quantity of backlight incident and show image according to the arrangement of liquid crystal molecule.As shown in Figure 1, between upper strata polaroid 101He lower floor polaroid 109, accompany color membrane substrates 104, common electrode 105, liquid crystal layer 106 and array base palte 107, liquid crystal molecule is the material with refractive index and dielectric constant anisotropy.On array base palte 107, form pixel electrode 108, thin film transistor (TFT) (TFT) 114, array sub-pixel 111, sweep trace 110, signal wire 112 etc.Signal wire 112 is connected to the drain electrode of TFT, and pixel electrode 108 is connected to source class, and sweep trace 110 is connected to grid.The light that backlight 113 sends, through lower polaroid 109, becomes the polarized light with certain polarization direction.Thin film transistor (TFT) 114 is controlled institute's making alive between pixel electrode 108, and this voltage acts on the polarization direction that liquid crystal is controlled polarized light, polarized light sees through the monochromatic polarized light of the rear formation of corresponding color film 102, if polarized light can penetrate upper strata polaroid 101, demonstrates corresponding color; Electric field intensity is different, and the deflection angle of liquid crystal molecule is also different, and the light intensity seeing through is different, and the brightness of demonstration is also different.The combination of the different light intensity by three kinds of colors of RGB shows motley image.
Along with the continuous increase of liquid crystal display size, the frequency of driving circuit improves constantly in recent years, and existing amorphous silicon film transistor mobility is difficult to meet the demands.The thin film transistor (TFT) of high mobility has polycrystalline SiTFT and metal oxide thin-film transistor, although wherein polycrystalline SiTFT is studied early, its homogeneity is poor, complex manufacturing technology; Metal oxide thin-film transistor is than the advantage of polycrystalline SiTFT: the mobility of oxide material is high.So do not need to adopt crystallization technology, save processing step, improved evening ratio and qualification rate; Technique is simple, adopts traditional sputter and wet-etching technique just passable, does not need to adopt plasma reinforced chemical vapour deposition and dry lithography.In addition, current laser crystallization technology does not also reach the requirement of large size panel, and oxide transistor is not because need laser crystallization, there is no the restriction of size.Due to the advantage of these several respects, metal oxide thin-film transistor enjoys people to pay close attention to, and becomes the focus of research in recent years.
Summary of the invention
The object of the present invention is to provide metal oxide XY switch type display panels and the manufacture method thereof of a kind of TFT of raising driving force and simplification technique.
The invention provides a kind of metal oxide XY switch type display panels, comprising: sweep trace; Signal wire, intersects in length and breadth with sweep trace; Pixel cell, by sweep trace and signal wire, intersect and limit, described each pixel cell comprises thin film transistor (TFT) and lattice-shaped pixel electrode, the TFT grid that described thin film transistor (TFT) comprises and sweep trace is electrically connected, the TFT source electrode being electrically connected with signal line linking line, the TFT being electrically connected with pixel electrode drain and the TFT channel region between TFT source electrode and TFT drain, and described TFT channel region is positioned at bottom; Common electrode wire, be arranged in parallel with sweep trace; Lattice-shaped common electrode, is electrically connected with common electrode wire; This lattice-shaped common electrode and grid pixel electrode be the staggered pixel region that is positioned at all.
The present invention provides again a kind of manufacture method of metal oxide XY switch type display panels, comprises the steps:
The first step: form source-drain electrode connecting line figure and the first insulation course with metal oxide layer respectively at substrate, source-drain electrode connecting line is TFT channel region;
Second step: form signal wire, sweep trace, common electrode wire at the first insulation course with metal and the pattern of the TFT grid that is connected with sweep trace;
The 3rd step: form the second insulation course on the basis that forms second step pattern, and form contact hole graph on the relevant position of signal wire, sweep trace, common electrode wire and source-drain electrode connecting line;
The 4th step: on the second insulation course with transparent ITO layer form signal line linking line, the TFT source electrode being connected with signal line linking line, TFT channel region, TFT drain, with TFT drain the lattice-shaped pixel electrode that is connected, be connected with common electrode wire and with the staggered lattice-shaped common electrode of lattice-shaped pixel electrode.
The present invention provides again a kind of manufacture method of metal oxide XY switch type display panels, comprises the steps:
The first step: form source-drain electrode connecting line figure and the first insulation course with metal oxide layer respectively at substrate, source-drain electrode connecting line is TFT channel region;
Second step: form signal wire, sweep trace, common electrode wire, the lattice-shaped common electrode being connected with common electrode wire at the first insulation course with metal and the pattern of the TFT grid that is connected with sweep trace;
The 3rd step: form the second insulation course on the basis that forms second step pattern, and form contact hole graph on the relevant position of signal wire, sweep trace, common electrode wire and source-drain electrode connecting line;
The 4th step: on the second insulation course with transparent ITO layer form signal line linking line, the TFT source electrode being connected with signal line linking line, TFT raceway groove, TFT drain, with TFT drain be connected and with the staggered lattice-shaped pixel electrode of lattice-shaped common electrode.
The present invention is usingd metal oxide as TFT channel semiconductor, source-drain electrode, lattice-shaped pixel electrode or the use of lattice-shaped common electrode, can improve TFT driving force and simplify technique.
Accompanying drawing explanation
Fig. 1 is the structural representation that available liquid crystal shows (LCD) device;
Fig. 2 is the structural representation of display panels the first embodiment of the present invention;
Fig. 2 A is that display panels shown in Fig. 1 is at the cut-open view of A-A ' direction;
Fig. 3 is the schematic diagram of the first step manufacture method of display panels shown in Fig. 1;
Fig. 3 A is the cut-open view that Fig. 3 is shown in A-A ' direction;
Fig. 4 is the schematic diagram of the second step manufacture method of display panels shown in Fig. 1;
Fig. 4 A is the cut-open view that Fig. 4 is shown in A-A ' direction;
Fig. 5 is the schematic diagram of the 3rd one-step preparation method of display panels shown in Fig. 1;
Fig. 5 A is the cut-open view that Fig. 5 is shown in A-A ' direction;
Fig. 6 is the schematic diagram of the 4th one-step preparation method of display panels shown in Fig. 1;
Fig. 6 A is the cut-open view that Fig. 6 is shown in A-A ' direction;
Fig. 7 is the structural representation of display panels the second embodiment of the present invention;
Fig. 7 A is that display panels shown in Fig. 7 is at the cut-open view of A-A ' direction;
Fig. 8 is the schematic diagram of the first step manufacture method of display panels shown in Fig. 7;
Fig. 8 A is the cut-open view that Fig. 8 is shown in A-A ' direction;
Fig. 9 is the schematic diagram of the second step manufacture method of display panels shown in Fig. 7;
Fig. 9 A is the cut-open view that Fig. 9 is shown in A-A ' direction;
Figure 10 is the schematic diagram of the 3rd one-step preparation method of display panels shown in Fig. 7;
Figure 10 A is the cut-open view that Figure 10 is shown in A-A ' direction;
Figure 11 is the schematic diagram of the 4th one-step preparation method of display panels shown in Fig. 7;
Figure 11 A is the cut-open view that Figure 11 is shown in A-A ' direction.
Embodiment
Below in conjunction with the drawings and specific embodiments, further illustrate the present invention, should understand these embodiment is only not used in and limits the scope of the invention for the present invention is described, after having read the present invention, those skilled in the art all fall within the application's claims limited range to the modification of the various equivalent form of values of the present invention.
The present invention is a kind of metal oxide XY switch type display panels, XY switch type IPS(In-Plane Switching) the two poles of the earth all on same, make that liquid crystal molecule planar rotates technology.
Fig. 2 to Fig. 6 A is the schematic diagram of first embodiment of the invention.
As Fig. 2 and Fig. 2 A, metal oxide XY switch type display panels of the present invention comprises: signal wire 60, the sweep trace 70 crisscross with signal wire 60, by signal wire 60 and sweep trace 70, intersect a plurality of pixel cells that limit, the common electrode wire 80 parallel with sweep trace 70, lattice-shaped common electrode 90, the first insulation course 50 and the second insulation course being connected with common electrode wire 80.
Wherein, signal wire 60, sweep trace 70, common electrode wire 80 are positioned at the middle layer of display panels, and described lattice-shaped common electrode 90 is positioned at the top layer of display panels.
Each pixel cell comprises: film crystal pipe unit, the lattice-shaped pixel electrode 30 being connected with film crystal pipe unit.
Wherein, film crystal pipe unit comprises: the TFT grid 71 being connected with sweep trace 70, and the TFT source electrode 21 that is electrically connected of signal wire 60, the TFT channel region 20 between TFT source electrode 21 and TFT drain electrode 22, the TFT that is electrically connected with lattice-shaped pixel electrode 30 drain 22, and TFT channel region 20 is positioned at bottom.
Described TFT source electrode 21, TFT drain electrode 22, lattice-shaped pixel electrode 30 and lattice-shaped common electrode 80 are made by transparent ITO, and described TFT channel region 20 is made by metal oxide; And TFT source electrode 21, TFT drain electrode 22, lattice-shaped pixel electrode 30 and lattice-shaped common electrode 90 are all positioned at the top layer of this display panels.
Described lattice-shaped pixel electrode 30 forms with lattice-shaped common electrode 90 simultaneously, the COM electrode that this lattice-shaped common electrode 90 is this display panels, and the lattice-shaped common electrode 90 that is positioned at top layer is crisscross arranged at pixel region with the lattice-shaped pixel electrode 30 with layer, lattice-shaped common electrode 90 is positioned at same with lattice-shaped pixel electrode 30, and liquid crystal molecule is planar rotated.
Described signal wire 60 comprises secondary signal line and the signal line linking line 10 between first signal line and secondary signal line of first signal line, adjacent pixel unit, and this signal line linking line 10 is made with lattice-shaped common electrode 90, lattice-shaped pixel electrode 30, TFT source electrode 21 and TFT drain electrode 22 5 simultaneously.
The manufacturing step of display panels of the present invention is as follows:
The first step: as Fig. 3 and Fig. 3 A, form source-drain electrode connecting line 20 figures and the first insulation course 50 respectively in glass substrate (not shown) with metal oxide layer, source-drain electrode connecting line 20 is TFT channel region.
The material of metal oxide is IZO or IGZO, and thickness is 450-550 dust, is preferably 500 dusts.
The material of the first insulation course 50 can be SiNx or SiO2, and thickness is 1500-2500 dust, is preferably 2000 dusts.
Second step: as Fig. 4 and Fig. 4 A, form signal wire 604, sweep trace 70, common electrode wire 80 at the first insulation course 50 with metal and the pattern of the TFT grid 71 that is connected with sweep trace 70.
The material of metal is Cr or Al or Cu, and thickness is 3500-4500 dust, is preferably 4000 dusts.
The 3rd step: as Figure 10 and Figure 10 A, on the basis that forms second step pattern, form the second insulation course 100, and form contact hole graph on the relevant position of signal wire 60, sweep trace 70, common electrode wire 80 and source-drain electrode connecting line 20, be specially: at signal wire 60 two ends, form the first contact hole 101 and the second contact hole 102; In common electrode wire 80, form the 3rd contact hole 103 and the 4th contact hole 104; End at sweep trace 70 forms the 5th contact hole 105; At the two ends of source-drain electrode connecting line 20, form respectively the 6th contact hole 106 and the 7th contact hole 107.
The material of the second insulation course 100 is SiNx or SiO 2, thickness is 500-1500 dust, is preferably 1000 dusts.
The 4th step: as Figure 11 and Figure 11 A, on the second insulation course 100, with transparent ITO layer, form signal line linking line 10, the TFT source electrode 21 being connected with signal line linking line 10, TFT channel region, TFT drain electrode 22, with the TFT drain electrode 22 lattice-shaped pixel electrodes 30 that are connected, be connected lattice-shaped common electrode 90 and common electrode wire terminal connecting line 110 with common electrode wire 80, and the sweep trace terminal connecting line 120 being connected with sweep trace 70, concrete generation type is: signal line linking line 10 is connected to by transparent ITO layer between first contact hole 101 of signal wire 60 of signal wire 60 and adjacent pixel unit and the second contact hole 102 and forms, TFT source electrode 21 is connected to and is formed between the second contact hole 102 of signal wire 60 and the 6th contact hole 106 ' of source-drain electrode connecting line 20 ' by transparent ITO layer, TFT drain electrode 22 is connected to the 7th contact hole 107 of lattice-shaped pixel electrode 30 and source-drain electrode connecting line 20 by transparent ITO layer, TFT raceway groove is between TFT source electrode 21 and TFT drain electrode 22, lattice-shaped pixel electrode 30 is formed in pixel region by transparent ITO layer, in lattice-shaped common electrode 90 is connected to common electrode wire 80 the 3rd contact hole 103 by transparent ITO and pixel region, form, common electrode wire terminal connecting line 110 is formed by transparent ITO layer connection the 3rd contact hole 103, sweep trace terminal connecting line 120 is formed by transparent ITO layer connection the 5th contact hole 104.
Described lattice-shaped pixel electrode 30 is staggered in pixel region with lattice-shaped common electrode 90.
Transparent ITO layer thickness is 450-550 dust, is preferably 500 dusts.
Fig. 7 to Figure 11 A is the schematic diagram of second embodiment of the invention.
The second embodiment of the present invention and the above-mentioned first embodiment key distinction are: the first embodiment lattice-shaped common electrode 90 is positioned at top layer; And the lattice-shaped common electrode 90 of this second embodiment is not to be positioned at top layer.
As Fig. 7 and Fig. 7 A, metal oxide XY switch type display panels of the present invention comprises: signal wire 60 ', the sweep trace 70 ' crisscross with signal wire 60 ', by signal wire 60 ' and sweep trace 70 ', intersect a plurality of pixel cells that limit, the common electrode wire 80 ' parallel with sweep trace 70 ', lattice-shaped common electrode 90 ', the first insulation course 50 ' and the second insulation course 100 ' being connected with common electrode wire 80 '.
Wherein, signal wire 60 ', sweep trace 70 ', common electrode wire 80 ' and lattice-shaped common electrode 90 ' are positioned at the middle layer of display panels.
Each pixel cell comprises: film crystal pipe unit, the lattice-shaped pixel electrode 30 ' being connected with film crystal pipe unit.
Wherein, film crystal pipe unit comprises: the TFT grid 71 ' being connected with sweep trace 70 ', and the TFT source electrode 21 ' that is electrically connected of signal wire 60 ', be positioned at TFT channel region 20 ' between TFT source electrode 21 ' and TFT drain electrode 22 ', the TFT that is electrically connected with lattice-shaped pixel electrode 30 ' drains 22 ', and TFT channel region 20 ' is positioned at bottom.
Described TFT source electrode 21 ', TFT drain electrode 22 ' and lattice-shaped pixel electrode 30 ' are made by transparent ITO, and described TFT channel region 20 ' is made by metal oxide; And TFT source electrode 21 ', TFT drain electrode 22 ' and lattice-shaped pixel electrode 30 ' are all positioned at the top layer of this display panels.
The COM electrode that lattice-shaped common electrode 90 ' is this display panels, and lattice-shaped common electrode 90 is crisscross arranged at pixel region with the lattice-shaped pixel electrode 30 ' that is positioned at top layer, lattice-shaped common electrode 90 ' is positioned at same with lattice-shaped pixel electrode 30 ', and liquid crystal molecule is planar rotated.
Described signal wire 60 ' comprises secondary signal line and the signal line linking line 10 ' between first signal line and secondary signal line of first signal line, adjacent pixel unit, and this signal line linking line 10 ' lattice-shaped pixel electrode 30 ', TFT source electrode 21 ' and TFT drain electrode 22 ' five are made simultaneously.Below for the manufacturing step of display panels the second embodiment of the present invention is as follows:
The first step: as Fig. 8 and Fig. 8 A, form source-drain electrode connecting line 20 ' figure and the first insulation course 50 ' respectively in glass substrate (not shown) with metal oxide layer, source-drain electrode connecting line 20 ' is TFT channel region.
The material of metal oxide is IZO or IGZO, and thickness is 450-550 dust, is preferably 500 dusts.The material of the first insulation course 50 ' can be SiNx or SiO2, and thickness is 1500-2500 dust, is preferably 2000 dusts.
Second step: as Fig. 9 and Fig. 9 A, form signal wire 60 ', sweep trace 70 ', common electrode wire 80 ', the lattice-shaped common electrode 90 ' being connected with common electrode wire 80 ' at the first insulation course 50 ' with metal and the pattern of the TFT grid 71 ' that is connected with sweep trace 70 '.
The material of metal is Cr or Al or Cu, and thickness is 3500-4500 dust, is preferably 4000 dusts.
The 3rd step: as Figure 10 and Figure 10 A, on the basis that forms second step pattern, form the second insulation course 100 ', and form contact hole graph on the relevant position of signal wire 60 ', sweep trace 70 ', common electrode wire 80 ' and source-drain electrode connecting line 20 ', be specially: at signal wire 60 ' two ends, form the first contact hole 101 ' and the second contact hole 102 '; End in common electrode wire 80 ' forms the 3rd contact hole 103 '; End at sweep trace 70 ' forms the 4th contact hole 104 '; At the two ends of source-drain electrode connecting line 20 ', form respectively the 5th contact hole 105 ' and the 6th contact hole 106 '.
The material of the second insulation course 100 ' is SiNx or SiO 2, thickness is 500-1500 dust, is preferably 1000 dusts.
The 4th step: as Figure 11 and Figure 11 A, upper with transparent ITO layer formation signal line linking line 10 ' at the second insulation course 100 ', the TFT source electrode 21 ' being connected with signal line linking line 10 ', TFT raceway groove, TFT drain electrode 22 ', with TFT drain electrode 22 ' the lattice-shaped pixel electrode 30 ' being connected, the common electrode wire terminal connecting line 110 ' being connected with common electrode wire 80 ', and the sweep trace terminal connecting line 120 ' being connected with sweep trace 70 ', concrete generation type is: signal line linking line 10 ' is connected to by transparent ITO layer between first contact hole 101 ' of signal wire 60 of signal wire 60 ' and adjacent pixel unit and the second contact hole 102 ' and forms, TFT source electrode 21 ' is connected to and is formed between the second contact hole 102 ' of signal wire 60 ' and the 5th contact hole 105 ' of source-drain electrode connecting line 20 ' by transparent ITO layer, TFT drain electrode 22 ' is connected to the 6th contact hole 106 ' of lattice-shaped pixel electrode 30 ' and source-drain electrode connecting line 20 ' by transparent ITO layer, TFT raceway groove is positioned between TFT source electrode 21 ' and TFT drain electrode 22 ', lattice-shaped pixel electrode 30 ' is formed in pixel region by transparent ITO layer, common electrode wire terminal connecting line 110 ' is formed by transparent ITO layer connection the 3rd contact hole 103 ', sweep trace terminal connecting line 120 ' is formed by transparent ITO layer connection the 4th contact hole 104 '.
Transparent ITO layer thickness is 450-550 dust, is preferably 500 dusts.
The present invention is usingd metal oxide as TFT channel semiconductor, source-drain electrode, lattice-shaped pixel electrode or the use of lattice-shaped common electrode, can improve TFT driving force and simplify technique.

Claims (6)

1. a metal oxide XY switch type display panels, is characterized in that, comprising:
Sweep trace;
Signal wire, intersects in length and breadth with sweep trace;
Pixel cell, by sweep trace and signal wire, intersect and limit, described each pixel cell comprises thin film transistor (TFT) and lattice-shaped pixel electrode, the TFT grid that described thin film transistor (TFT) comprises and sweep trace is electrically connected, the TFT source electrode being electrically connected with signal line linking line, the TFT being electrically connected with pixel electrode drain and the TFT channel region between TFT source electrode and TFT drain, and described TFT channel region is positioned at bottom;
Common electrode wire, be arranged in parallel with sweep trace;
Lattice-shaped common electrode, is electrically connected with common electrode wire; This lattice-shaped common electrode and grid pixel electrode be the staggered pixel region that is positioned at all; Described signal wire comprises secondary signal line and the signal line linking line between first signal line and secondary signal line of first signal line, adjacent pixel unit; Described signal line linking line, TFT source electrode, TFT drain electrode, lattice-shaped pixel electrode and lattice-shaped common electrode are all positioned at top layer.
2. a metal oxide XY switch type display panels, is characterized in that, comprising:
Sweep trace;
Signal wire, intersects in length and breadth with sweep trace;
Pixel cell, by sweep trace and signal wire, intersect and limit, described each pixel cell comprises thin film transistor (TFT) and lattice-shaped pixel electrode, the TFT grid that described thin film transistor (TFT) comprises and sweep trace is electrically connected, the TFT source electrode being electrically connected with signal line linking line, the TFT being electrically connected with pixel electrode drain and the TFT channel region between TFT source electrode and TFT drain, and described TFT channel region is positioned at bottom;
Common electrode wire, be arranged in parallel with sweep trace;
Lattice-shaped common electrode, is electrically connected with common electrode wire; This lattice-shaped common electrode and grid pixel electrode be the staggered pixel region that is positioned at all; Described signal wire comprises secondary signal line and the signal line linking line between first signal line and secondary signal line of first signal line, adjacent pixel unit; Described signal wire, sweep trace, TFT grid, common electrode wire and lattice-shaped common electrode are all positioned at middle layer.
3. a manufacture method for metal oxide XY switch type display panels, is characterized in that, comprises the steps:
The first step: form source-drain electrode connecting line figure and the first insulation course with metal oxide layer respectively at substrate, source-drain electrode connecting line is TFT channel region;
Second step: form signal wire, sweep trace, common electrode wire at the first insulation course with metal and the pattern of the TFT grid that is connected with sweep trace;
The 3rd step: form the second insulation course on the basis that forms second step pattern, and form contact hole graph on the relevant position of signal wire, sweep trace, common electrode wire and source-drain electrode connecting line;
The 4th step: on the second insulation course with transparent ITO layer form signal line linking line, the TFT source electrode being connected with signal line linking line, TFT channel region, TFT drain, with TFT drain the lattice-shaped pixel electrode that is connected, be connected with common electrode wire and with the staggered lattice-shaped common electrode of lattice-shaped pixel electrode.
4. a manufacture method for metal oxide XY switch type display panels, is characterized in that, comprises the steps:
The first step: form source-drain electrode connecting line figure and the first insulation course with metal oxide layer respectively at substrate, source-drain electrode connecting line is TFT channel region;
Second step: form signal wire, sweep trace, common electrode wire, the lattice-shaped common electrode being connected with common electrode wire at the first insulation course with metal and the pattern of the TFT grid that is connected with sweep trace;
The 3rd step: form the second insulation course on the basis that forms second step pattern, and form contact hole graph on the relevant position of signal wire, sweep trace, common electrode wire and source-drain electrode connecting line;
The 4th step: on the second insulation course with transparent ITO layer form signal line linking line, the TFT source electrode being connected with signal line linking line, TFT raceway groove, TFT drain, with TFT drain be connected and with the staggered lattice-shaped pixel electrode of lattice-shaped common electrode.
5. according to the manufacture method of the display panels described in claim 3 or 4, it is characterized in that: the material of described the first insulation course and the second insulation course is all SiNx or SiO 2.
6. according to the manufacture method of the display panels described in claim 3 or 4, it is characterized in that: signal wire, sweep trace, common electrode wire are Cr or Al or Cu.
CN201210362681.7A 2012-09-26 2012-09-26 Metal oxide in-plane switching liquid crystal display panel and manufacturing method thereof Expired - Fee Related CN102854683B (en)

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CN109906405B (en) * 2016-11-09 2022-04-26 株式会社半导体能源研究所 Display device, display module, electronic apparatus, and method for manufacturing display device
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1532616A (en) * 2003-03-18 2004-09-29 友达光电股份有限公司 Method for producing thin film transistor liquid crystal display panel
CN1550857A (en) * 2003-03-29 2004-12-01 Lg.������Lcd��ʽ���� Liquid crystal display of horizontal electric field applying type and fabricating method thereof
CN102034750A (en) * 2009-09-25 2011-04-27 北京京东方光电科技有限公司 Array substrate and manufacturing method thereof
CN202421685U (en) * 2012-02-13 2012-09-05 北京京东方光电科技有限公司 Array substrate and display device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101661174B (en) * 2008-08-29 2011-04-27 群康科技(深圳)有限公司 Liquid crystal display panel and manufacturing method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1532616A (en) * 2003-03-18 2004-09-29 友达光电股份有限公司 Method for producing thin film transistor liquid crystal display panel
CN1550857A (en) * 2003-03-29 2004-12-01 Lg.������Lcd��ʽ���� Liquid crystal display of horizontal electric field applying type and fabricating method thereof
CN102034750A (en) * 2009-09-25 2011-04-27 北京京东方光电科技有限公司 Array substrate and manufacturing method thereof
CN202421685U (en) * 2012-02-13 2012-09-05 北京京东方光电科技有限公司 Array substrate and display device

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