CN102851647B - 沉积含金属膜于具有图案化构造的基板上的方法 - Google Patents
沉积含金属膜于具有图案化构造的基板上的方法 Download PDFInfo
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- CN102851647B CN102851647B CN201210320845.XA CN201210320845A CN102851647B CN 102851647 B CN102851647 B CN 102851647B CN 201210320845 A CN201210320845 A CN 201210320845A CN 102851647 B CN102851647 B CN 102851647B
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- metal film
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- metallic membrane
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- 238000000034 method Methods 0.000 title claims abstract description 132
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Classifications
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
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- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28079—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
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- H01—ELECTRIC ELEMENTS
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/28088—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
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Abstract
本发明实施例公开了一种沉积含金属膜于具有图案化构造的基板上的方法,即揭示由底部向上的金属沉积方法,以填入内连线结构和置换栅极结构,能使具有高深宽比的细微构造的间隙填入不会造成空洞,并且提供具有良好镀膜品质的金属膜。利用GCIB工艺沉积金属膜的临场前处理能允许表面杂质和表面氧化物,以改善底层和沉积的金属之间的粘结性。借由PI-CVD工艺沉积的金属膜是使用高能量低频率的光源,于相对低的温度时呈现类液态的性质,而允许金属膜由底部向上填入细微构造。由PI-CVD工艺沉积的金属膜的后沉积退火工艺能使金属膜致密化,并从金属膜移除残留的气态物种。本发明解决了具有高深宽比的细微构造在间隙填入时所面临的挑战。
Description
技术领域
本发明涉及一种金属膜的沉积方法,尤其涉及一种在具有高深宽比的细微半导体装置结构上由底部向上的金属化方法。
背景技术
为改善半导体装置效能所付出的持续努力,伴随着持续缩减半导体装置尺寸的持续努力,由此改善了装置的运算速度和功能性的能力。随着装置上的构造尺寸的降低,该装置的效能逐渐地依赖内连线而决定,这些内连线在功能性装置之间是必需的。为了改善半导体设计的内连线外观且降低对装置内连线的相对冲击,典型地使用多层内连线结构制造集成电路。多层内连线包含在这些多重芯片模块中,并借由交错的介电层来分离,所述介电层是用做金属构造之间的电性绝缘。用于构筑该互连的金属构造的金属的选择特性是依据低电阻率、对电子迁移的抵抗性、对底层基板材料的粘结性、稳定性(兼具有电性和机械性)、以及工艺的容易度。基于上述理由,常选择铜是因为其具有低电阻率、对电子迁移的高抵抗性、及对应力孔洞的抵抗性。通常会沉积一扩散阻障层以衬垫所述多个沟槽和导孔(开孔)。该扩散阻障层有时也作为提升粘结性的膜层。对于接触栓,通常使用钨(W)填入栓塞结构,而非使用铜,以避免铜扩散到栅极。也会使用一粘结层衬垫所述多个接触栓。随着装置构造尺寸的降低,接触物、导孔和沟槽结构的间隙填入渐渐地变得具有挑战性。
除了金属内连线之外,在制造互补式金属-氧化物-半导体(CMOS)晶体管的栅极电极时,因使用high-k介电材料和金属置换原先的二氧化硅和多晶硅,因此也具有金属填隙的挑战性。置换金属栅极工艺通常使用于形成该栅极电极。一典型的置换金属栅极工艺的开始为在一半导体基板上形成一high-k介电材料和形成一牺牲栅极于一对间隙子之间。在完成后续的工艺步骤后,移除该牺牲栅极,并将遗留下的沟槽填入一或多层金属。基于元件构造的缩小,将遗留下的沟槽填入一或多层金属也逐渐地变得困难。对于先进的工艺技术,沟槽、导孔和接触物的填隙以及以金属膜层取代栅极结构而不产生空洞并使其具有优良的电性效能和可靠度是很关键的。因此,业界急需的是一种改良的金属填隙工艺因应先进的半导体制造技术。
发明内容
本发明的实施例揭示由底部向上的金属沉积以填入内连线结构和置换栅极结构的方法,能使具有高深宽比的细微构造的间隙填入不会造成空洞,并且提供良好镀膜品质的金属膜。利用气体团簇离子束(gasclusterionbeam,简称GCIB)工艺沉积金属膜的临场前处理能允许表面杂质和表面氧化物,以改善底层和沉积的金属之间的粘结性。借由光诱发化学气相沉积(photo-inducedchemicalvapordeposition,简称PI-CVD)工艺沉积的金属膜是使用高能量低频率的光源,于相对低的温度时展现类液态的性质,而允许金属膜由底部向上地填入该细微构造。由PI-CVD工艺沉积的金属膜的后沉积退火工艺能使金属膜致密化,并从该金属膜移除残留的气态物种。对于先进的制造技术,上述由底部向上金属沉积方法解决了具有高深宽比的细微构造在间隙填入时所面临的挑战。
以下所描述的由底部向上的金属沉积以填入内连线结构和置换栅极结构的方法,能使具有高深宽比的细微构造的间隙填入不会造成空洞,并且提供良好镀膜品质的金属膜。利用气体团簇离子束(GCIB)工艺沉积金属膜的临场前处理能允许移除表面杂质和表面氧化物,以改善底层和沉积的金属之间的粘结性。借由光诱发化学气相沉积(PI-CVD)工艺沉积的金属膜是使用高能量低频率的光源,于相对低的温度时展现类液态的性质,而允许金属膜由底部向上填入该细微构造。由PI-CVD工艺沉积的金属膜的后沉积退火工艺能使金属膜致密化,并且在相对低的温度下从该金属膜移除残留的气态物种。借由GCIB和PI-CVD工艺沉积的金属膜并未或仅有极少部分沉积在所述多个构造(或开口)的侧壁表面上。因为在沉积过程中,开口的尺寸并未减少以及所述多个开口(或构造)的高宽比也并未增加,因此上述由底部向上填入的特性很重要。对于先进的制造技术,上述由底部向上金属沉积方法解决了具有高深宽比的细微构造在间隙填入时所面临的挑战。
于一实施例中,提供一种沉积一含金属膜在具有图案化构造的基板上的方法。上述方法包括:放置一具有图案化构造的基板于一气体团簇离子束(GCIB)工艺腔体中;在GCIB工艺腔体中借由使用离子团簇的处理气体,施以一基板的表面处理,以移除该基板的一表面层或将该表面层转换;以及在GCIB工艺腔体中借由使用GCIB法沉积一含金属膜,从底部往上填入该图案化构造,其中极少的含金属膜沉积在该图案化构造的侧壁上。
于另一实施例中,提供一种沉积一含金属膜在具有图案化构造的基板上的方法。该方法包括:放置一具有图案化构造的基板于一光诱发化学气相沉积(PI-CVD)工艺腔体中;使用PI-CVD法沉积一含金属膜,其中该含金属膜的类液态本质致使该含金属膜从底部往上填入该图案化构造;以及实施一退火工艺于该含金属膜层,以致密化该含金属膜层并从该含金属膜层释放残留的气态化合物。
本发明能使具有高深宽比的细微构造的间隙填入不会造成空洞,并且提供良好镀膜品质的金属膜。
为使本发明能更明显易懂,下文特举实施例,并配合所附附图,作详细说明如下:
附图说明
图1A显示根据本发明的一实施例的一内连线结构的剖面示意图
图1B显示根据本发明的一实施例,将金属沉积填入开口的剖面示意图。
图1C显示开口可利用由底部向上的金属沉积工艺填入一金属层的剖面示意图。
图2A显示根据本发明的一实施例具有方向性的离子团簇到达具有阻障/粘结层的开口,以沉积一金属层的剖面示意图。
图2B显示根据本发明的一实施例,当离子团簇撞击基板表面时,离子团簇将分解成金属和残留的气态物种的示意图。
图3A显示根据本发明的一实施例,在一GCIB工艺腔体中整合表面前处理和沉积镀膜的制造流程图。
图3B显示根据本发明的一实施例在基板中具有导通孔开口和沟槽开口的双镶嵌结构。
图3C显示根据本发明的实施例的一置换栅极结构位于一基板的上面。
图3D显示根据本发明的实施例在图3C的开口中填入一选择性的阻障/粘结层和一栅极金属层。
图3E显示根据本发明的实施例借由GCIB法沉积功函数层于一置换栅极结构中。
图3F显示根据本发明的一实施例,借由GCIB法沉积的金属层和功函数层可填入一置换栅极结构中。
图4A显示根据本发明的实施例以光子能量打断金属分子和有机化合物之间的键结的示意图。
图4B显示根据本发明的一实施例,以PICVD工艺沉积的金属层呈现类液态的本质,能使金属分子移动(“流动”)至构造的底部,并且由底部向上填满开口。
图5显示根据本发明的一实施例,借由PI-CVD工艺沉积含金属膜于一图案化构造上,接续实施退火步骤的制造流程图。
其中,附图标记说明如下:
100~内连线结构;
101~介电材料;
102、102’~开口;
103~阻障层;
104~悬挂凸出结构;
105~基板;
106~空洞(void);
115、115’~金属层;
202~开口;
214、215、216~金属膜;
211~离子团簇;
205~基板;
225~基板表面;
300~制造流程;
301-304~工艺步骤;
311~导通孔开口;
312~沟槽开口;
313~阻障/粘结层;
314~金属膜层;
315~基板;
320~置换栅极结构;
321~基板;
322~开口;
323~间隙子;
325~阻障层;
326、326’~功函数层;
327~阻障/粘结层;
328、328’~栅极金属层;
330~介电层;
401~基板表面;
410~构造;
411~金属膜层;
415~开口;
500~制造流程;
501-503~工艺步骤;
M~金属分子;
S~残留的气态物种;
MP~金属有机前驱物团簇;
P~光子能量;
O~有机化合物。
具体实施方式
以下以各实施例详细说明并伴随着附图说明的范例,作为本发明的参考依据。在附图或说明书描述中,相似或相同的部分均使用相同的附图标记。且在附图中,实施例的形状或是厚度可扩大,并以简化或是方便标示。另外,附图中各元件的部分将以分别描述说明,值得注意的是,图中未示出或描述的元件,为本领域普通技术人员所知的形式,另外,特定的实施例仅为揭示本发明使用的特定方式,其并非用以限定本发明。
图1A显示根据本发明的一实施例的一内连线结构100的剖面示意图。结构100是借由蚀刻法在介电材料101中形成一开口102。结构100可以是一沟槽、导孔(开孔)、或一接触(洞)。介电材料101可设置在一基板105上。基板105可以是硅或其他类型的材料。结构100可包含构造和元件区域。例如,在开口102的下方可具有一接触物或一金属构造,其提供电性连接至基板105的元件区域(未示出)。此外,介电材料101可由一单一层所构成,或者由多于一层(例如一复合层)所构成。开口102具有一宽度“W”和一深度“D”。于先进的半导体技术中,宽度“W”持续地缩小,使得能允许更多的元件制作于一芯片中。然而,为了使金属电阻维持相当地低,介电材料101的深度“D”(或厚度)并非如宽度“W”以相同的速率缩减。其结果为,结构100的深宽比(D/W)便随着先进的元件技术而增加。就先进工艺技术而言,例如40nm节点、28nm节点、22nm节点、或以下的节点工艺,开口的最小宽度可达0.1微米或更小,并且最高的深宽比可达1∶1或更高。
图1B显示根据本发明的一实施例,将金属沉积填入开口的剖面示意图。于图1B所示的范例,将一阻障层或一粘结层103沉积,以衬垫开口102。阻障层103的例子可包括钛(Ti)、钽(Ta)、氮化钛(TiN)、氮化钽(TaN)、或一复合层,例如Ti/TiN、Ta/TaN等。阻障层103通常是借由物理气相沉积(PVD)工艺形成,其导致位在靠近开口角落(参阅图1B)104悬挂凸出结构。阻障层103可为复合层,具有多于一层的次层(sub-layer)。在完成沉积阻障层及/或粘结层之后,沉积一金属层115。金属层115的范例可包括铜、铝合金、钨、或其他适合的材料。传统用以沉积金属层115的工艺方法可包括物理气相沉积(PVD)、化学气相沉积(CVD)、电镀、无电镀等。在沉积金属层115之后,通常会形成一空洞(void)106。阻障层/粘结层103和金属层115的阶梯覆盖能力(stepcoverage)不佳、开口102构造尺寸小、及开口102深宽比高等因素会造成空洞(void)106的形成。空洞(void)106可陷捕金属层内部的杂质,并且在沉积金属膜后平坦化(例如化学机械研磨(CMP)工艺)的过程中可能造成空洞被打开。埋藏的空洞或打开的孔可降低元件的合格率并导致可靠度问题,例如在可靠度的测试过程中,发生脱层及电子迁移效应。
为了改善元件合格率并避免可靠度问题,所欲提出的是一种能制造无空洞沉积结果的金属沉积工艺。图1C显示根据本发明的一实施例利用由底部向上的金属沉积工艺填入一开口。在完成沉积阻障层/粘结层103之后,开口102的尺寸缩小成为开口102’。图1C显示开口102’可利用由底部向上的金属沉积工艺填入一金属层115’。所述由底部向上的金属沉积工艺并非一选择性的沉积工艺,因此在开口102’的外部表面也沉积了金属层115’。一由底部向上的金属沉积工艺从开口102’的底部向上填入,并且不会发生传统金属沉积工艺所造成的阶梯覆盖能力问题。此由底部向上的金属沉积工艺填入具有高深宽比的小开口,例如开口102’,并未留下空洞。另外,由底部向上的金属沉积工艺并没有像众所周知选择性的沉积工艺所伴随非常窄的工艺窗口的问题。
气体团簇离子束(GCIB)工艺可使用于提供由底部向上的金属沉积工艺。此气体团簇为纳米尺寸材料的聚集,此纳米尺寸材料在标准状态和提升温度和压力的条件下为气态。当气态的材料以喷射气流的方式释放进入一真空腔体,当喷射气流的静焓(staticenthalpy)转换成动能时,喷射气流自然地冷却。此冷却效果导因于喷射气流在真空腔体中膨胀。一部分的喷射气流快速冷却并从气体状态凝结。可借由电子束轰击将此气体团簇离子化,因为电子束轰击可允许气体团簇形成为具有方向性的可控制能量束,也可将此离子化的气体团簇加速,以获得所欲的动能。
虽然每个各别的分子仅具有适当的能量,但是因为每团簇离子所携带能量的能力较高,因此较大尺寸的团簇离子通常是最有用的。离子团簇在冲击基板时发生分解。在一个特定的分解离子团簇中,各个个体的分子仅带走整体团簇能量中的一小部分。因此,此大离子团簇的冲击效应是实实在在的,但仅局限于非常浅的表面区域。此结果使得气体团簇离子在表面改质、沉积、蚀刻等工艺非常具有效果,而不会发生传统离子束工艺易造成的较深的次表面损伤。气体团簇离子束(GCIB)装置的实例已出现于2007年9月29日申请的美国专利申请早期公开第2009/0087578号,标题为“MethodforDepositingFilmsUsingGasClusterIonBeamProcessing”。
图2A显示根据本发明的一实施例具有方向性的离子团簇到达具有阻障/粘结层的开口,以沉积一金属层的剖面示意图。图2A显示离子团簇211为具有方向性的,且以垂直于基板的方向到达基板的表面。由于离子团簇211为具有方向性的,因此仅少数或没有沉积物出现在平行于离子团簇行径方向的表面(开口202的侧壁)上。此沉积特性消除了传统PVD和CVD沉积所发生的悬挂凸出结构和深宽比增加的问题。图2A显示金属膜215沉积于开口202的底部,且金属膜215沉积于基板的顶部,上述金属膜215、216的厚度远大于沉积于开口202侧壁表面的金属膜214。于一实施例中,金属膜214的厚度约为零(几乎没有沉积)。
上述气体团簇的形成是借由将含金属气态的前驱物,例如金属有机前驱物或金属卤化物释放于一真空腔体中。可将团簇离子化或加以过滤,使其行径垂直于基板的表面。也可借由一电场将离子团簇MP加速,以获致所欲的动能,并且根据本发明的一实施例的图2B中所示,当离子团簇MP撞击基板205的表面225时,离子团簇将分解成金属M和残留的气态物种S。离子团簇可包含数千个分子。离子团簇可具有动能的能量范围约介于1keV至数十keV之间,例如1keV至90keV。一旦离子团簇冲击基板的表面,此动能即转换成局部的高温,有助于释放(或驱动)气态物种离开已沉积的金属膜。
如同先前所述,以GCIB工艺沉积金属膜所使用的气体可为含金属的前驱物,包括金属有机前驱物和金属卤化物。这些含金属的前驱物在室温可为液态,且可借惰性乘载气体,例如He、Ne、Ar、Kr、Xe、或Rn,变成气体的类型。另可替换地,使用于沉积金属膜的气体可为两或多种气体的混合物,在室温或低温并不发生反应,例如大约介于室温和200℃之间。当气体混合物的离子团簇撞击基板表面时,离子团簇的动能转换成热能,此结果导致非常高的局部温度(例如>400℃),能使气体混合物发生反应形成金属和将会离开基板表面的残留气态物种。例如,气体混合物包含WF6和SiF4,在>400℃会发生反应以形成金属W和HF、H2气体。仅仅只有金属W会留在基板表面,HF和H2气体将会脱离基板表面。
GCIB工艺可用于沉积多种类型的金属膜,例如铜、铝、钨、钛、钽、及任何具有气态前驱物的金属膜。GCIB工艺也可用于沉积含金属膜。例如,借由将气态的含金属前驱物与含氮的气体(例如N2、NH3)混合产生的气体混合物可沉积普通的阻障层和粘结层,TiN和TaN。然而,此GCIB工艺并不适用于沉积衬垫开口的阻障层/粘结层,例如图1A的开口102,这是因为由GCIB工艺所沉积的膜层并无法于开口的侧壁提供足够的覆盖能力。
整合铜工艺的已知考量为铜和阻障层之间的粘结性。对应于铜的阻障层,例如TiN或TaN,在暴露于空气时,其表面易于氧化。铜并无法与氧化的阻障层形成良好的粘结。在借由GCIB工艺沉积铜膜的步骤之前,可临场(于同一反应腔体中)使用具有惰性气体(例如Ar或He)的GCIB工艺移除阻障层的氧化的表面。于此范例中,借由实施Ar或He的分子团簇可移除阻障层的顶表面。此移除的反应机构相似于氩溅镀(Arsputtering)。在沉积金属膜之前的临场表面处理的优点为高产出,并且在金属沉积之前,限制前处理表面使其不暴露于空气。此GCIB腔体具有独特的能力,可于单一的腔体中实施前处理及由底部向上的金属沉积。
另可替换地,GCIB工艺可使用含氢的气体进行表面前处理。含氢的离子团簇可将氧化的TiN或TaN还原成一富金属层(metalrichlayer),此富金属层能允许铜层与阻障/粘结层之间产生较佳地粘结。为了改善粘结性将位于下层的表面处理步骤也可应用于GCIB工艺的其他金属沉积,例如W、Al、Ta、Ti等。
图3A显示根据本发明的一实施例,在一GCIB工艺腔体中整合表面前处理和沉积镀膜的制造流程300图。于步骤301中,将一具有图案化构造的基板移入一GCIB工艺腔体中。于步骤302中,借由使用一处理气体的离子团簇实施一表面前处理。所述前处理步骤可移除一表面层,例如借由一惰性气体或借由还原表面层。也可能使用其他类型的表面处理步骤,例如配合一化学化合物转换表面层。例如,可使用一含氮的离子团簇处理金属表面,将金属表面,例如Ti或Ta,转换成含氮的膜层例如TiN或TaN。于步骤303中,在完成步骤302的实施表面前处理步骤之后,于相同腔体中以GCIB工艺即刻沉积一膜层于基板上,以由底部向上填入基板的图案化构造中。例如,此沉积的膜层是一金属层。应注意的是,也可沉积其他膜层,例如氧化层、半导体层或阻障层(例如TiN或TaN)。在完成基板的前处理步骤之后,于相同腔体中即刻沉积一金属膜可使基板以最低的程度暴露或不暴露在环境中,并且可避免基板表面的再氧化或污染。就沉积在阻障/粘结层(例如TiN或TaN)上面的金属膜而言,此前处理步骤可大幅地改善金属膜与阻障/粘结层之间的粘结性。此外,借由GCIB工艺由底部向上的填入能使具有高深宽比的小尺寸构造有良好的填入结果。
在步骤303之后接续一选择性的步骤304。于步骤304中,以GCIB工艺将步骤303沉积的金属膜进行后处理。此后处理步骤可包括以惰性气体的离子团簇轰击金属膜,以致密化膜层,或者移除遗留在膜层表面的残留化合物,例如源自金属有机前驱物的有机化合物。另可替换地,后处理步骤的离子团簇可由一或多种反应性气体构成,以改变步骤303沉积的膜层的表面。例如,若沉积的膜层为一TiN层,其表面需要成为富金属成份,则可使用含氢气体的离子团簇使膜层的表面成为富金属成份。
上述于制造流程300所揭示的沉积方法,不仅可以用于沉积金属于图2A所示的结构中,此结构可为接触物、导通孔和沟槽,也可以用于填入双镶嵌结构中,例如根据本发明的一实施例的图3B的结构310。图3B显示根据本发明的一实施例在基板315中具有导通孔开口311和沟槽开口312的双镶嵌结构。已沉积一阻障/粘结层313以衬垫开口311和312。如同先前所描述,阻障/粘结层313可以是一复合层。导通孔开口311为小且具有高深宽比,并且很困难填入。使用制造流程300的步骤,以GCIB法前处理基板表面和由底部向上沉积金属膜,可粘入开口311和312,而不会留下空洞于开口中,并且沉积膜层与下方的阻障/粘结层313之间具有良好的粘结性。借由GCIB法沉积的金属膜层314可为任何的导电材料,例如铝、铜、钨等。
除了填入例如是接触物、导通孔和沟槽的内连线结构,制造流程300也可用于沉积含金属膜于一置换栅极结构中。图3C显示根据本发明的实施例的一置换栅极结构320位于一基板321的上面。结构320具有由间隙子323的一开口322,此间隙子323被介电层330所环绕。开口322是在移除例如是多晶硅的一虚置栅极(dummygate)之后的步骤形成。一高介电常数(high-k)材料层324位在开口322的下方且位于基板321的正上方。一阻障层325位于高介电常数材料层的上方,阻障层325用以保护高介电常数材料层324。于一实施例中,位于阻障层325的上方,具有一功函数层326。开口322需填入一栅极材料(导电层),例如铝,或其他类型具有低导电性的金属。
对于先进技术而言,开口322可以是非常小,且具有高深宽比。图3D显示根据本发明的实施例在图3C的开口322中填入一选择性的阻障/粘结层327和一栅极金属层328。阻障/粘结层327可借由CVD、PVD、ALD、或其他适用的工艺沉积。栅极金属层328是使用以上描述的制造流程300借由GCIB法沉积(在金属膜层沉积之前先施以表面前处理步骤)。例如,阻障/粘结层327可由Ti、TiN、Ta、TaN、或者由Ti/Ti或Ta/TaN的组合构成。如同以上所讨论,为了确保良好的粘结性和良好的电子迁移性,急需要从阻障/粘结层327的表面移除表面氧化物或污染物,或者使表面变成富金属成份。如果阻障/粘结层327为非必要的,则需要将位在栅极金属层下方的最顶层(例如是功函数层326)进行表面处理,以移除最顶层的表面氧化物。借由GCIB工艺由底部向上沉积的膜层的本质特性能使具有高深宽比的微小开口的间隙填入结果具有良好的镀膜品质,并且与下方的膜层间具有良好的粘结性。
其他的置换栅极制造流程可涉及在移除虚置栅极的步骤之后,沉积一功函数层326’。图3E显示根据本发明的实施例使用以上描述的制造流程300借由GCIB法沉积功函数层326’于一置换栅极结构上。功函数层可为一N型功函数层或一P型功函数层。N型功函数层的范例材料包括,但不限定于,La、Zr、Hf、V、Nb、Ta、Ti、及金属碳化物。功函数层可包含杂质。例如,用于提供N型功函数层偏移的杂质为择自镧系元素。用于沉积含有杂质的金属膜层的GCIB工艺可借由引入两种不同形态的气体前驱物进入工艺腔体。P型功函数层的范例材料包括,但不限定于,Re、Fe、Ru、Co、Rh、Ir、Ni、Pd、及Pt。Pd可使用于P型功函数层的杂质。为了沉积上述的功函数层,将气态的金属前驱物引入工艺腔体中。如同以上所描述,金属前驱物可与一乘载气体混合。此外,可同时引入另一工艺气体。于一实施例中,在阻障层325和功函数层326’之间仍具有一或多个膜层。
如果在功函数层326’和栅极金属层328’之间不需要阻障/粘结层,根据本发明的一实施例,则在相同的工艺腔体中使用不同的工艺气体可临场(insitu)沉积功函数层326’,如图3F所示。如果沉积步骤是以临场完成,在沉积功函数层之前的前处理工艺便是选择性的。另可替换地,栅极金属层328’的沉积工艺可在一分开的GCIB工艺腔体中实施,此分开的腔体连接到用于沉积功函数层326’的GCIB腔体。如果栅极金属层328’的沉积步骤是在分开的GCIB工艺腔体中实施,则应该重新执行一次制造流程300中所述的表面前处理步骤。
除了GCIB工艺之外,光诱发化学气相沉积(photo-inducedchemicalvapordeposition,简称PI-CVD)工艺也可以提供由底部向上的沉积工艺。PI-CVD反应器为具有光源的CVD反应器,此光源对工艺气体照射光线。从光源所发出的光子能量可打断金属分子和非金属分子之间的键结。图4A显示根据本发明的实施例以光子能量P打断金属分子M和有机化合物O之间的键结的示意图。所述光子可由低频率的光源产生,例如紫外光(UV)、深紫外光(deep-UV)、X-光或频率低于X-光的光源。一旦将金属分子自贴附的有机化合物分离,金属分子可沉积于基板表面401上。此沉积工艺的温度为相对地低。于一实施例中,沉积温度是介于室温(RT)和大约100℃之间。于另一实施例中,沉积温度是介于室温(RT)和大约150℃之间。基于相对地低的沉积温度,当沉积在基板表面时,金属分子呈现类液态的本质且移动横越基板表面。根据本发明的一实施例,此金属分子的类液态本质能使金属分子移动(“流动”)至构造(例如图4B的构造410)的底部,并且由底部向上填满开口415。于一实施例中,重力有助于类液态的金属分子M的“流动”进入开口,使其由由底部向上填入开口。这些金属分子沉积于构造410上成为膜层411。
用于PI-CVD沉积金属膜的反应源可包括金属有机前驱物、金属卤化物、以及其他键结可被低频率光打断键结的含金属有机源。这些含金属有机源在室温下可为液态。上述金属有机前驱物在室温下可为液态,并且可结由惰性乘载气体携入。惰性乘载气体例如是He、Ne、Ar、Kr、Xe或Rn。另可替换地,用于沉积金属膜的气体可以是两或多种气体的混合物,在室温下或低温下(例如介于室温和大约200℃之间)并不发生反应。光子能量能使气体混合物反应以形成金属膜,具有残留的气体物种会离开基板表面。例如,气体混合物可包括WF6和SH4,在>400℃条件下会反应形成W以及HF和H2气体。仅只有W会留在基板的表面,而HF和H2气体会离开基板表面。如果残留的气体被陷捕在镀膜中,可借由一后退火工艺将残留的气态物种从镀膜中释放。
PI-CVD工艺可使用于沉积各种类型的金属膜,例如铜、铝、钨、钛、钽、及任何具有气态前驱物的金属膜。PI-CVD工艺也可用于沉积含金属膜。例如,借由将气态的含金属前驱物与含氮的气体(例如N2、NH3)混合产生的气体混合物可沉积普通的阻障层和粘结层,TiN和TaN。此PI-CVD工艺也适用于沉积由底部向上沉积堆迭栅极中的材料。例如,借由PI-CVD工艺沉积的膜层可包括如以上所述的P型功函数材料或N型功函数材料。
如以上所讨论,各种形态的金属膜可借由PI-CVD工艺沉积,以填入内连线及置换栅极。就先进的工艺技术而言,此工艺技术需要将金属填入具有高深宽比的微小构造中,因此由PI-CVD金属沉积工艺的由底部向上的沉积本质可确使良好的间隙填入效果。
由于金属膜是在相对低的温度条在下沉积,一部分的残留有机化合物、卤化物、或反应副产物非常可能陷在并并入金属膜411中。为了确使沉积的金属膜中无残留的化合物,可使用一沉积后退火工艺致密化镀膜,并且允许残留的化合物经由气体或蒸气形式脱离金属膜。退火工艺应于一相对短的时间内完成,以确保热工艺不会改变掺杂的轮廓或元件的效能。此外,如果目前沉积的金属层下方存在一金属层,则此退火工艺不应将此下方的金属层熔化或蒸气化。一快速退火工艺可使用快速热工艺(RTP)、尖峰退火、和激光退火。另可替换地,退火工艺并非快速热工艺,例如是炉管退火。如果此退火工艺是在低温的条件下实施,可使用较长的工艺时间(或退火时间)而不会影响掺杂的轮廓或影响退火膜层下方的膜层的整合性。如果退火工艺是用于栅极堆迭中的金属膜层,退火温度则可高达600℃。对于内连线的膜层,退火温度应保持在低于约450℃或低于约400℃。
于一实施例中,退火的温度范围约为介于200℃到450℃之间,退火持续的时间约介于1分钟到30分钟之间,例如是针对内连线的应用。于另一实施例中,退火的温度范围约为介于300℃到600℃之间,退火持续的时间约介于1分钟到30分钟之间(例如是针对前段工艺应用)。退火可于相同的PI-CVD腔体中(临场)实施,或者于个别的腔体中实施。于一实施例中,退火腔体在真空状态下,以允许残留气体(或副产物)借由退火工艺被泵离开金属膜。
图5显示根据本发明的一实施例,借由PI-CVD工艺沉积含金属膜于一图案化构造上,接续实施退火步骤的制造流程500图。于步骤501中,将一具有图案化构造的基板移入一PI-CVD工艺腔体中。于一实施例中,基板被一阻障/粘结层所覆盖。于另一实施例中,在基板被放置在PI-CVD工艺腔体内之前,基板的表面已进行一前处理步骤,例如Ar溅镀或氢还原步骤,以移除表面氧化物。于步骤502中,借由PI-CVD工艺将一镀膜沉积在基板上,使其由底部向上填入图案化构造中。于一实施例中,镀膜为一金属层。借由PI-CVD工艺将金属膜由底部向上的填入能确使小尺寸构造(例如上述构造具有开口的尺寸约等于或小于0.1微米)得到良好的间隙填入效果。借由PI-CVD工艺将金属膜由底部向上的填入能确使具有深宽比大于2∶1小尺寸构造得到良好的填入效果。
于一实施例中,光源具有频率低于紫外光(UV)的频率。在步骤502之后接续一步骤503。于步骤503中,在完成步骤502的金属膜沉积步骤之后,将基板进行退火步骤。于一实施例中,退火步骤为快速退火步骤,实施退火的温度范围约为介于300℃到450℃之间,退火持续的时间约介于1秒钟到2分钟之间。如同以上所描述,退火工艺可致密化金属膜,并且能使残留气态物种从金属膜离开(或释放)。如同上述提到,退火工艺的实施温度范围和时间范围并不会导致掺杂轮廓改变,或者不会导致任何位于沉积金属膜下方的膜层发生劣化。
以上所述用以填入内连线或置换栅极结构的由底层向上的金属沉积方法能确使细微构造的间隙填入得到良好的结果,例如细微构造等于或约小于0.1微米,无论此细微构造具有多大的深宽比。以上所述用以填入内连线或置换栅极结构的由底层向上的金属沉积方法也能确使具有深宽比例如大于2∶1的细微构造的间隙填入得到良好的结果。借由GCIB工艺沉积金属膜的临场处理步骤能确使移除表面的杂质和表面氧化物,以改善沉积金属膜层和下方的膜层之间的粘结性。借由PI-CVD工艺使用高能量低频率的光源于相对低温下沉积的金属膜呈现类液态的本质,此类液态的本质可允许金属膜由底层向上填入细微构造。由PI-CVD工艺沉积的金属膜经沉积后退火步骤可致密化金属膜,并且从相对低温沉积的膜层中移除残留的气态物种。借由GCIB和PI-CVD工艺所沉积的金属膜层仅出现有限地沉积在构造(或开口)的侧壁上。此由底层向上填入特性极为重要,因为在膜层沉积的过程中,这些开口的尺寸并不会减少,且这些开口(或构造)的深宽比不会增加。对于先进的制造而言,此由底层向上填入的金属沉积方法可解决具有高深宽比的微细构造的间隙填入所面临的挑战。
本发明虽以各种实施例揭示如上,然其并非用以限定本发明的范围,任何本领域普通技术人员,在不脱离本发明的精神和范围内,当可做些许的更动与润饰。本发明的保护范围当视所附的权利要求所界定的范围为准。
Claims (7)
1.一种沉积含金属膜于具有图案化构造的基板上的方法,包括:
对具有图案化构造的基板的表面进行前处理,以移除表面氧化物;
放置该具有图案化构造的基板于一光诱发化学气相沉积工艺腔体中,该光诱发化学气相沉积即PI-CVD;
使用PI-CVD法沉积一含金属膜,其中该含金属膜的类-液态本质致使该含金属膜从底部往上填入该图案化构造;以及
实施一退火工艺于该含金属膜,以致密化该含金属膜并从该含金属膜释放残留的气态化合物。
2.如权利要求1所述的沉积含金属膜于具有图案化构造的基板上的方法,其中该含金属膜择自一群组实质上包含:钨、铝、铝合金、铜、铜合金、钛、钽、氮化钛、氮化钽、钛/氮化钛、钽/氮化钽、镧、锆、铪、钒、铌、铼、铁、钌、钴、铑、铒、镍、钯、铂、上述金属的碳化物、及含有钯掺杂的上述金属。
3.如权利要求1所述的沉积含金属膜于具有图案化构造的基板上的方法,其中该图案化构造的一开口的宽度等于或小于0.1微米。
4.如权利要求1所述的沉积含金属膜于具有图案化构造的基板上的方法,其中使用于该PI-CVD法的光子的频率等于或小于紫外光。
5.如权利要求1所述的沉积含金属膜于具有图案化构造的基板上的方法,其中以PI-CVD法沉积含金属膜的步骤是使用一含金属的前驱物,为金属有机化合物或金属卤化物的其中之一,以及其中在引入该PI-CVD工艺腔体时,该含金属的前驱物为气体状态。
6.如权利要求1所述的沉积含金属膜于具有图案化构造的基板上的方法,其中该含金属膜是在介于室温和150℃的温度范围之间沉积。
7.如权利要求1所述的沉积含金属膜于具有图案化构造的基板上的方法,其中该退火工艺为一快速退火工艺,其使用一技术择自一群组实质上包含:快速热工艺、尖峰退火、和激光退火,其中于一温度范围及持续时间不会改变该基板内部的掺杂轮廓并且不会损伤位于该沉积的含金属膜下方的膜层。
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US20120064715A1 (en) | 2012-03-15 |
CN102851647A (zh) | 2013-01-02 |
US20110195570A1 (en) | 2011-08-11 |
CN102146553B (zh) | 2014-03-12 |
CN102146553A (zh) | 2011-08-10 |
US8088685B2 (en) | 2012-01-03 |
US20130270617A1 (en) | 2013-10-17 |
US8466063B2 (en) | 2013-06-18 |
US9214543B2 (en) | 2015-12-15 |
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