CN102831089A - Reading and writing method based on SDRAM (Synchronous Dynamic Random Access Memory) solid-state memory - Google Patents
Reading and writing method based on SDRAM (Synchronous Dynamic Random Access Memory) solid-state memory Download PDFInfo
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- CN102831089A CN102831089A CN2012102812438A CN201210281243A CN102831089A CN 102831089 A CN102831089 A CN 102831089A CN 2012102812438 A CN2012102812438 A CN 2012102812438A CN 201210281243 A CN201210281243 A CN 201210281243A CN 102831089 A CN102831089 A CN 102831089A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The invention provides a reading and writing method based on an SDRAM (Synchronous Dynamic Random Access Memory) solid-state memory. The reading and writing method comprises the following steps of: executing a memory recording step and a memory replaying step; determining a condition that a read pointer exceeds a write pointer as read overflow, so that non-covered data in the last record can be continuously replayed; and reading after any read operation, so that the read pointer and the write pointer are returned back to a base address of the memory. With the adoption of the reading and writing method provided by the invention, obtained novel data can be transmitted in time, and the non-covered old data can be replayed in time, so that the timeliness and the integrity of the data can be ensured; and the efficiency energy of a satellite can be improved. The design method can be applied in a data transmission terminal machine of one satellite data transmission subsystem.
Description
Technical field
The present invention relates to the read-write design of low orbit satellite solid-state memory, particularly, relate to based on SDRAM solid-state memory reading/writing method.
Background technology
Certain satellite data transmission subsystem main task be to the multichannel data that the satellite useful load is obtained format, storage and data necessary handle, with reliable transmission and the reception of guaranteeing data.Storer in the data transmission terminal machine is mainly accomplished the storage and the playback of various load datas, to adapt to the demand of satellite different working modes.This satellite transit is in the sun synchronous orbit of highly about 600km, has continuously the sightless situation of many domestic land stations of circle, how overseas the complete documentation data, be the problem that the memory read/write design demand is considered domestic rationally the biography down.This reads and writes conceptual design, has taken into account overseas, domestic two kinds of mission requirements, adapts with the various mode of operations of satellite.See that from present satellite actual conditions in orbit this kind reasonable design method, reliable can satisfy the reception requirement of user to load data.
Along with the continuous development of satellite technology, satellite will carry more how dissimilar load, and this proposes higher data recording and replay request with logarithm biography system.Simultaneously, along with satellite long-life, highly reliable demand growth, also require the read-write design for scheme also should be simple as much as possible when meeting the demands.The present invention will to future low orbit satellite the number designs that pass storeies reference and design considerations are provided.
Summary of the invention
For data recording and the playback problem that solves low orbit satellite, the present invention proposes a kind ofly based on SDRAM memory read/write method for designing, utilize the present invention can realize overseas data recording and domestic data readback rationally, reliably.
In order to reach the foregoing invention purpose; The present invention provides a kind of reading/writing method based on the SDRAM solid-state memory; Comprise storer record step, storer replay procedure, overflow for reading when read pointer surpasses write pointer, still can continue the data that playback is not capped last registration; Any record again after the read operation, the reading and writing pointer all can be got back to the storer first address.
Preferably, in said storer record step, all load datas mix and deposit.
Preferably, in said storer record step, repeatedly write-stop-write operation, write pointer is continuous.
Preferably, in said storer record step, write pointer stops record after arriving address, storer end automatically.
Preferably, in said storer replay procedure, repeatedly read-stop-read operation, read pointer is continuous.
Preferably, in said storer replay procedure, read pointer can circulate with the storer full address.
Preferably, in said storer replay procedure, read-stop-read-after-write, write pointer gets back to the storer first address automatically.
The present invention can and pass the unlapped legacy data of new data, playback that obtains at present, has guaranteed the ageing and integrality of data, has improved the usefulness of satellite.
Description of drawings
Fig. 1 is the principle schematic of memory write (record), and among the figure, WP is a write pointer, and RP is a read pointer.
Fig. 2 is the principle schematic of memory read (playback), and among the figure, WP is a write pointer, and RP is a read pointer.
Embodiment
1, memory write (record) step
Because satellite has carried multiple load, so storer should possess the ability that multiple load data writes down simultaneously.Because there is the sightless situation of many domestic land stations of circle in low orbit satellite, and there is the possibility of repeatedly working in load during overseas, so storer should possess repeatedly registering capacity.Though the Capacity design of storer has been considered in the maximum mission requirements of rail, because some special circumstances, exist load data too much and the possibility that storer overflows, so storer should possess the processing power of writing after overflowing.
(1) storage of multiple load data: consider that the user proposes special memory requirement to the different loads data, be designed to multiple load data and mix and deposit.
(2) record of task repeatedly: in order to simplify read operation, guarantee to read the continuity of address, design repeatedly writes-stops-write operation in write pointer continuous; Simultaneously, in order to ensure the frame synchronization that ground receives, design guarantees that the data of write store are whole frame.
(3) write the processing of overflowing: consider that the user does not propose specific (special) requirements to the priority level of data; Think that the data that deposit in the storer have equal importance; Be designed to stop record automatically after write pointer arrives address, storer end, to guarantee not cover the data that write and do not read before.
2, memory read (playback) step
Owing to the possibility that has repeatedly playback at rail, so storer should possess the continuous ability of repeatedly playback.Since data continuity for the number transmission frequently the reliability of unit have influence, and have the last time of the possibility of the intact or playback mistake of playback not, so storer should possess the ability of full address playback cycle at rail.Because acquiescence latest work data recorded is most important, so storer should be the storage space that new data provides maximum possible.
(1) the repeatedly playback of task: combine repeatedly the record design of task, design repeatedly reads-stops-read operation in read pointer continuous; Simultaneously, consistent in order to ensure the linking that preamble code and store frames of data are synchronous, design guarantees that the data of readout memory are whole frame, and first frame data of reading after reading like this-stopping still are whole frame.
(2) read circulation: the task of considering need still have data to see off after reading to overflow, and the old data that are not capped simultaneously possibly still have use value, so design memory can the full address circulation.
(3) resetting after reading: design reading-stopping-and after writing, the reading and writing pointer is got back to the storer first address automatically, can complete storage space be provided for new task like this, has simplified the control that storer uses at rail simultaneously.
3, memory read/write constraint
According to above-mentioned design, can know that the read-write pointer is independent basically, both address relationships do not have to be contacted directly.Overflow for reading when read pointer surpasses write pointer, but still can continue the data that playback is not capped last registration; Any record again after the read operation, the reading and writing pointer all can be got back to the storer first address.
Obviously, those skilled in the art can carry out various changes and distortion based on SDRAM memory read/write conceptual design and not break away from the spirit and scope of the present invention of the present invention.Like this, if these modifications and distortion belong within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and is out of shape interior.
Claims (7)
1. the reading/writing method based on the SDRAM solid-state memory comprises storer record step, storer replay procedure, it is characterized in that: overflow for reading when read pointer surpasses write pointer, still continue the data that playback is not capped last registration; Any record again after the read operation, the reading and writing pointer all can be got back to the storer first address.
2. the reading/writing method based on the SDRAM solid-state memory according to claim 1 is characterized in that: in said storer record step, all load datas mix and deposit.
3. the reading/writing method based on the SDRAM solid-state memory according to claim 1 is characterized in that: in said storer record step, repeatedly write-stop-write operation, write pointer is continuous.
4. the reading/writing method based on the SDRAM solid-state memory according to claim 1 is characterized in that: in said storer record step, write pointer stops record after arriving address, storer end automatically.
5. the reading/writing method based on the SDRAM solid-state memory according to claim 1 is characterized in that: in said storer replay procedure, repeatedly read-stop-read operation, read pointer is continuous.
6. the reading/writing method based on the SDRAM solid-state memory according to claim 1 is characterized in that: in said storer replay procedure, read pointer can circulate with the storer full address.
7. the reading/writing method based on the SDRAM solid-state memory according to claim 1 is characterized in that: in said storer replay procedure, read-stop-read-after-write, write pointer gets back to the storer first address automatically.
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| CN201210281243.8A CN102831089B (en) | 2012-08-09 | 2012-08-09 | Reading and writing method based on SDRAM (Synchronous Dynamic Random Access Memory) solid-state memory |
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| CN102831089B CN102831089B (en) | 2015-07-08 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109547096A (en) * | 2018-12-26 | 2019-03-29 | 西安空间无线电技术研究所 | A kind of addressing and method for routing suitable for global Constellation of Low Earth Orbit Satellites |
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| US20060265520A1 (en) * | 2005-05-18 | 2006-11-23 | Kwak David T | Method and system for high speed network application |
| US20080130814A1 (en) * | 2006-11-30 | 2008-06-05 | Semiconductor Manufacturing International (Shanghai) Corporation | Multi-lane elastic buffer cluster for clock tolerance compensation and de-skew among multiple receiving lanes |
| CN101741401A (en) * | 2009-12-11 | 2010-06-16 | 和芯星通科技(北京)有限公司 | Time service system of radio receiver and time service method |
| CN102779016A (en) * | 2012-06-18 | 2012-11-14 | 上海卫星工程研究所 | Design method based on synchronous dynamic random access memory (SDRAM) satellite-bone storage subfile reading and writing |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060265520A1 (en) * | 2005-05-18 | 2006-11-23 | Kwak David T | Method and system for high speed network application |
| US20080130814A1 (en) * | 2006-11-30 | 2008-06-05 | Semiconductor Manufacturing International (Shanghai) Corporation | Multi-lane elastic buffer cluster for clock tolerance compensation and de-skew among multiple receiving lanes |
| CN101741401A (en) * | 2009-12-11 | 2010-06-16 | 和芯星通科技(北京)有限公司 | Time service system of radio receiver and time service method |
| CN102779016A (en) * | 2012-06-18 | 2012-11-14 | 上海卫星工程研究所 | Design method based on synchronous dynamic random access memory (SDRAM) satellite-bone storage subfile reading and writing |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109547096A (en) * | 2018-12-26 | 2019-03-29 | 西安空间无线电技术研究所 | A kind of addressing and method for routing suitable for global Constellation of Low Earth Orbit Satellites |
| CN109547096B (en) * | 2018-12-26 | 2021-12-07 | 西安空间无线电技术研究所 | Addressing and routing method suitable for global low-earth-orbit satellite constellation |
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| CN102831089B (en) | 2015-07-08 |
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