CN102802016A - CCD signal simulator and simulation method - Google Patents
CCD signal simulator and simulation method Download PDFInfo
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- CN102802016A CN102802016A CN2012102935527A CN201210293552A CN102802016A CN 102802016 A CN102802016 A CN 102802016A CN 2012102935527 A CN2012102935527 A CN 2012102935527A CN 201210293552 A CN201210293552 A CN 201210293552A CN 102802016 A CN102802016 A CN 102802016A
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Abstract
The invention discloses a CCD (Charge Coupled Device) signal simulator used for simulating a CCD chip to generate an output signal. The CCD signal simulator comprises a control module, a memory module, a pixel signal output circuit and a control signal output circuit, wherein the control module judges an input control command and receives input image data or generates output signals of both the pixel signal output circuit and the control signal output circuit according to the control command; the pixel signal output circuit utilizes an input signal to output a pixel signal; and the control signal output circuit outputs a line synchronization signal and a clock signal. Meanwhile, the invention provides a simulation method adopting the CCD signal simulator. The CCD signal simulator can replace a real CCD chip and simulate the CCD chip to generate electrical signals, and satisfies the requirement on CCD signals in the test process of a satellite camera video electronic system without the need of the CCD chip.
Description
Technical field
The invention belongs to space remote sensing device technical field, relate to a kind of ccd signal simulator and analogy method, can be used for the test of camera space video electronic system.
Background technology
The CCD chip is the Primary Component in the satellite camera video electronic system.In satellite camera video electronic system; The CCD chip receives the light signal from optical system; Accomplish the conversion of light signal to the signal of telecommunication; With converting digital signal into after the operations such as the process of the signal of telecommunication after conversion correlated-double-sampling, A/D conversion, send digital signal processor to, accomplish the processing of picture signal and be output into picture.Satellite camera video electronic system theory diagram is as shown in Figure 1.Because CCD is higher to using environmental requirement; In the test process of video electronic system; The situation of the CCD chip damage of expensive might occur, also influence the test job of follow-up digital signal processing circuit when causing economic loss, and then influence the whole R&D cycle of camera.The R&D costs of satellite camera video electronic system have been increased.
Summary of the invention
The present invention is for solving the deficiency of prior art; A kind of ccd signal simulator and analogy method are provided; Adopt the present invention can replace the real CCD chip; Simulation CCD chip produces the signal of telecommunication, is implemented under the situation that does not have the CCD chip, satisfies in the satellite camera video electronic system test process demand to ccd signal.
For solving the problems of the technologies described above, technical solution of the present invention is following:
A kind of ccd signal simulator is used to simulate the output signal that produces the CCD chip, comprising: control module, memory module, pixel signal output apparatus, control signal output circuit,
Said control module is judged the control command of input, if control command is Data Update instruction, then with the image data storage of input to memory module; If control command is the pixel output order; Then the view data in the memory module is outputed to the pixel signal output apparatus, produce line synchronizing signal and the clock signal that outputs to the reference signal and the reset signal of pixel signal output apparatus and output to the control signal output circuit simultaneously;
Said memory module comprises Flash unit and DDR2 unit, is Data Update when instruction in control command, the view data of Flash unit storage input, and after storage finishes with image data storage in the DDR2 unit; When control command was the pixel output order, the image stored data were exported in the DDR2 unit;
The pixel signal output apparatus comprises output buffer, D/A change-over circuit, I/V change-over circuit; Output buffer cushions the view data of DDR2 unit output; Output to the D/A change-over circuit after the buffering, export after the analog signal conversion signal level of I/V change-over circuit with the generation of D/A change-over circuit; Simultaneously reference signal and reset signal, output buffer, D/A change-over circuit and I/V change-over circuit are exported after converting reference level and reset level into; Said signal level, reference level and reset level mutual group become the pixel signal;
The control signal output circuit drives back output to line synchronizing signal and clock signal.
Further, said control module adopts FPGA to realize.
Further, said pixel signal output apparatus is exported the pixel signal of multichannel simultaneously.
Adopt the analogy method of the ccd signal of simulator according to the invention, may further comprise the steps:
(1) receiving image update when instruction, the view data that control module receives input also outputs in the Flash unit of memory cell, after view data receives and finishes, with the image data storage among the Flash in DDR2;
(2) when receiving the pixel output order, control module produces reference signal and reset signal and reads the view data among the DDR2; Control module produces line synchronizing signal and pixel clock signal and outputs to the control signal output circuit simultaneously;
(3) the pixel signal output apparatus carries out producing signal level, reference level and reset level respectively after D/A conversion and the I/V conversion to view data, reference signal and reset signal, and signal level, reference level and reset level are exported as the pixel signal; The control signal output circuit drives back output to line synchronizing signal and pixel clock signal.
Adopt signal simulator according to the invention or analogy method can not use the real CCD chip just can produce the ccd signal that meets test request, thereby can reduce the testing cost of satellite camera video electronic system.Reduced in the satellite camera video electronic system test process the degree of dependence of CCD chip, made and under the situation that does not have the CCD chip, also can accomplish test assignment;
This simulator adopts parallel processing device FPGA as controller, can realize the parallel processing of data; Adopt two kinds of memories of FLASH and DDR2 to realize the storage of data; This storage mode has the power down of FLASH chip-stored data and does not lose and the fast advantage of DDR2 chip reading speed; Have communication interface circuit simultaneously and between the host computer, can send instruction and update image data through host computer easily and flexibly.
Further, the present invention can realize satisfying the demand to the multichannel ccd signal to the output of multichannel ccd signal.
Description of drawings
Fig. 1 is a satellite camera video electronic system theory diagram;
Fig. 2 is a structural representation of the present invention;
Fig. 3 is a pixel signal output apparatus sketch map;
Fig. 4 is the inventive method flow chart.
Embodiment
Below in conjunction with accompanying drawing the specific embodiment of the invention is partly done further introduction.
For satisfying simulation output to CCD pixel signal, pixel clock signal and line synchronizing signal; Structure of the present invention is as shown in Figure 2, comprises control module, memory module, pixel signal output apparatus, control signal output circuit, interface circuit and power supply and configuration circuit.
Control module realizes and the communication of host computer through interface circuit, receives control command and view data from host computer, will deposit in from the view data of host computer in the memory module, and memory module is made up of Flash unit and DDR2 unit.In control command is Data Update when instruction, the view data of Flash unit storage input, and after storage finishes with image data storage in the DDR2 unit; When control command was the pixel output order, the image stored data were exported in the DDR2 unit; When receiving the pixel output order, control module produces reference signal and reset signal simultaneously and outputs to the pixel signal output apparatus, and produces line synchronizing signal and clock signal and output to the control signal output circuit.
Be illustrated in figure 3 as pixel signal output apparatus structure chart; Comprise output buffer, D/A change-over circuit, I/V change-over circuit; The pixel signal output apparatus reads view data, reference signal and reset signal simultaneously; Output buffer cushions view data, reference signal and reset signal; After view data, reference signal and the reset signal of D/A change-over circuit after to buffering is converted into analog signal, convert view data, reference signal and reset signal into signal level, reference level and reset level respectively by the I/V change-over circuit after, export as the pixel signal.
The control signal output circuit drives back output to line synchronizing signal and clock signal, wherein, the quantity of pixel signal in the ccd signal delegation that line synchronizing signal is used for representing to simulate, clock signal is used to indicate the clock cycle of a pixel signal.
Interface circuit is used to realize the data communication of simulator of the present invention and host computer, and control module utilizes interface circuit can receive the view data of host computer input.
Power supply and configuration circuit are used for each part of whole simulator is supplied power and disposed.
Further as shown in Figure 4, be the inventive method flow chart.Simulator according to the invention combines flow chart according to following steps the CCD chip signal output to be simulated.
(1) receiving image update when instruction, the view data that control module receives input also outputs in the Flash unit of memory cell, after view data receives and finishes, with the image data storage among the FLASH in DDR2;
(2) when receiving the pixel output order, control module produces reference signal and reset signal and reads the pixel data among the DDR2; Control module produces line synchronizing signal and pixel clock signal and outputs to the control signal output circuit simultaneously;
(3) the pixel signal output apparatus carries out producing signal level, reference level and reset level respectively after D/A conversion and the I/V conversion to view data, reference signal and reset signal, and signal level, reference level and reset level are exported as the pixel signal.
Major function at ccd signal simulator according to the invention is the output of simulation real CCD pixel signal, i.e. the CCD pixel signal that simulation output reset level, reference level and signal level meet the demands.In three kinds of level signals, reset level and reference level are fixed values, and signal level is the value of a variation, and image is to represent through the voltage difference between signal level and the reference level.The generation of reset level and reference level is directly exported to the D/A converter fixed numbers through control module and is got final product; The generation of signal level need be read the value of view data among the DDR2 through control module; Send to D/A converter after this value being converted into the digital signal of D/A converter, thereby produce the signal level consistent with view data.Ccd signal reset level, reference level and the reference level of simulating is 1: 2: 3 relation on the time that continues; So after three kinds of level produce; Relation according to the time is last 1: 2: 3 is spliced three kinds of level, forms the CCD pixel signal that meets the demands.
Embodiment
The embodiment of the invention can realize the output of 16 road ccd signals; Control module realizes with the Virtex of Xilinx company series of X C5V model FPGA; The DDR2 unit is as the buffer of view data; The Flash chip is as the memory of view data, with the main output device of D/A conversion chip as the CCD analog signal.Adopt VHDL language to accomplish the FPGA software design as FPGA software programming language; FPGA software comprises Flash read-write logic, DDR2 read-write logic, interface circuit (RS-232 interface) logic, D/A converter control logic, ccd signal occurrence logic etc.; Connect accordingly according to the function that realizes between each module; The CCD pixel signal that final output meets the demands; Simultaneously, FPGA software control FPGA output pixel clock signal and line synchronizing signal provide the signal source with the pixel signal for subsequent process circuit.
Claims (4)
1. a ccd signal simulator is used to simulate the output signal that produces the CCD chip, it is characterized in that, comprising: control module, memory module, pixel signal output apparatus, control signal output circuit,
Said control module is judged the control command of input, if control command is Data Update instruction, then with the image data storage of input to memory module; If control command is the pixel output order; Then the view data in the memory module is outputed to the pixel signal output apparatus, produce line synchronizing signal and the clock signal that outputs to the reference signal and the reset signal of pixel signal output apparatus and output to the control signal output circuit simultaneously;
Said memory module comprises Flash unit and DDR2 unit, is Data Update when instruction in control command, the view data of Flash unit storage input, and after storage finishes with image data storage in the DDR2 unit; When control command was the pixel output order, the image stored data were exported in the DDR2 unit;
The pixel signal output apparatus comprises output buffer, D/A change-over circuit, I/V change-over circuit; Output buffer cushions the view data of DDR2 unit output; Output to the D/A change-over circuit after the buffering, export after the analog signal conversion signal level of I/V change-over circuit with the generation of D/A change-over circuit; Simultaneously reference signal and reset signal, output buffer, D/A change-over circuit and I/V change-over circuit are exported after converting reference level and reset level into; Said signal level, reference level and reset level mutual group become the pixel signal;
The control signal output circuit drives back output to line synchronizing signal and clock signal.
2. a kind of ccd signal simulator as claimed in claim 1 is characterized in that: said control module adopts FPGA to realize.
3. a kind of ccd signal simulator as claimed in claim 1 is characterized in that: said pixel signal output apparatus is exported the pixel signal of multichannel simultaneously.
4. a ccd signal analogy method that adopts the said simulator of claim 1 is characterized in that, may further comprise the steps:
(1) receiving image update when instruction, the view data that control module receives input also outputs in the Flash unit of memory cell, after view data receives and finishes, with the image data storage among the FLASH in DDR2;
(2) when receiving the pixel output order, control module produces reference signal and reset signal and reads the view data among the DDR2; Control module produces line synchronizing signal and pixel clock signal and outputs to the control signal output circuit simultaneously;
(3) the pixel signal output apparatus carries out producing signal level, reference level and reset level respectively after D/A conversion and the I/V conversion to view data, reference signal and reset signal, and signal level, reference level and reset level are exported as the pixel signal; The control signal output circuit drives back output to line synchronizing signal and pixel clock signal.
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| CN103888758A (en) * | 2012-12-19 | 2014-06-25 | 展讯通信（上海）有限公司 | Imaging system and debugging device thereof, debugging method and fault locating method |
| CN104378548A (en) * | 2014-10-31 | 2015-02-25 | 北京空间机电研究所 | Space multi-spectrum-section imager video circuit system |
| CN104735371A (en) * | 2015-03-25 | 2015-06-24 | 北京空间机电研究所 | Data source establishment method used for emulating and based on CCD data model |
| CN109101076A (en) * | 2017-06-20 | 2018-12-28 | 精工爱普生株式会社 | Real-time clock module, electronic equipment, moving body and information processing system |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103888758A (en) * | 2012-12-19 | 2014-06-25 | 展讯通信（上海）有限公司 | Imaging system and debugging device thereof, debugging method and fault locating method |
| CN103888758B (en) * | 2012-12-19 | 2016-01-27 | 展讯通信（上海）有限公司 | Imaging system and debugging apparatus, adjustment method and Fault Locating Method |
| CN104378548A (en) * | 2014-10-31 | 2015-02-25 | 北京空间机电研究所 | Space multi-spectrum-section imager video circuit system |
| CN104378548B (en) * | 2014-10-31 | 2017-10-24 | 北京空间机电研究所 | A kind of space multi-spectral imaging instrument video circuit system |
| CN104735371A (en) * | 2015-03-25 | 2015-06-24 | 北京空间机电研究所 | Data source establishment method used for emulating and based on CCD data model |
| CN104735371B (en) * | 2015-03-25 | 2017-09-29 | 北京空间机电研究所 | A kind of data source method for building up for being used to emulate based on CCD mathematical models |
| CN109101076A (en) * | 2017-06-20 | 2018-12-28 | 精工爱普生株式会社 | Real-time clock module, electronic equipment, moving body and information processing system |
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| CN102802016B (en) | 2014-10-08 |
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