CN102789965A - Method for reusing wafer control wafer - Google Patents
Method for reusing wafer control wafer Download PDFInfo
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- CN102789965A CN102789965A CN2011101263528A CN201110126352A CN102789965A CN 102789965 A CN102789965 A CN 102789965A CN 2011101263528 A CN2011101263528 A CN 2011101263528A CN 201110126352 A CN201110126352 A CN 201110126352A CN 102789965 A CN102789965 A CN 102789965A
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- wafer control
- control slice
- wafer
- protective layer
- epitaxial loayer
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Abstract
The invention provides a method for reusing a wafer control wafer. The method comprises that a wafer control wafer which is used is provided and an epitaxial layer is formed on the surface of the used wafer control wafer; the epitaxial layer is removed; a protective layer covering the wafer control wafer is formed under the condition of a low temperature after the epitaxial layer is removed; and the protective is removed and the new wafer control wafer is formed. By the aid of the method, the wafer control wafer can be used for many times, and the cost of semiconductor device production factories is reduced.
Description
Technical field
The present invention relates to field of semiconductor manufacture, relate in particular to a kind of method of wafer control slice recycling.
Background technology
Semiconductor device forms on the surface of wafer, along with the develop rapidly of semiconductor fabrication, also grows with each passing day for the demand of wafer.Because wafer is to be drawn by silica sand to form, its manufacture process is quite complicated, length consuming time, so the cost of wafer is high.
In the prior art, when forming semiconductor device, need be at crystal column surface through a plurality of processing steps.If wherein the adjustment of any one processing step control is improper, then can make the semiconductor device quality defects that forms to cause scrapping of wafer.Therefore, in the production line of reality,, can adopt this processing step that wafer control slice (monitor wafer) is tested, confirm that through check and analysis this processing step can correctly form semiconductor device whenever each parameter adjustment of a processing step is accomplished.For example; Before carrying out depositing operation; For making the film thickness of deposition and the requirement that uniform degree meets semiconductor device; Whether the particle that is perhaps produced in the depositing operation is in allowed band, and the said film of deposition on wafer control slice earlier to be confirmedly just is formed on actual will being used for film after correct and makes on the wafer of semiconductor device.
Yet because semiconductor device is very high for the requirement of wafer control slice, wafer control slice of the prior art only can use once.Therefore, for the manufacturer of semiconductor device, the cost of the wafer control slice of prior art is higher.
Publication number is the application documents of " CN1466170A "; A kind of reusable wafer control slice and forming method thereof is disclosed; Be employed in the wafer control slice surface and form two-layer protective layer, remove the method for said two-layer protective layer subsequently, reach the purpose of using wafer control slice repeatedly.But this kind method forms complex process.
Summary of the invention
The problem that embodiments of the invention solve provides a kind of method that can reuse wafer control slice.
For addressing the above problem, embodiments of the invention disclose a kind of method of wafer control slice recycling, comprising:
The wafer control slice that utilized is provided, and the wafer control slice surface of said utilization is formed with epitaxial loayer;
Remove said epitaxial loayer;
After removing said epitaxial loayer, adopt the wafer control slice surface of the said utilization of low temperature oxidation technology oxidation to form protective layer;
Remove said protective layer, form new wafer control slice.
Alternatively, the temperature of said low-temperature oxidation growth technique is 300～600 ℃, and the gas of feeding is O
2
Alternatively, the gas that feeds in the said low-temperature oxidation growth technique also comprises H
2
Alternatively, the material of said protective layer is a silicon dioxide.
Alternatively, the thickness of said protective layer is
Alternatively, the material of said epitaxial loayer is one or more combinations among Si, SiGe, SiGeB, the SiC.
Alternatively, the method for the said epitaxial loayer of said removal is chemico-mechanical polishing, and the ground slurry that said chemico-mechanical polishing is adopted comprises silicon dioxide and oxidant, and the polishing speed of said chemico-mechanical polishing is 50～100 rev/mins.
Alternatively, the method for the said protective layer of said removal is a wet etching.
Alternatively, the chemical reagent that said wet etching adopts is a hydrofluoric acid solution, HF in the said hydrofluoric acid solution: H
2The ratio of O is 1: 500～1: 100.
Compared with prior art, embodiments of the invention have the following advantages:
The surperficial epitaxial loayer of wafer control slice that the embodiment of the invention adopts the method removal of chemico-mechanical polishing to utilize earlier; Then under cryogenic conditions; In the wafer control slice of said utilization, form oxide film as protective layer, owing to be under cryogenic conditions, to carry out, the thickness uniformity of said oxide film; Stress to the wafer control slice surface reaches unanimity, and can not damage the new wafer control slice of follow-up formation.
Description of drawings
Fig. 1 is the schematic flow sheet of method of the wafer control slice recycling of the embodiment of the invention;
Fig. 2～Fig. 5 is the process sketch map of cross-section structure of method of the wafer control slice recycling of one embodiment of the invention.
Embodiment
Can know that by background technology existing wafer control slice promptly went out of use after using once, improve the cost of semiconductor device manufacturer greatly, cause the waste of resource.
The inventor of the embodiment of the invention reclaims so consider the wafer control slice that will utilize in order to reduce the cost of semiconductor device manufacturer, carries out some PROCESS FOR TREATMENT, makes said wafer control slice return to the former state that is utilized.After further investigation; The inventor of the embodiment of the invention finds, adopts the epitaxial loayer of removing the wafer control slice surface that utilized, in wafer control slice, forms oxide film then; Remove the method for oxide film at last, can reach the purpose of recycling wafer control slice.If but in the process that forms oxide film; There are some rough defectives in the in uneven thickness or oxide film of oxide film; Said oxide film can produce different stress to the different parts of wafer control slice; Said different stress then can have influence on the quality of the new wafer control slice of follow-up formation, even wafer control slice is cracked, thereby scraps.
The inventor of the embodiment of the invention is through further research back discovery; The thickness uniformity of the oxide film that under cryogenic conditions, forms; The oxide film of said thickness uniformity equates the stress at each position of wafer control slice, can not have influence on the quality of the new wafer control slice of follow-up formation.
For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, does detailed explanation below in conjunction with the accompanying drawing specific embodiments of the invention.A lot of details have been set forth in the following description so that make much of the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can do similar popularization under the situation of intension of the present invention, so the present invention does not receive the restriction of following disclosed specific embodiment.
Secondly, the present invention utilizes sketch map to be described in detail, when the embodiment of the invention is detailed; For ease of explanation; The profile of expression device architecture can be disobeyed general ratio and done local the amplification, and said sketch map is instance, and it should not limit the scope of the present invention's protection at this.The three dimensions size that in actual fabrication, should comprise in addition, length, width and the degree of depth.
Please refer to Fig. 1, embodiments of the invention provide a kind of method of wafer control slice recycling, comprising:
Step S101 provides the wafer control slice that utilized, and the wafer control slice surface of said utilization is formed with epitaxial loayer;
Step S103 removes said epitaxial loayer;
Step S105 after removing said epitaxial loayer, adopts the wafer control slice surface of the said utilization of low temperature oxidation technology oxidation to form protective layer;
Step S107 removes said protective layer, forms new wafer control slice.
Next, in conjunction with specific embodiment, the method for the wafer control slice of embodiment of the invention recycling is described further.Fig. 2～Fig. 5 shows the process sketch map of cross-section structure of method of the wafer control slice recycling of the embodiment of the invention.
Execution in step S101 please refer to Fig. 2, and the wafer control slice 200 that utilized is provided, and wafer control slice 200 surfaces of said utilization are formed with epitaxial loayer 201.
The wafer control slice 200 of said utilization refers to: in the production process of semiconductor device; In order to monitor each processing step; After each parameter testing of each processing step is accomplished, adopt the wafer control slice after this processing step is tested wafer control slice (monitor wafer).For example; In an embodiment of the present invention; For each parameter of testing a certain chemical vapor deposition method select whether appropriate, after these parameter testings are accomplished, for guaranteeing the quality of semiconductor devices of follow-up formation; Need to adopt these technological parameters at wafer control slice surface deposition epitaxial loayer, detect the quality, thickness of said epitaxial loayer etc. then.The wafer control slice 200 that said surface deposition has the wafer control slice of epitaxial loayer to be to utilize.
Said epitaxial loayer 201 is formed on wafer control slice 200 surfaces of said utilization; Said epitaxial loayer 201 is the structure of one or more layers storehouse; The material of said epitaxial loayer 201 is one or more combinations among Si, SiGe, SiGeB, the SiC; The formation technology of said epitaxial loayer 201 comprises one or more combinations in depositing operation, ion implantation technology, the etch process.
In an embodiment of the present invention, the formation technology of said epitaxial loayer 201 is chemical vapor deposition method, and said epitaxial loayer 201 is the SiGe film.
Execution in step S103 please refer to Fig. 3, removes said epitaxial loayer.
The method of removing said epitaxial loayer is the method for chemico-mechanical polishing.In an embodiment of the present invention, the ground slurry of the said epitaxial loayer employing of chemico-mechanical polishing comprises silicon dioxide and oxidant; The polishing speed of said chemico-mechanical polishing is 50～100 rev/mins.
When having removed said epitaxial loayer, expose the wafer control slice surface of said utilization after, stop chemico-mechanical polishing.
Execution in step S105 please refer to Fig. 4, after removing said epitaxial loayer, adopts wafer control slice 200 surfaces of the said utilization of low temperature oxidation technology oxidation to form protective layer 203.
Consider when producing semiconductor device; Quality requirement for the new wafer control slice that forms is higher; After the simple chemico-mechanical polishing, wafer control slice 200 surfaces of said utilization also exist some cuts or other defect (not shown), deformation for example takes place or form vaporific defective (haze) etc.Again because particle, vaporific defective that the wafer control slice of monitoring usefulness exists for its surface; And the deformation degree of the new wafer control slice that forms all has certain requirement, and the wafer control slice after the said chemico-mechanical polishing can not directly be used wafer control slice as new test.Therefore also need make further PROCESS FOR TREATMENT, in the wafer control slice 200 of said utilization, form protective layer 203, be used for the defective on wafer control slice 200 surfaces of the said utilization of follow-up removal the wafer control slice 200 of said utilization.
The inventor of the embodiment of the invention finds through the research back; Be employed in the wafer control slice 200 interior protective layers 203 that form of said utilization; Remove the method for said protective layer 203 then, can eliminate the interior cut or the other defect in wafer control slice 200 surfaces of said utilization.And when the thickness uniformity of protective layer 203, the surfacing of said protective layer 203, protective layer 203 equates that for the stress at the wafer control slice that utilized 201 each positions the new wafer control slice quality of follow-up formation is better; When protective layer 203 in uneven thickness; The surface irregularity of said protective layer 203; Protective layer 203 is different for the stress at the wafer control slice that utilized 201 each positions; In the wafer control slice that utilized 201, crack easily, make follow-up formation new wafer control slice second-rate in addition scrap.
The inventor of the embodiment of the invention is through further research back discovery; The thickness uniformity of the protective layer 203 that under cryogenic conditions, forms, and when temperature is higher, the protective layer 203 of formation in uneven thickness; Also can there be some other defective, for example surface irregularity etc.Therefore, said protective layer 203 forms under cryogenic conditions, can be so that the new wafer control slice quality of follow-up formation is better.
In an embodiment of the present invention, the formation technology of said protective layer 203 is the low-temperature oxidation growth technique, and the material of said protective layer 203 is a silicon dioxide.Particularly: the temperature that forms said protective layer 203 is 300～600 ℃, and the gas of feeding is O
2
Need to prove that in other embodiments of the invention, the gas that feeds during said low-temperature oxidation growth technique can also comprise H
2, to improve the growth rate of oxide film.
And can thickness that consider protective layer 203 relevant with the time of surface that the effective for repairing wafer control slice and the said protective layer 203 of follow-up removal; The inventor of the embodiment of the invention; Through finding after the experiment repeatedly; When the thickness of said protective layer 203 during less than
; Can not remove the defective in the wafer control slice 200 of said utilization in the subsequent process fully, cut for example, therefore can there be some problems in the new wafer control slice surface of follow-up formation; For example cut can not satisfy the requirement of monitoring with wafer control slice; When the thickness of said protective layer 203 too big; During greater than
; The overlong time of then follow-up removal protective layer 203 is unfavorable for enhancing productivity.Therefore; The thickness of common said protective layer 203 is
in an embodiment of the present invention, and the thickness of said protective layer 203 is
Execution in step S107 please refer to Fig. 5, removes said protective layer, forms new wafer control slice 210.
Consider the having relatively high expectations of new wafer control slice 210 surface quality of monitoring usefulness, remove said protective layer and adopt isotropic wet etching.
The chemical reagent that said wet etching adopts is a hydrofluoric acid solution, HF in the said hydrofluoric acid solution: H
2The ratio of O is 1: 500～1: 100.In order to remove protective layer fully, said wet etching is an over etching, promptly after removing said protective layer, also should continue etching part wafer control slice, and the time of said wet etching is at least 1.5 times that remove the protective layer required time.In an embodiment of the present invention, adopt HF: H
2The ratio of O is 1: 200 hydrofluoric acid solution, removes thickness to do
Protective layer need 10 minutes, for guaranteeing to remove said protective layer fully, so the time of wet etching was at least 15 minutes.
After above-mentioned steps is complete, formed new wafer control slice, the number of the particle (particle) on the surface of said new wafer control slice is less than 20, and said particle refers to diameter greater than the impurity of 0.12um, dust etc.; And the vaporific defective on the surface of said new wafer control slice is less than 0.1; And the radius of curvature of the generation deformation of said new wafer control slice can satisfy the requirement of monitoring with wafer control slice less than 10um.
To sum up; The surperficial epitaxial loayer of wafer control slice that the embodiment of the invention adopts the method removal of chemico-mechanical polishing to utilize earlier under cryogenic conditions, forms oxide film on said wafer control slice surface then; Owing to be under cryogenic conditions, to carry out; The thickness uniformity of said oxide film, the stress surperficial to wafer control slice reaches unanimity, and can not damage the new wafer control slice of follow-up formation.
Though the present invention with preferred embodiment openly as above; But it is not to be used for limiting the present invention; Any those skilled in the art are not breaking away from the spirit and scope of the present invention; Can utilize the method and the technology contents of above-mentioned announcement that technical scheme of the present invention is made possible change and modification, therefore, every content that does not break away from technical scheme of the present invention; To any simple modification, equivalent variations and modification that above embodiment did, all belong to the protection range of technical scheme of the present invention according to technical spirit of the present invention.
Claims (9)
1. the method for wafer control slice recycling comprises:
The wafer control slice that utilized is provided, and the wafer control slice surface of said utilization is formed with epitaxial loayer;
It is characterized in that, also comprise:
Remove said epitaxial loayer;
After removing said epitaxial loayer, adopt the wafer control slice surface of the said utilization of low temperature oxidation technology oxidation to form protective layer;
Remove said protective layer, form new wafer control slice.
2. the method for wafer control slice recycling as claimed in claim 1 is characterized in that the temperature of said low-temperature oxidation growth technique is 300～600 ℃, and the gas of feeding is O
2
3. the method for wafer control slice recycling as claimed in claim 2 is characterized in that the gas that feeds in the said low-temperature oxidation growth technique also comprises H
2
4. the method for wafer control slice recycling as claimed in claim 1 is characterized in that the material of said protective layer is a silicon dioxide.
5. the method for wafer control slice recycling as claimed in claim 1; It is characterized in that the thickness of said protective layer is
6. the method for wafer control slice recycling as claimed in claim 1 is characterized in that the material of said epitaxial loayer is one or more combinations among Si, SiGe, SiGeB, the SiC.
7. the method for wafer control slice recycling as claimed in claim 1; It is characterized in that; The method of the said epitaxial loayer of said removal is chemico-mechanical polishing; The ground slurry that said chemico-mechanical polishing is adopted comprises silicon dioxide and oxidant, and the polishing speed of said chemico-mechanical polishing is 50～100 rev/mins.
8. the method for wafer control slice recycling as claimed in claim 1 is characterized in that the method for the said protective layer of said removal is a wet etching.
9. the method for wafer control slice recycling as claimed in claim 8 is characterized in that the chemical reagent that said wet etching adopts is a hydrofluoric acid solution, HF in the said hydrofluoric acid solution: H
2The ratio of O is 1: 500～1: 100.
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| CN201110126352.8A CN102789965B (en) | 2011-05-16 | 2011-05-16 | The method of wafer control slice recycling |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104900494A (en) * | 2015-05-20 | 2015-09-09 | 中国航天科技集团公司第九研究院第七七一研究所 | High-precision epitaxial film thickness monitoring sheet and preparation method thereof |
| CN105679692A (en) * | 2016-03-24 | 2016-06-15 | 上海华力微电子有限公司 | Method for monitoring measurement process of film thickness machine |
| CN108257885A (en) * | 2016-12-28 | 2018-07-06 | 无锡华润上华科技有限公司 | The application method of titanium or titanium nitride particles control wafer in physical vapour deposition (PVD) |
| CN109166812A (en) * | 2018-08-31 | 2019-01-08 | 上海华力微电子有限公司 | The monitoring method of control wafer and its manufacturing method and chemical mechanical grinding defect |
| CN111725053A (en) * | 2020-06-30 | 2020-09-29 | 芜湖启迪半导体有限公司 | Method for protecting silicon carbide wafer from corrosion |
| WO2021249175A1 (en) * | 2020-06-08 | 2021-12-16 | 长鑫存储技术有限公司 | Auxiliary wafer, preparation method therefor and semiconductor manufacturing process |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000243801A (en) * | 1999-02-23 | 2000-09-08 | Hamada Heavy Industries Ltd | Processing method of silicon wafer |
| CN1412820A (en) * | 2002-11-25 | 2003-04-23 | 中芯国际集成电路制造(上海)有限公司 | Method for recovering ion injection doping dose monitoring sheet |
| CN1466170A (en) * | 2002-06-04 | 2004-01-07 | 中芯国际集成电路制造(上海)有限公司 | Repeatedly usable unpatterned wafer and forming method thereof |
| CN101312111A (en) * | 2007-05-21 | 2008-11-26 | 中芯国际集成电路制造(上海)有限公司 | Wafer cleaning and recovery method |
| JP2010109151A (en) * | 2008-10-30 | 2010-05-13 | Takashi Yunogami | Method for recycling of used semiconductor wafer |
-
2011
- 2011-05-16 CN CN201110126352.8A patent/CN102789965B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000243801A (en) * | 1999-02-23 | 2000-09-08 | Hamada Heavy Industries Ltd | Processing method of silicon wafer |
| CN1466170A (en) * | 2002-06-04 | 2004-01-07 | 中芯国际集成电路制造(上海)有限公司 | Repeatedly usable unpatterned wafer and forming method thereof |
| CN1412820A (en) * | 2002-11-25 | 2003-04-23 | 中芯国际集成电路制造(上海)有限公司 | Method for recovering ion injection doping dose monitoring sheet |
| CN101312111A (en) * | 2007-05-21 | 2008-11-26 | 中芯国际集成电路制造(上海)有限公司 | Wafer cleaning and recovery method |
| JP2010109151A (en) * | 2008-10-30 | 2010-05-13 | Takashi Yunogami | Method for recycling of used semiconductor wafer |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104900494A (en) * | 2015-05-20 | 2015-09-09 | 中国航天科技集团公司第九研究院第七七一研究所 | High-precision epitaxial film thickness monitoring sheet and preparation method thereof |
| CN105679692A (en) * | 2016-03-24 | 2016-06-15 | 上海华力微电子有限公司 | Method for monitoring measurement process of film thickness machine |
| CN108257885A (en) * | 2016-12-28 | 2018-07-06 | 无锡华润上华科技有限公司 | The application method of titanium or titanium nitride particles control wafer in physical vapour deposition (PVD) |
| CN108257885B (en) * | 2016-12-28 | 2021-01-05 | 无锡华润上华科技有限公司 | Use method of titanium or titanium nitride particle control wafer in physical vapor deposition |
| CN109166812A (en) * | 2018-08-31 | 2019-01-08 | 上海华力微电子有限公司 | The monitoring method of control wafer and its manufacturing method and chemical mechanical grinding defect |
| CN109166812B (en) * | 2018-08-31 | 2021-07-02 | 上海华力微电子有限公司 | Control wafer and manufacturing method thereof and monitoring method of chemical mechanical polishing defects |
| WO2021249175A1 (en) * | 2020-06-08 | 2021-12-16 | 长鑫存储技术有限公司 | Auxiliary wafer, preparation method therefor and semiconductor manufacturing process |
| CN113838743A (en) * | 2020-06-08 | 2021-12-24 | 长鑫存储技术有限公司 | Auxiliary wafer, preparation method thereof and semiconductor process |
| CN111725053A (en) * | 2020-06-30 | 2020-09-29 | 芜湖启迪半导体有限公司 | Method for protecting silicon carbide wafer from corrosion |
| CN111725053B (en) * | 2020-06-30 | 2023-11-14 | 安徽长飞先进半导体有限公司 | Protection method for silicon carbide wafer corrosion |
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