CN102789384A - Method for implementing server operating system applied to Loongson 3B processor - Google Patents
Method for implementing server operating system applied to Loongson 3B processor Download PDFInfo
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- CN102789384A CN102789384A CN2012102415486A CN201210241548A CN102789384A CN 102789384 A CN102789384 A CN 102789384A CN 2012102415486 A CN2012102415486 A CN 2012102415486A CN 201210241548 A CN201210241548 A CN 201210241548A CN 102789384 A CN102789384 A CN 102789384A
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Abstract
The invention discloses a method for implementing a server operating system applied to a Loongson 3B processor. The method comprises the following five steps of: (step 101) performing initialization related to the system structure, (step 102) performing setup of a trap door and an interruption door; (step 103) performing memory initialization supporting an NUMA frame and setting a memory management module; (step 104) performing setup of interruption initialization; and (step 105) performing setup of PCI subsystem initialization. The method firstly provides support for the CPU, the memory, the interruption and the NUMA frame according to the requirements for the hardware of the Loongson 3B processor, to ensure stable operation of the whole operating system. The method has broad use values and application prospects in the field of computer operating systems.
Description
(1) technical field
The present invention relates to a kind of server OS implementation method towards Godson 3B processor; Be specifically related to operating system nucleus to Godson 3B architecture relevant support; And corresponding interrupt management subsystem, software implementation method that the memory management subsystem is relevant, belong to the computer operating system technical field.
(2) background technology
Godson 3B CPU is a general multi-core CPU, adopts the MIPS framework, integrated a plurality of high-performance processors nuclears on single chip, its main service-oriented device and performance application.
Though Godson 3B CPU and Godson 3A CPU are compatible on the hardware pin; But Godson 3B processor and Godson 3A processor still have bigger difference on inner structure, Godson 3B processor on the basis of Godson 3A processor, integrated 8 processor cores on the single-chip; And improved the work dominant frequency; Also integrated simultaneously secondary cache in a large number, the DDR controller that in addition chip integration is become has increased the ECC verifying function, and has adjusted the frequency of operation of the pci controller that chip integration becomes.Operating system towards Godson 3A CPU can not directly be moved on Godson 3B, does not still have the operating system of good support Godson 3B processor at present.Do not have the support of operating system, just can't on Godson 3B processor, move upper layer application, corresponding cloud computing, high-performance calculation all can't normally be carried out.On the other hand; The NUMA framework becomes more and more popular in server architecture; Yet existing homemade server OS is still far from perfect for the support of NUMA framework, and its management to physical memory adopts the mode of unified addressing to realize, does not take into full account the NUMA Architecture characteristic; In Memory Allocation, lack differentiation management to local internal memory of node and long-distance inner; Such way has increased the frequency of long-range memory access, and too much long-range memory access causes system overhead to increase, and then makes running efficiency of system low.Therefore, to the characteristics of Godson 3B processor and NUMA architecture, realize having very strong practical value towards the server OS of Godson 3B processor.
(3) summary of the invention
1, purpose: in view of this, the purpose of this invention is to provide a kind of server OS implementation method, realize good support to Godson 3B processor and NUMA framework towards Godson 3B processor.
2, technical scheme: for achieving the above object, technical scheme of the present invention is such:
As shown in Figure 1, a kind of server OS implementation method of the present invention towards Godson 3B processor, this method may further comprise the steps:
Step 101. realizes the initialization that architecture is relevant;
Step 102. realizes the setting of trap door and interrupt gate;
Step 103. realizes supporting the internal memory initialization and the memory management module of NUMA framework;
Step 104. realizes interrupting initialized setting;
Step 105. realizes the initialized setting of PCI subsystem;
The present invention requires to provide the hardware platform based on Godson 3B processor aspect hardware condition.Aspect software condition, require the PMON that debugging is good on corresponding hardware platform can supply to load kernel.
Wherein, the initialization that the described realization architecture of step 101 is relevant is meant the correction of information such as the dominant frequency relevant with CPU, one-level cache capacity, secondary cache capacity, serial ports initialization address and the parameter initialization relevant to the plate level.
Wherein, described realization trap door of step 102 and being provided with of interrupt gate mainly are the abnormality processing function that CPU is set, and TLB heavily fills out, and cache makes mistakes in addition to the initialization of general tables, exception.
Wherein, The described realization of step 103 supports the internal memory initialization of NUMA framework to be meant that the server OS kernel considers the influence of NUMA framework when carrying out internal memory initialization, on the basis of traditional initial method, expands the initialization management to node memory.In addition, the internal memory initialization part also comprises the initialization to the page address pond.The initialization of PCI internal memory and high memory.
Wherein, The described realization of step 103 supports the memory management module of NUMA framework to be meant in for the process of course allocation internal memory; Fully take into account the NUMA Architecture characteristic; In conjunction with the CPU at current process place, storage allocation nearby, thereby the process of avoiding and self in exist different nodes to bring ground far away memory access problem.
Wherein, the described realization of step 104 interrupt setting that initialized setting is meant setting to the system break route, Interrupt Process, to the Interrupt Process setting of the PCI of system equipment and to the mapping setting of intrasystem device interrupt number and respective interrupt handling procedure.
Wherein, the initialized setting of step 105 described realization PCI subsystem is meant the initialization that realizes subsystem in order.These subsystems comprise: bus, driving, USB subsystem etc.
3, advantage and effect: a kind of server OS implementation method of the present invention towards Godson 3B processor, it is compared with existing Li nux operating system, and its major advantage is: (1) provides the support to Godson 3B hardware platform, fills up current technological gap; (2) fully take into account the influence of NUMA architecture, avoid far memory access, have higher performance than similar operating system towards Godson numa server.
(4) description of drawings
Fig. 1 Godson 3B server OS realizes synoptic diagram
Fig. 2 Godson 3B server OS realizes synoptic diagram in detail
Fig. 3 Godson 3B server OS internal memory initialization schematic flow sheet
(5) embodiment
For making the object of the invention, technical scheme and advantage express clearlyer, the present invention is remake further detailed explanation below in conjunction with accompanying drawing and specific embodiment.
See 1-Fig. 3, main thought of the present invention is according to the characteristics of Godson 3B hardware architecture and the characteristics of NUMA architectural framework, realizes Godson 3B NUMA server is had the server OS of good support.Detailed step is as shown in Figure 2:
The type of step 201-1:CPU mainly is to confirm through the value of the PRID register that reads CPU.And then the capacity of capacity, data cache and the command cache of definite corresponding instruction collection, TLB capacity, one-level cache and secondary cache.Because Godson 3B processor has floating-point coprocessor, so also need enable floating-point coprocessor.For example can adopt following code to realize:
Step 201-2: the initialization of bottom can adopt following order to realize:
The first step, the base address of initialization input/output space are that the startup of I/O equipment is prepared, and the relevant hardware databook can be inquired about in the base address of relevant input/output space; Second step; Accept the parameter that Boot loader passes to kernel, kernel is through carrying out analysis and judgement to these parameters, the mode that decision starts; For example: the console parameter of passing to kernel is ttyS0; Kernel with regard to decision through serial ports from the starting terminal system and then can judge to the serial ports initialization, if the console parameter of kernel is tty, kernel determines to get into system through starting the interface exactly; In the 3rd step, transmit the environmental variance that kernel needs: bus frequency, cpu frequency, memory size and high memory size; The 4th step, initialization serial ports base address, concrete serial ports base address of using need be linked up with the Hardware Engineer.Serial ports plays a very important role in system debug stage and embedded system.
Step 201-3: the bottom internal memory initialization of supporting the NUMA framework.In internal memory initialization,, increase the structure of each node memory of management than traditional initial method.This structure comprises to the record of each node memory scope, to the mark of each node free memory, to the mapping of intranodal processor and internal memory.For example, suppose that certain Godson 3BNUMA server has two nodes, each node has two physical cpus, and difference carry 2GB internal memory on each node then can be following to its descriptor memory:
After the bottom internal memory initialization; Carry out the relevant initialization of plate level; Can judge whether the memory range of division is correct through the memory range map of printout; Then the startup command line parameter is analyzed and analysis result is kept in the structure array, the page table of initialization bootstarp memory divider and kernel spacing is set up page table entry.
Step 202: exception vector is set number realizes according to the relevant hardware handbook.The principle that Godson 3B is provided with exception vector number is: distribute to 8259 interruptable controllers 0-15 number, distribute to MIPS CPU 16-23 number, distribute to the Bonito north bridge 32-63 number.
Step 203: realize the support of operating system, can adopt following steps to the memory management of Godson 3B NUMA IA frame serverPC:
The page address pond of initialization Godson 3B operating system.Whether launched high memory and can determine whether initialization page address pond through judging memory headroom.Owing to launched high memory in the memory headroom of Godson 3B,, set up the address mapping relation of high memory so need carry out initialization to it.
Pci internal memory and high memory that the initialization platform is relevant.Mainly be to carry out the division of different region of memorys according to the internal memory characteristics of Godson 3B operating system.
The internal memory that initialization plate level is relevant.
Set up the region of memory tabulation, and sorted in each zone.The principle of the institute's foundation that puts in order at first is set, sets up regional chained list according to the principle that is provided with then, suppose the zone to be zone, when a zone can not satisfy the zone that timing meeting in current minute finds the next one to distribute according to this chained list.The directorial area tabulation is come into force.If it is unequal then stop the operation of machine.Whether the quantity of page or leaf can make system works in the check system then, if page or leaf can not be worked very little, these pages group is moved.
The initialization internal memory.Internally deposit into the initialized realization thought of row, be different from the buddy system that uses in the existing operating system.Buddy system is regarded the full memory address space as and is equal to, and carries out the distribution of address space according to the size in process application storage allocation space, though this method has solved external fragmentation, in the internal memory support that solves the NUMA framework, is not efficiently.Suppose to have under the situation of two nodes; The internal memory of node 0 is idle a lot, and the internal memory of node 1 also and do not use, when the process application Memory Allocation of node 1; Buddy system is from the consideration that solves external fragmentation; Can give the process on the node 1 with the Memory Allocation of node 0, cause process so always in access remote internal memory, inefficiency.Therefore, in the memory management that realizes the NUMA framework, need take all factors into consideration.According to the structure of above-mentioned each node memory management, the internal memory of judging process and its application distribution whether on same node, if not; Just apply for storage allocation again; Up to being assigned on the same node, can reduce the expense of long-range memory access like this, the efficient of raising system operation.
Initialization slab divider can be used slab cache.Under the NUMA architecture; At first create the structure array that is used for depositing all cache; Print corresponding error message when creating failure, return No. 0 element of structure array after the success, it is 1 that slab cache destruction reference count afterwards is set then; With cache++, notify the internal memory hot plug then.
Step 204: the realization of interrupt subsystem mainly is the interruption initialization that realizes that bottom is relevant.LPC and HT mainly need be set interrupt route, and enable the interruption of HT and LPC, interrupt number and interrupt handling routine are mapped.Godson 3B chip internal is supported 64 interrupt sources at most, manages to unify mode.
The realization of step 205:PCI subsystem realizes in order.The PCI subsystem comprises: bus sub, driver sub-system, USB subsystem etc.We can be divided into 7 sub-section, and define method is following for example:
The initialization of subsystem is carried out according to top order, and after each section initialization was accomplished, process and realization just can be created to the management of hardware by system.
It should be noted last that: above embodiment is the unrestricted technical scheme of the present invention in order to explanation only; Although the present invention is specified with reference to the foregoing description; Those of ordinary skill in the art is to be understood that: still can make amendment or be equal to replacement the present invention; And replace any modification or the part that do not break away from the spirit and scope of the present invention, and it all should be encompassed in the middle of the claim scope of the present invention.
Claims (7)
1. server OS implementation method towards Godson 3B processor, it is characterized in that: this method may further comprise the steps:
Step 101. realizes the initialization that architecture is relevant;
Step 102. realizes the setting of trap door and interrupt gate;
Step 103. realizes supporting the internal memory initialization and the memory management module of NUMA framework;
Step 104. realizes interrupting initialized setting;
Step 105. realizes the initialized setting of PCI subsystem.
2. server OS implementation method towards Godson 3B processor is characterized in that: the initialization that the described realization architecture of step 101 is relevant is meant the correction of the dominant frequency relevant with CPU, one-level cache capacity, secondary cache capacity, serial ports initialization address information and the parameter initialization that the plate level is correlated with.
3. server OS implementation method towards Godson 3B processor; It is characterized in that: the setting of described realization trap door of step 102 and interrupt gate is the abnormality processing function that CPU is set; TLB heavily fills out, and cache makes mistakes in addition to the initialization of general tables, exception.
4. server OS implementation method towards Godson 3B processor; It is characterized in that: the described realization of step 103 supports the internal memory initialization of NUMA framework to be meant that the server OS kernel considers the influence of NUMA framework when carrying out internal memory initialization; On the basis of traditional initial method, expand initialization management to node memory; In addition, internal memory initialization also comprises the initialization of initialization, PCI internal memory and high memory to the page address pond.
5. server OS implementation method towards Godson 3B processor; It is characterized in that: the described realization of step 103 supports the memory management module of NUMA framework to be meant in for the process of course allocation internal memory; Fully take into account the NUMA Architecture characteristic; In conjunction with the CPU at current process place, storage allocation nearby, thereby the process of avoiding and self in exist different nodes to bring ground far away memory access problem.
6. server OS implementation method towards Godson 3B processor is characterized in that: the described realization of step 104 interrupts setting that initialized setting is meant setting to the system break route, Interrupt Process, to the Interrupt Process setting of the PCI of system equipment and to the mapping setting of intrasystem device interrupt number and respective interrupt handling procedure.
7. server OS implementation method towards Godson 3B processor, it is characterized in that: wherein, the initialized setting of step 105 described realization PCI subsystem is meant the initialization that realizes subsystem in order; These subsystems comprise: bus, driving and USB subsystem.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104572509A (en) * | 2014-12-26 | 2015-04-29 | 中国电子科技集团公司第十五研究所 | Method for realizing discrete display card video memory distribution on Godson computing platform |
| CN105243029A (en) * | 2015-11-24 | 2016-01-13 | 无锡江南计算技术研究所 | NUMA memory management fault tolerance method based on TLB-MISS |
| CN108664414A (en) * | 2017-03-31 | 2018-10-16 | 龙芯中科技术有限公司 | DDR memory configurations space access method and devices |
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| US20050010913A1 (en) * | 2003-07-11 | 2005-01-13 | Chih-Wei Chen | Computer code upgrading method and system |
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| US20050010913A1 (en) * | 2003-07-11 | 2005-01-13 | Chih-Wei Chen | Computer code upgrading method and system |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104572509A (en) * | 2014-12-26 | 2015-04-29 | 中国电子科技集团公司第十五研究所 | Method for realizing discrete display card video memory distribution on Godson computing platform |
| CN104572509B (en) * | 2014-12-26 | 2017-11-07 | 中国电子科技集团公司第十五研究所 | A kind of method that the distribution of display card video memory is realized in Godson calculating platform |
| CN105243029A (en) * | 2015-11-24 | 2016-01-13 | 无锡江南计算技术研究所 | NUMA memory management fault tolerance method based on TLB-MISS |
| CN105243029B (en) * | 2015-11-24 | 2018-01-19 | 无锡江南计算技术研究所 | NUMA memory management fault-tolerance approaches based on TLB MISS |
| CN108664414A (en) * | 2017-03-31 | 2018-10-16 | 龙芯中科技术有限公司 | DDR memory configurations space access method and devices |
| CN108664414B (en) * | 2017-03-31 | 2020-09-22 | 龙芯中科技术有限公司 | DDR memory configuration space access method and device |
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