CN102779405A - Digital video recorder, infrared remote control receiving device and method - Google Patents
Digital video recorder, infrared remote control receiving device and method Download PDFInfo
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- CN102779405A CN102779405A CN2012102371295A CN201210237129A CN102779405A CN 102779405 A CN102779405 A CN 102779405A CN 2012102371295 A CN2012102371295 A CN 2012102371295A CN 201210237129 A CN201210237129 A CN 201210237129A CN 102779405 A CN102779405 A CN 102779405A
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Abstract
The invention provides an infrared remote control receiving method device. The method comprises the following steps that A, a microprocessor receives an external infrared remote control pulse sequence by GPIO (General Purpose Input/Output) interrupt; B, when the time difference between continuous two times of GPIO interrupt is determined as a guiding code, the microprocessor executes step C; if the time difference is determined as a repeat code, the microprocessor executes step E, and if the time difference is determined as a non-guide code and a non-repeat code, the microprocessor executes the step A; C, the microprocessor sampling the received infrared remote control pulse sequence by utilizing the timer interrupt; D, the microprocessor performs validity identification on the sampled data, decodes the effective sampled data, outputs the currently received effective code, and resets and executes step A; and E, after the repeat code is identified effective, the microprocessor outputs the last received effective code to reset and execute step A. The invention further provides a digital video recorder. With the adoption of the method, device and video recorder provided by the invention, the effective data can be prevented from losing and the accuracy for receiving data can be improved.
Description
Technical field
The present invention relates to Infrared Ray Remote Control Technology, particularly a kind of DVR, infrared remote control receiving trap and method.
Background technology
200810046471.0 a kind of method that in embedded system, realizes infrared remote control decoding with software is disclosed, as shown in Figure 1.Combine Fig. 1 at present, existing infrared remote control decoding method is described, specific as follows:
(1) OUT (output terminal) pin of infrared remote control receiver is connected to GPIO (general input) pin that has along interrupt capabilities of embedded microprocessor, so that the infrared remote control pulse train that infrared remote control receiver receives gets into embedded microprocessor through the GPIO pin.
(2) initialize routine is made as negative edge to the GPIO interrupt mode and interrupts, and the decoder state machine state is changed to " the low beginning of preamble code ", and accomplishes the setting of GPIO interrupt priority level, and GPIO interrupts initial work such as carry.
When the infrared remote control pulse train that (3) receives when infrared receiver of remote-control sytem is interrupted through the concurrent living negative edge of GPIO pin, trigger the decoding program operation in the microprocessor, this program will at first be removed the GPIO interrupt status register.
(4) utilize the coding rule of GPIO interruption and predefined preamble code and running fire sign indicating number to accomplish validity judgement to preamble code or running fire sign indicating number;
During from " preamble code hangs down beginning " state process " preamble code is low to be finished " state arrival " the high end of preamble code " state, promptly decidable is preamble code or running fire sign indicating number.If judge it is preamble code, next will get into " numeric data code decoding " state, under this state, will accomplish the decoding work of 32 bit data sign indicating numbers.
Preamble code or the judgement of running fire sign indicating number validity are comprised step:
(41) when first GPIO interruption generating; Judge whether the decoding state machine state is " the low beginning of preamble code "; Be then next GPIO to be interrupted being made as rising edge to interrupt, the decoder state machine state is changed to " preamble code is low to be finished ", waits for the generation that next GPIO interrupts;
(42) when next GPIO interruption generating, judge whether the decoding state machine state is " preamble code is low to be finished ", be then will be made as negative edge to the GPIO interrupt mode to interrupt; Further judge whether the low level length of infrared remote control pulse train is legal, low level length is legal then to be changed to the decoder state machine state " preamble code is high to be finished ", otherwise the decoder state machine state is changed to " the low beginning of preamble code "; Wait for the generation that next GPIO interrupts at last;
(43) when next GPIO interruption generating; State judges whether the decoding state machine state is " preamble code is high to be finished "; Be to judge further then whether the high level length of infrared remote control pulse train is legal; The legal then preamble code of high level is effective, simultaneously the decoder state machine state is changed to " numeric data code decoding "; Otherwise judge whether the running fire sign indicating number is effective, effectively then the running fire sign indicating number is joined the team, and the decoder state machine state is changed to " the low beginning of preamble code ", then directly the decoder state machine state is changed to " preamble code is low to begin " if the running fire sign indicating number is invalid as if the running fire sign indicating number; Wait for the generation that next GPIO interrupts at last.
(5), then continue to utilize the coding rule of GPIO interruption and predefined data bit " 0 " and data bit " 1 " to accomplish decoding to numeric data code if preamble code is effective in the step (4).
Decoding to numeric data code comprises step:
(51) when the GPIO interruption generating, judge whether the decoding state machine state is " numeric data code decoding ", the generation that non-" numeric data code decoding " state then waits next GPIO to interrupt; Be " numeric data code decoding " state, judge further then whether infrared remote control pulse train is data bit " 0 ", if data bit " 0 " then writes down this position;
(52) if not data bit " 0 " then judge whether to be data bit " 1 ", if data bit " 1 " then writes down this position, otherwise the decoder state machine state is changed to " preamble code low beginning ", wait for the generation that next GPIO interrupts.
(53) after record data position " 0 " or the data bit " 1 ", judge whether the decoding of 32 bit data sign indicating numbers is accomplished, then directly do not wait for the generation that next GPIO interrupts if accomplish; Then numeric data code is joined the team if accomplish, simultaneously the decoder state machine state is changed to " the low beginning of preamble code ", wait for the generation that next GPIO interrupts.
In step (51) and (52), the decoding of data bit " 0 " or data bit " 1 " is specifically comprised following steps: a again, is made as negative edge to the GPIO interrupt mode when initial and interrupts, decoder state machine is made as " state 1 "; B, interrupt 1 when arriving as GPIO; Judge that at first GPIO interrupts 1 and interrupts time interval (interval) of 2 with GPIO and whether satisfy following condition: (1.12ms-delta) < interval < (1.12ms+delta); Wherein, Delta>error amount that 0 expression allows, this value can be adjusted according to concrete system, then this section pulse train is decoded as data bit " 0 " if satisfy; Otherwise judge whether interval satisfies following condition: (2.25ms-delta) < interval < (2.25ms+delta); If satisfy and then this section pulse train be decoded as data bit " 1 "; Otherwise decoder state machine is made as " state 1 " when initial; Mean that this pulse train is invalid, need abandon.The clock period counter register that can use in the embedded microprocessor that obtains of above-mentioned interval is realized; Implementation method is: write down GPIO respectively and interrupt 1 and interrupt 2 the values of counter register when arriving with GPIO, the difference of two values and the product of the inverse of looking the screen frequency just obtain the value of interval.
In sum; Existing infrared remote control method of reseptance has adopted the coding rule of GPIO interruption and predefined preamble code and running fire sign indicating number, has accomplished the validity of preamble code or running fire sign indicating number is judged, when GPIO interrupts more and recur the GPIO interruption; Valid data partly can interrupt too much losing because of GPIO; Cause the incompleteness of valid data, and in the existing infrared remote control method of reseptance, need utilize the clock period counter register in the embedded microprocessor; Calculate interval, be still waiting further raising aspect the accuracy of Data Receiving.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of infrared remote control receiving trap, this device can avoid losing valid data, improves the accuracy of Data Receiving.
The object of the present invention is to provide a kind of infrared remote control method of reseptance, this method can avoid losing valid data, improves the accuracy of Data Receiving.
The object of the present invention is to provide a kind of DVR, this video recorder can avoid losing valid data, improves the accuracy of Data Receiving.
A kind of infrared remote control method of reseptance, this method comprises:
A, microprocessor GP configuring IO controller utilize the GPIO of GPIO controller to interrupt, and receive from the infrared remote control pulse train that connects the infrared receiving terminal on the GPIO pin;
Mistiming between B, microprocessor interrupt according to double GPIO, execution in step C when confirming as preamble code, execution in step E when confirming as duplication code confirms neither execution in step A during the also non-duplication code of preamble code;
C, microprocessor are closed GPIO interruption and configuration timer, utilize the timer of timer to interrupt, and the infrared remote control pulse train that is received on the GPIO pin to the GPIO controller is sampled;
D, microprocessor carry out availability deciding to the sampled data of timer output, and effective sampled data is decoded, and export the effective code that this receives, and reset and execution in step A;
E, microprocessor are exported the effective code that received last time after judging that duplication code effectively, reset and execution in step A.
In the said method, the said GPIO of GPIO controller that utilizes of steps A interrupts, and receives from the infrared remote control pulse train that connects the infrared receiving terminal on the GPIO pin to comprise:
A1, GPIO controller trigger GPIO and interrupt according to preset interrupt mode and the infrared remote control pulse train on the GPIO pin;
A2, GPIO controller receive the infrared remote control pulse train on the infrared receiving terminal that the GPIO pin connected in the GPIO interrupt procedure.
In the said method, said step B comprises:
B1, microprocessor obtain the mistiming between double GPIO interruption from the GPIO controller;
The condition that mistiming between B2, the more double GPIO of microprocessor interrupt satisfies if satisfy first condition, is confirmed as preamble code; Execution in step C if satisfy second condition, confirms as duplication code; Execution in step E; If satisfy the 3rd condition, confirm neither the also non-duplication code of preamble code execution in step A;
Said first condition is that the mistiming is greater than 13.5ms; Said second condition is that the mistiming is more than or equal to 11.5ms and be less than or equal to 13.5ms; Said the 3rd condition is that the mistiming is less than 11.5ms.
In the said method, the said timer of timer that utilizes of step C interrupts, and the infrared remote control pulse train of GPIO controller reception is sampled to be comprised:
C1, timer triggered timer and interrupt according to preset interrupt cycle; 1/2nd of the cycle of the pulse signal that be the NEC form said preset interrupt cycle
C2, timer are in the timer interrupt procedure, and according to the preset sampling period, the infrared remote control pulse train that receives on the GPIO pin to the GPIO controller is sampled, and obtain identification code and export microprocessor to preserve;
C3, timer are after the correct instruction of the identification code that receives microprocessor output; The infrared remote control pulse train that receives on the GPIO pin of continuation to the GPIO controller is sampled; Sampled data after the acquisition identification code also exports microprocessor to; After the instruction of the identification code mistake that receives microprocessor output, stop to continue sampling.
In the said method, the said microprocessor of step D carries out availability deciding to the sampled data of timer output and comprises:
Whether the identification code of D1, microprocessor judges timer output is correct, if correct, and correct the instructing of output identification code to timer and execution in step D2, if mistake, the instructing to timer of output identification code mistake is with timeing closing device and execution in step A;
D2, microprocessor receive the identification code sampled data afterwards of timer output, judge whether to receive the burst position, if then generate first zone bit and execution in step D3, otherwise continue to receive the sampled data that timer is exported;
D3, microprocessor are judged the validity of preamble code according to first zone bit.
In the said method, step D is said to decode to effective sampled data, exports the effective code that this receives, and resetting also, execution in step A comprises:
The identification code sampled data afterwards that D4, microprocessor move to right and receive is removed the burst position;
D5, microprocessor take out two sampled datas that move to right successively; If these two sampled datas that move to right are 01; And two sampled datas non-11 that next time move to right; Be that if preceding two sampled datas that once move to right are 01, these two sampled datas that move to right are 11 in 0 one radix-minus-one complement that is saved to effective code as numerical value then with these two sampled datas that move to right; Be in 1 one radix-minus-one complement that is saved to effective code as numerical value then, obtain the radix-minus-one complement of 8 effective codes preceding two sampled datas that once move to right and this two sampled datas that move to right;
D6, microprocessor continue to take out successively two sampled datas that move to right; If these two sampled datas that move to right are 01; And two sampled datas non-11 that next time move to right; Then these two sampled datas that move to right are 0 one as numerical value and are saved in the effective code that if preceding two sampled datas that once move to right are 01, these two sampled datas that move to right are 11; Then preceding two sampled datas that once move to right and this two sampled datas that move to right are 1 one as numerical value and are saved in the effective code, obtain 8 effective codes;
If the radix-minus-one complement of D7, microprocessor verification effective code and effective code correct, is then exported the effective code that this receives, and resets and execution in step A, otherwise directly resets and execution in step A;
Said preset interrupt mode is that negative edge interrupts.
In the said method, step D is said to decode to effective sampled data, exports the effective code that this receives, and resetting also, execution in step A comprises:
The identification code sampled data afterwards that D4 ', microprocessor move to right and receive is removed the burst position;
D5 ', microprocessor take out two sampled datas that move to right successively; If these two sampled datas that move to right are 10; And two sampled datas non-00 that next time move to right; Be that if preceding two sampled datas that once move to right are 10, these two sampled datas that move to right are 00 in 0 one radix-minus-one complement that is saved to effective code as numerical value then with these two sampled datas that move to right; Be in 1 one radix-minus-one complement that is saved to effective code as numerical value then, obtain the radix-minus-one complement of 8 effective codes preceding two sampled datas that once move to right and this two sampled datas that move to right;
D6 ', microprocessor take out two sampled datas that move to right successively; If these two sampled datas that move to right are 10; And two sampled datas non-00 that next time move to right; Then these two sampled datas that move to right are 0 one as numerical value and are saved in the effective code that if preceding two sampled datas that once move to right are 10, these two sampled datas that move to right are 00; Then preceding two sampled datas that once move to right and this two sampled datas that move to right are 1 one as numerical value and are saved in the effective code, obtain 8 effective codes;
If the radix-minus-one complement of D7 ', microprocessor verification effective code and effective code correct, is then exported the effective code that this receives, and resets and execution in step A, otherwise directly resets and execution in step A;
Said preset interrupt mode is that rising edge interrupts.
A kind of infrared remote control receiving trap, this device comprises:
The GPIO controller; Under the microprocessor configuration, switch to GPIO and interrupt enabled or GPIO impeding shutdown state; Interrupt under the enabled at GPIO, trigger GPIO according to preset interrupt mode and interrupt, receive infrared remote control pulse train from the infrared receiving terminal on the GPIO pin;
Timer under the microprocessor configuration, interrupts according to triggering timer preset interrupt cycle, and the infrared remote control pulse train that receives on the GPIO pin to the GPIO controller is sampled, and obtains sampled data and exports microprocessor to;
Microprocessor is according to the mistiming between double GPIO interruption, when confirming as preamble code; Close GPIO interruption and configuration timer; When confirming as duplication code, when duplication code is effective, export the effective code that received last time, reset and GP configuring IO controller; Confirming neither preamble code also during non-duplication code GP configuring IO controller;
Said microprocessor carries out availability deciding to the sampled data of timer output, and effective sampled data is decoded after the configuration timer, exports the effective code that this receives, and resets and GP configuring IO controller.
In the said apparatus, said timer comprises:
Hardware module under the microprocessor configuration, according to preset interrupt cycle, is decremented at 0 o'clock in count value and triggers the timer interruption, triggers the software interruption processing module; 1/2nd of the cycle of the pulse signal that be the NEC form said preset interrupt cycle;
The software interruption processing module according to the triggering of hardware module, reads the level value of the infrared remote control pulse train on the GPIO controller, obtains sampled data; The identification code that software interruption processing module output sampling obtains is to microprocessor; After the identification code that receives microprocessor output is correct; Data after the continuation sampling identification code also export microprocessor to, after the instruction of the identification code mistake that receives microprocessor output, stop to continue to sample.
In the said apparatus, said little processing comprises:
The GPIO interruption processing module; Calculate the mistiming between double GPIO interruption, the mistiming between double GPIO interrupts is closed GPIO interruption and configuration timer when satisfying first condition; Mistiming between double GPIO interrupts is when satisfying second condition; Generate second zone bit, the mistiming between double GPIO interrupts is triggered the control module that resets when satisfying the 3rd condition;
The timer interruption processing module, whether the identification code of the timer of judge preserving output is correct, if correct, then exports correct the instructing to timer of identification code, otherwise, the instructing to timer and trigger the control module that resets of output identification code mistake;
When said timer interruption processing module comprised the burst position in the sampled data of judging timer output, the timeing closing device interrupted, and generates first zone bit; When confirming that according to first zone bit preamble code is effective, output first is toggled to decoder module, and when confirming that according to second zone bit duplication code is effective, output second is toggled to decoder module;
Decoder module is exported the effective code that received last time according to second triggering, triggers the control module that resets; According to first triggering sampled data of removing the burst position after this identification code is decoded; Obtain radix-minus-one complement and 8 effective codes of 8 effective codes, the radix-minus-one complement of verification effective code and effective code is if correctly then export the effective code that this receives; The triggering control module that resets, otherwise directly trigger the control module that resets;
The control module that resets, with the variable zero clearing of preserving sampled data, and GP configuring IO controller interrupts;
Said preset interrupt mode is that negative edge interrupts or rising edge interrupts; Said first condition is that the mistiming is greater than 13.5ms; Said second condition is that the mistiming is more than or equal to 11.5ms and be less than or equal to 13.5ms; Said the 3rd condition is that the mistiming is less than 11.5ms.
A kind of DVR, this video recorder comprise aforementioned described infrared remote control receiving trap.
Visible by above-mentioned technical scheme, the invention provides a kind of infrared remote control method of reseptance, microprocessor GP configuring IO controller utilizes the GPIO of GPIO controller to interrupt, and receives from the infrared remote control pulse train that connects the infrared receiving terminal on the GPIO pin; Mistiming between microprocessor interrupts according to double GPIO, when confirming as preamble code, close GPIO interruption and configuration timer; Utilize the timer of timer to interrupt; Infrared remote control pulse train to the GPIO controller receives is sampled, and the sampled data of timer output is carried out availability deciding, and effective sampled data is decoded; Export the effective code that this receives, reset and GP configuring IO controller; When microprocessor is confirmed as duplication code, judge the validity of duplication code, after definite duplication code is effective, export the effective code that received last time, reset and GP configuring IO controller; Microprocessor is confirmed neither during the also non-duplication code of preamble code, GP configuring IO controller also continues the judgement of next round GPIO difference break period.The present invention also provides a kind of infrared remote control receiving trap and has been equiped with the DVR of infrared remote control receiving trap.Adopt method of the present invention, device and video recorder, can avoid losing valid data, improve the accuracy of Data Receiving.
Description of drawings
Fig. 1 is the process flow diagram of existing infrared remote control decoding method.
Fig. 2 is the process flow diagram of infrared remote control method of reseptance of the present invention.
Fig. 3 is the structural representation of infrared remote control receiving trap of the present invention.
Embodiment
For make the object of the invention, technical scheme, and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, to further explain of the present invention.
The invention provides a kind of infrared remote control receiving trap and method; And a kind of DVR of having installed infrared remote control receiving trap of the present invention is provided; The GPIO controller that the infrared remote control receiving trap comprises is after microprocessor is carried out the driving code; Be configured to enable the GPIO interruption status, the GPIO controller triggers GPIO according to preset interrupt mode and interrupts, and receives the infrared remote control pulse train from the infrared receiving terminal on the GPIO pin; Timer switches to enabled under the configuration of microprocessor, interrupt according to triggering timer preset interrupt cycle, and the infrared remote control pulse train on the GPIO controller is sampled, and the acquisition sampled data also is saved in the reception variable in the microprocessor; Microprocessor is carried out and is driven code, and the mistiming between interrupting according to double GPIO is when confirming as preamble code; Close GPIO interruption and configuration timer; When confirming as duplication code, when duplication code is effective, export the effective code that received last time, reset and GP configuring IO controller; Confirming that neither preamble code also during non-duplication code, GP configuring IO controller also continues the judgement of GPIO difference break period next time; Microprocessor drives code through carrying out, and earlier the sampled data of timer output is carried out availability deciding, more effective sampled data is decoded, and exports the effective code that this receives, and resets and GP configuring IO controller.
For sake of clarity, the data layout of at first the received pairing data of infrared remote control pulse train of the present invention being followed describes, and is specific as follows:
The corresponding data of the infrared remote control pulse train that receives on the GPIO pin that GPIO controller of the present invention connects are followed NEC with simple repeat code data layout, its sequential definition as table 1-1:
Table 1-1
Content from table 1-1 can be learnt; NEC with simple repeat code data layout is made up of preamble code, numeric data code and burst position (burst sign indicating number) three parts; Wherein, preamble code be an initial code of representing by low level, and an end code of representing by high level form; The number of significant digit of numeric data code and the implication of certain bit representation are decided by concrete sign indicating number type, and the present invention can adopt this yard of uPD6121G type, it be according to low level effectively the order of (LSB first) receive; The burst sign indicating number is used to receive last numeric data code position, is used for judging whether finishing.Simple repeat code among the table 1-1 representes duplication code.
Numeric data code of the present invention partly comprises the radix-minus-one complement of identification code, effective code and effective code; Wherein, identification code is used for discerning infrared remote control pulse train and whether comes from the infrared remote-control device with infrared remote control receiving trap coupling; The radix-minus-one complement of effective code and effective code are to be used for the correctness of the effective code that receives is carried out verification.
Fig. 2 is the process flow diagram of infrared remote control method of reseptance of the present invention.Combine Fig. 2 at present, infrared remote control method of reseptance of the present invention is described, specific as follows:
Step 201: GP configuring IO controller, utilize the GPIO interruption logging to trigger constantly and receive signal;
This step is: microprocessor is carried out and is driven code GP configuring IO controller, and the GPIO that enables the GPIO controller interrupts, and utilizes the pin of GPIO controller, receives from the infrared remote control pulse train that connects the infrared receiving terminal on the GPIO pin.
Specifically comprise: step 2011, microprocessor are carried out and are driven code GP configuring IO controller; Step 2012, GPIO controller, trigger GPIO and interrupt according to preset interrupt mode and the infrared remote control pulse train on the GPIO pin interrupting under the enabled; Step 2013, GPIO controller write down this down trigger constantly in the GPIO interrupt handling program, and receive infrared remote control pulse train.
Microprocessor GP configuring IO controller in the step 2011 specifically can be; Microprocessor is according to the data that drive in the code; Register functions and enabled that the GPIO controller is comprised are configured, so that the GPIO controller is in the working method of GPIO interruption and the state that interruption enables.
Preset interrupt mode in the step 2012 can be negative edge and interrupts, or is the rising edge interruption; If negative edge interrupts, when negative edge occurring in the infrared remote control pulse train that then the GPIO controller receives on the GPIO pin, promptly trigger GPIO and interrupt, write down this and trigger constantly; If rising edge interrupts, when rising edge occurring in the infrared remote control pulse train that then the GPIO controller receives on the GPIO pin, promptly trigger GPIO and interrupt, write down this and trigger constantly.
Carry infrared remote-control device in the high-low level in the step 2013 and send data message.
Step 202: judge the condition that the mistiming between double GPIO interruption satisfies, if satisfy first condition, execution in step 203, if satisfy second condition, execution in step 208 is if satisfy the 3rd condition, execution in step 201;
This step is specially: microprocessor is carried out and is driven code; The mistiming of interrupting according to the double GPIO of GPIO controller, and the data layout followed of the corresponding data of infrared remote control pulse train; What judgement received is preamble code or duplication code; Promptly judge the condition that is satisfied,, then confirm as preamble code if satisfy first condition; If satisfy second condition, then confirm as duplication code; If satisfy the 3rd condition, then neither the also non-duplication code of preamble code.
In this step, first condition is that the mistiming is greater than 13.5ms; Second condition is that the mistiming is more than or equal to 11.5ms and be less than or equal to 13.5ms; The 3rd condition is that the mistiming is less than 11.5ms.
Step 203: close GPIO interruption and configuration timer;
This step is: microprocessor is carried out and is driven code, and the GPIO that closes the GPIO controller interrupts, the configuration timer.Particularly, microprocessor carry out to drive code can be through to GPIO controller register configuration, and that realizes that GPIO to the GPIO controller interrupts closes; Microprocessor is carried out and is driven code configuration timer, is about to initial value and writes in the counter register of timer, and the enable register of configuration timer is so that timer is started working; Initial value can be provided with according to user's needs, such as 1/2nd of cycle of the pulse signal that can be set to the NEC form, i.e. 560us.
Step 204: timer triggers and interrupts, and the level on the sampling GPIO is also preserved the identification code that is obtained;
This step does; Step 2041, timer triggered timer and interrupt according to preset interrupt cycle; Step 2042, timer are in the timer interrupt handling program, and the infrared remote control pulse train that is received on the GPIO pin to the GPIO controller is sampled, and obtain identification code and export microprocessor to preserve.
In the step 2041,1/2nd of the cycle of the preset pulse signal that can be the NEC form interrupt cycle is such as 560us.
In the step 2042, the preset sampling period of timer of the present invention can be divided into first sampling period and N sampling period; N is the integer greater than 1.In order to improve accuracy, 1/4th of the cycle of the pulse signal that first sampling period of the present invention is the NEC form; The N sampling period be the NEC form pulse signal cycle 1/2nd; When timer carries out data sampling, the level value that receives is first sampled according to first sampling period at every turn, can guarantee that sampled point can not be positioned at the edge of level value,, reduced the probability of mistake sampling such as near mid point.
Step 205: judge whether identification code is correct, if correct, execution in step 206, otherwise execution in step 213;
This step is: microprocessor is carried out and is driven code, according to the identification code of timer output, judges the correctness of identification code, if correct; Correct the instructing of output identification code to timer, execution in step 206, otherwise; Output identification code mistake is carried out fault processing, execution in step 213.Particularly, can store the identification code of the infrared remote-control device that matees with this infrared remote control receiving trap in the microprocessor in advance.
Step 206: the data after the timer sampling identification code;
This step is: timer is according to carry out the correct instruction of identification code that drives code from microprocessor; According to the preset sampling period; The infrared remote control pulse train that receives on the GPIO pin of continuation sampling GPIO controller obtains identification code sampled data afterwards.
The implication in the sampling period of presetting in the implication in the preset sampling period of mentioning in this step and the step 204 is identical, repeats no more at this.
Step 207: judge whether to receive the burst sign indicating number, if, execution in step 208, otherwise execution in step 206:
This step is: microprocessor is carried out and is driven code, according to the sampled data after the identification code of timer output, judges in this identification code sampled data afterwards whether comprise the burst sign indicating number; If then proof receives complete data, timeing closing device; Execution in step 208; Otherwise, the sampled data after the identification code of waiting timer output, promptly execution in step 206.
Step 208: produce a zone bit;
This step can be specifically carried out through microprocessor and is driven code and trigger the flow process that user data is mutual, produces one in order to expression effective first zone bit of preamble code or one in order to represent effective second zone bit of duplication code.
Step 209: effectively still duplication code is effective to judge preamble code, if preamble code is effective, then execution in step 210, if duplication code is effective, then execution in step 212;
This step specifically can be the zone bit that microprocessor generates according to step 208, judges the validity of preamble code and duplication code.
Step 210: sampled data is decoded;
If the GPIO controller has adopted the negative edge interruption, then this step comprises: step 2101, microprocessor are carried out and are driven code, and the sampled data after the identification code that receives that moves to right is removed the burst position; Step 2102; Microprocessor is carried out and is driven code, takes out two sampled datas that move to right successively, if these two sampled datas that move to right are 01; And two sampled datas non-11 that next time move to right; Be that if preceding two sampled datas that once move to right are 01, these two sampled datas that move to right are 11 in 0 one radix-minus-one complement that is saved to effective code as numerical value then with these two sampled datas that move to right; Be in 1 one radix-minus-one complement that is saved to effective code as numerical value then, obtain the radix-minus-one complement of 8 effective codes preceding two sampled datas that once move to right and this two sampled datas that move to right; Step 2103; Microprocessor is carried out and is driven code, takes out two sampled datas that move to right successively, if these two sampled datas that move to right are 01; And two sampled datas non-11 that next time move to right; Then these two sampled datas that move to right are 0 one as numerical value and are saved in the effective code that if preceding two sampled datas that once move to right are 01, these two sampled datas that move to right are 11; Then preceding two sampled datas that once move to right and this two sampled datas that move to right are 1 one as numerical value and are saved in the effective code, obtain 8 effective codes; Step 2104, microprocessor are carried out and are driven code check, the radix-minus-one complement of effective code and effective code, if correct, execution in step 211, otherwise execution in step 213.
If the GPIO controller has adopted the rising edge interruption, then this step comprises: step 2101 ', microprocessor is carried out and is driven code, and the sampled data after the identification code that receives that moves to right is removed the burst position; Step 2102 '; Microprocessor is carried out and is driven code, takes out two sampled datas that move to right successively, if these two sampled datas that move to right are 10; And two sampled datas non-00 that next time move to right; Be that if preceding two sampled datas that once move to right are 10, these two sampled datas that move to right are 00 in 0 one radix-minus-one complement that is saved to effective code as numerical value then with these two sampled datas that move to right; Be in 1 one radix-minus-one complement that is saved to effective code as numerical value then, obtain the radix-minus-one complement of 8 effective codes preceding two sampled datas that once move to right and this two sampled datas that move to right; Step 2103 '; Microprocessor is carried out and is driven code, takes out two sampled datas that move to right successively, if these two sampled datas that move to right are 10; And two sampled datas non-00 that next time move to right; Then these two sampled datas that move to right are 0 one as numerical value and are saved in the effective code that if preceding two sampled datas that once move to right are 10, these two sampled datas that move to right are 00; Then preceding two sampled datas that once move to right and this two sampled datas that move to right are 1 one as numerical value and are saved in the effective code, obtain 8 effective codes; Step 2104 ', microprocessor is carried out and is driven code, the radix-minus-one complement of verification effective code and effective code, if correct, execution in step 211, otherwise execution in step 213.
Step 211: export the effective code that this receives, execution in step 213 afterwards;
But the microprocessor among the present invention is carried out the effective code that drives code this effective code that receives of buffer memory and received last time; At the decision directed sign indicating number effectively and effective code verification when correct, export the effective code that this receives, when judging that duplication code is effective, because duplication code is the effective code that repeats to send, the effective code that received exportable last time.
Step 212: export the effective code that received last time;
This step is carried out by microprocessor and is driven code, the effective code that received the last time of output buffers.
Step 213: reset, execution in step 201 afterwards.
Carry out the driving code for microprocessor in this step, with the variable zero clearing that receives sampled data, so that continue to receive follow-up infrared remote control pulse train.
Fig. 3 is the structural representation of infrared remote control receiving trap of the present invention.Combine Fig. 3 at present, the structure of infrared remote control receiving trap of the present invention is described, specific as follows:
Infrared remote control receiving trap of the present invention can be installed in DVR, receives the infrared remote control pulse train of infrared remote-control device output.
Infrared remote control receiving trap of the present invention comprises: GPIO controller 30, timer 31 and microprocessor 32.Wherein, GPIO controller 30 can connect infrared receiving terminal through the GPIO pin on it, and infrared receiving terminal is in order to receive infrared remote control pulse train; Microprocessor 32 connects GPIO controller 30 and timer 31.
Mistiming between microprocessor 32 interrupts according to double GPIO; When confirming as preamble code, close GPIO interruption and configuration timer 31, when confirming as duplication code; When duplication code is effective, export the effective code that received last time; Reset and GP configuring IO controller 30, confirming that neither preamble code also during non-duplication code, GP configuring IO controller 30 also carries out the judgement of next round GPIO difference break period.Microprocessor 32 carries out availability deciding to the sampled data of timer 31 outputs, and effective sampled data is decoded after confirming to receive preamble code, exports the effective code that this receives, and resets and GP configuring IO controller 30.
Wherein, timer 31 comprises: hardware module 311 and software interruption processing module 312.
Software interruption processing module 312 according to the sampling period of microprocessor 32 configurations, reads the level value of the infrared remote control pulse train on the GPIO controller 30 according to the configuration of microprocessor 32, obtains sampled data.Preserve in the variable of sampled data in identification code to the microprocessor 32 that the 312 output samplings of software interruption processing module obtain; After the correct instruction of the identification code that receives microprocessor 32 outputs; Continuing data and the output afterwards of sampling identification code preserves in the variable of sampled data; After the instruction of the identification code mistake that receives microprocessor 32 outputs, stop to continue sampling.Wherein, the duration in first sampling period in the sampling period be the N sampling period duration 1/2nd; N is the integer greater than 1.
Wherein, microprocessor 32 comprises: GPIO interruption processing module 321, timer interruption processing module 322, decoder module 323 and the control module 324 that resets.
GPIO interruption processing module 321 GP configuring IO controllers 30; Obtain the mistiming between double GPIO interruption from GPIO controller 30, the mistiming between double GPIO interrupts is closed GPIO interruption and configuration timer 31 when satisfying first condition; Mistiming between double GPIO interrupts is when satisfying second condition; Generate second zone bit and export timer interruption processing module 322 to, the mistiming between double GPIO interrupts is when satisfying the 3rd condition, GP configuring IO controller 30.
Obtaining sampled data on the GPIO pin of timer interruption processing module 322 with GPIO controller 30 is saved in the variable; Judge according to sampled data whether the identification code that timer 31 at first samples is correct, if correct, the output identification code is correct; Continuation is preserved sampled data; Otherwise, output identification code mistake, and trigger the control module 324 that resets.
When timer interruption processing module 322 comprised the burst position in the sampled data of judging timer 31 outputs, the interruption of timeing closing device 30 promptly stopped the sampling of timer 30, generates first zone bit; When confirming that according to first zone bit preamble code is effective, output first is toggled to decoder module 323, and when confirming that according to second zone bit duplication code is effective, output second is toggled to decoder module 323.
The control module 324 that resets, GP configuring IO controller 30 makes GPIO controller 30 be in GPIO and interrupts enabled.Wherein, the control module that resets 324 can be carried out cleaning operation to the variable that microprocessor 32 driving codes comprise, so that carry out the preservation of next data sampling.
In the above-mentioned preferred embodiment of the present invention; The infrared remote control receiving trap utilizes the GPIO of GPIO controller to interrupt receiving infrared remote control pulse train, utilizes the timer of timer to interrupt, and the infrared remote control pulse train that the GPIO controller receives is sampled; Mistiming between microprocessor interrupts according to double GPIO judges it is preamble code or duplication code; After definite preamble code is effective, the sampled data of timer output is decoded, obtain the effective code that this receives; After definite duplication code is effective, export the effective code that received last time.In addition, timer is when sampling, and in order to improve accuracy, first sampling period of the each sampling of timer is set to 1/2nd of the subsequent sampling cycle, so that sampled point can not drop on the edge of level value, has also further avoided losing of effective code.
The above is merely preferred embodiment of the present invention, and is in order to restriction the present invention, not all within spirit of the present invention and principle, any modification of being made, is equal to replacement, improvement etc., all should be included within the scope that the present invention protects.
Claims (11)
1. an infrared remote control method of reseptance is characterized in that, this method comprises:
A, microprocessor GP configuring IO controller utilize the GPIO of GPIO controller to interrupt, and receive from the infrared remote control pulse train that connects the infrared receiving terminal on the GPIO pin;
Mistiming between B, microprocessor interrupt according to double GPIO, execution in step C when confirming as preamble code, execution in step E when confirming as duplication code confirms neither execution in step A during the also non-duplication code of preamble code;
C, microprocessor are closed GPIO interruption and configuration timer, utilize the timer of timer to interrupt, and the infrared remote control pulse train that is received on the GPIO pin to the GPIO controller is sampled;
D, microprocessor carry out availability deciding to the sampled data of timer output, and effective sampled data is decoded, and export the effective code that this receives, and reset and execution in step A;
E, microprocessor are exported the effective code that received last time after judging that duplication code effectively, reset and execution in step A.
2. method according to claim 1 is characterized in that, the said GPIO of GPIO controller that utilizes of steps A interrupts, and receives from the infrared remote control pulse train that connects the infrared receiving terminal on the GPIO pin to comprise:
A1, GPIO controller trigger GPIO and interrupt according to preset interrupt mode and the infrared remote control pulse train on the GPIO pin;
A2, GPIO controller receive the infrared remote control pulse train on the infrared receiving terminal that the GPIO pin connected in the GPIO interrupt procedure.
3. method according to claim 1 is characterized in that, said step B comprises:
B1, microprocessor obtain the mistiming between double GPIO interruption from the GPIO controller;
The condition that mistiming between B2, the more double GPIO of microprocessor interrupt satisfies if satisfy first condition, is confirmed as preamble code; Execution in step C if satisfy second condition, confirms as duplication code; Execution in step E; If satisfy the 3rd condition, confirm neither the also non-duplication code of preamble code execution in step A;
Said first condition is that the mistiming is greater than 13.5ms; Said second condition is that the mistiming is more than or equal to 11.5ms and be less than or equal to 13.5ms; Said the 3rd condition is that the mistiming is less than 11.5ms.
4. method according to claim 1 is characterized in that, the said timer of timer that utilizes of step C interrupts, and the infrared remote control pulse train of GPIO controller reception is sampled to be comprised:
C1, timer triggered timer and interrupt according to preset interrupt cycle; 1/2nd of the cycle of the pulse signal that be the NEC form said preset interrupt cycle
C2, timer are in the timer interrupt procedure, and according to the preset sampling period, the infrared remote control pulse train that receives on the GPIO pin to the GPIO controller is sampled, and obtain identification code and export microprocessor to preserve;
C3, timer are after the correct instruction of the identification code that receives microprocessor output; The infrared remote control pulse train that receives on the GPIO pin of continuation to the GPIO controller is sampled; Sampled data after the acquisition identification code also exports microprocessor to; After the instruction of the identification code mistake that receives microprocessor output, stop to continue sampling.
5. method according to claim 1 is characterized in that, the said microprocessor of step D carries out availability deciding to the sampled data of timer output and comprises:
Whether the identification code of D1, microprocessor judges timer output is correct, if correct, and correct the instructing of output identification code to timer and execution in step D2, if mistake, the instructing to timer of output identification code mistake is with timeing closing device and execution in step A;
D2, microprocessor receive the identification code sampled data afterwards of timer output, judge whether to receive the burst position, if then generate first zone bit and execution in step D3, otherwise continue to receive the sampled data that timer is exported;
D3, microprocessor are judged the validity of preamble code according to first zone bit.
6. method according to claim 2 is characterized in that, step D is said to decode to effective sampled data, exports the effective code that this receives, and resetting also, execution in step A comprises:
The identification code sampled data afterwards that D4, microprocessor move to right and receive is removed the burst position;
D5, microprocessor take out two sampled datas that move to right successively; If these two sampled datas that move to right are 01; And two sampled datas non-11 that next time move to right; Be that if preceding two sampled datas that once move to right are 01, these two sampled datas that move to right are 11 in 0 one radix-minus-one complement that is saved to effective code as numerical value then with these two sampled datas that move to right; Be in 1 one radix-minus-one complement that is saved to effective code as numerical value then, obtain the radix-minus-one complement of 8 effective codes preceding two sampled datas that once move to right and this two sampled datas that move to right;
D6, microprocessor continue to take out successively two sampled datas that move to right; If these two sampled datas that move to right are 01; And two sampled datas non-11 that next time move to right; Then these two sampled datas that move to right are 0 one as numerical value and are saved in the effective code that if preceding two sampled datas that once move to right are 01, these two sampled datas that move to right are 11; Then preceding two sampled datas that once move to right and this two sampled datas that move to right are 1 one as numerical value and are saved in the effective code, obtain 8 effective codes;
If the radix-minus-one complement of D7, microprocessor verification effective code and effective code correct, is then exported the effective code that this receives, and resets and execution in step A, otherwise directly resets and execution in step A;
Said preset interrupt mode is that negative edge interrupts.
7. method according to claim 2 is characterized in that, step D is said to decode to effective sampled data, exports the effective code that this receives, and resetting also, execution in step A comprises:
The identification code sampled data afterwards that D4 ', microprocessor move to right and receive is removed the burst position;
D5 ', microprocessor take out two sampled datas that move to right successively; If these two sampled datas that move to right are 10; And two sampled datas non-00 that next time move to right; Be that if preceding two sampled datas that once move to right are 10, these two sampled datas that move to right are 00 in 0 one radix-minus-one complement that is saved to effective code as numerical value then with these two sampled datas that move to right; Be in 1 one radix-minus-one complement that is saved to effective code as numerical value then, obtain the radix-minus-one complement of 8 effective codes preceding two sampled datas that once move to right and this two sampled datas that move to right;
D6 ', microprocessor take out two sampled datas that move to right successively; If these two sampled datas that move to right are 10; And two sampled datas non-00 that next time move to right; Then these two sampled datas that move to right are 0 one as numerical value and are saved in the effective code that if preceding two sampled datas that once move to right are 10, these two sampled datas that move to right are 00; Then preceding two sampled datas that once move to right and this two sampled datas that move to right are 1 one as numerical value and are saved in the effective code, obtain 8 effective codes;
If the radix-minus-one complement of D7 ', microprocessor verification effective code and effective code correct, is then exported the effective code that this receives, and resets and execution in step A, otherwise directly resets and execution in step A;
Said preset interrupt mode is that rising edge interrupts.
8. an infrared remote control receiving trap is characterized in that, this device comprises:
The GPIO controller; Under the microprocessor configuration, switch to GPIO and interrupt enabled or GPIO impeding shutdown state; Interrupt under the enabled at GPIO, trigger GPIO according to preset interrupt mode and interrupt, receive infrared remote control pulse train from the infrared receiving terminal on the GPIO pin;
Timer under the microprocessor configuration, interrupts according to triggering timer preset interrupt cycle, and the infrared remote control pulse train that receives on the GPIO pin to the GPIO controller is sampled, and obtains sampled data and exports microprocessor to;
Microprocessor is according to the mistiming between double GPIO interruption, when confirming as preamble code; Close GPIO interruption and configuration timer; When confirming as duplication code, when duplication code is effective, export the effective code that received last time, reset and GP configuring IO controller; Confirming neither preamble code also during non-duplication code GP configuring IO controller;
Said microprocessor carries out availability deciding to the sampled data of timer output, and effective sampled data is decoded after the configuration timer, exports the effective code that this receives, and resets and GP configuring IO controller.
9. device according to claim 8 is characterized in that, said timer comprises:
Hardware module under the microprocessor configuration, according to preset interrupt cycle, is decremented at 0 o'clock in count value and triggers the timer interruption, triggers the software interruption processing module; 1/2nd of the cycle of the pulse signal that be the NEC form said preset interrupt cycle;
The software interruption processing module according to the triggering of hardware module, reads the level value of the infrared remote control pulse train on the GPIO controller, obtains sampled data; The identification code that software interruption processing module output sampling obtains is to microprocessor; After the identification code that receives microprocessor output is correct; Data after the continuation sampling identification code also export microprocessor to, after the instruction of the identification code mistake that receives microprocessor output, stop to continue to sample.
10. device according to claim 8 is characterized in that, said little processing comprises:
The GPIO interruption processing module; Calculate the mistiming between double GPIO interruption, the mistiming between double GPIO interrupts is closed GPIO interruption and configuration timer when satisfying first condition; Mistiming between double GPIO interrupts is when satisfying second condition; Generate second zone bit, the mistiming between double GPIO interrupts is triggered the control module that resets when satisfying the 3rd condition;
The timer interruption processing module, whether the identification code of the timer of judge preserving output is correct, if correct, then exports correct the instructing to timer of identification code, otherwise, the instructing to timer and trigger the control module that resets of output identification code mistake;
When said timer interruption processing module comprised the burst position in the sampled data of judging timer output, the timeing closing device interrupted, and generates first zone bit; When confirming that according to first zone bit preamble code is effective, output first is toggled to decoder module, and when confirming that according to second zone bit duplication code is effective, output second is toggled to decoder module;
Decoder module is exported the effective code that received last time according to second triggering, triggers the control module that resets; According to first triggering sampled data of removing the burst position after this identification code is decoded; Obtain radix-minus-one complement and 8 effective codes of 8 effective codes, the radix-minus-one complement of verification effective code and effective code is if correctly then export the effective code that this receives; The triggering control module that resets, otherwise directly trigger the control module that resets;
The control module that resets, with the variable zero clearing of preserving sampled data, and GP configuring IO controller interrupts;
Said preset interrupt mode is that negative edge interrupts or rising edge interrupts; Said first condition is that the mistiming is greater than 13.5ms; Said second condition is that the mistiming is more than or equal to 11.5ms and be less than or equal to 13.5ms; Said the 3rd condition is that the mistiming is less than 11.5ms.
11. a DVR is characterized in that, this video recorder comprises each described infrared remote control receiving trap of aforementioned claim 8 to 10.
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