CN102760071A - Method for accelerating computing system simulator - Google Patents

Method for accelerating computing system simulator Download PDF

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Publication number
CN102760071A
CN102760071A CN2011101032415A CN201110103241A CN102760071A CN 102760071 A CN102760071 A CN 102760071A CN 2011101032415 A CN2011101032415 A CN 2011101032415A CN 201110103241 A CN201110103241 A CN 201110103241A CN 102760071 A CN102760071 A CN 102760071A
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CN
China
Prior art keywords
simulator
module
fpga
computing system
simulation
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Pending
Application number
CN2011101032415A
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Chinese (zh)
Inventor
白月习
刘兴丽
陈杉杉
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BEIJING MIRACLE SCIENCE AND TECHNOLOGY Co Ltd
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BEIJING MIRACLE SCIENCE AND TECHNOLOGY Co Ltd
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Priority to CN2011101032415A priority Critical patent/CN102760071A/en
Publication of CN102760071A publication Critical patent/CN102760071A/en
Pending legal-status Critical Current

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Abstract

The invention provides a method for accelerating a computing system simulator. The method comprises the following steps: firstly splitting assembled modules of the simulator, wherein each module has an independent simulation function; then selecting a module which consumes time and easily realizes hardware programming; realizing an HDL (Hardware Description Language), and compiling and loading the module realizing the HDL into an FPGA (Field Programmable Gate Array) platform; and finally connecting the module realized by the FPGA with a module realized without an FPGA, and commonly simulating a computing system. The method can be used for improving the running speed of the simulator.

Description

The method that a kind of computing system simulator quickens
Technical field
The present invention relates to the method that a kind of computing system simulator quickens, particularly a kind of method that adopts the computing system simulator acceleration of software and hardware combining mode.
Background technology
The simulator research development has been carried out for a long time, up to the present, has accumulated a large amount of analogue techniques.In recent years, along with the fast development of hardware system, the fictitious load of simulator is more and more heavier.Therefore; Mainly pay close attention to the problem of analog rate both at home and abroad for simulator research, main research is toward two aspect development, the one, the further parallelization of simulator; To make full use of existing parallel system resource, another is that FPGA quickens or total system FPGA simulation.From present present Research and trend; Both at home and abroad simulator The Research of Relevant Technology and exploitation all also relatively are confined in a certain respect; Especially seldom take into account indexs such as the extensibility of simulator design, debugging property, and still there is such problem in development trend in a short time.Therefore, this project will be carried out deep comprehensively research to the simulator gordian technique, be desirably in critical aspects such as extensibility, analog rate and debugging property and all be improved.
Summary of the invention
Technical matters to be solved by this invention is the design methodology, improves the travelling speed of computing system simulator.
A kind of method that adopts the computing system simulator acceleration of software and hardware combining mode of the present invention, this method comprises following step at least:
Step 1: split the composition module of simulator, each module has independently analog functuion;
Step 2: select consuming time and be easy to the module that hardware programming realizes, carry out hardware description language and realize;
Step 3: will be loaded in the FPGA platform with the module compiles that hardware description language is realized;
Step 4: connect module that realizes with FPGA and the module that does not realize, common analog computing system with FPGA;
The method that the computing system simulator of a kind of software and hardware combining mode that the present invention relates to quickens makes the simulator travelling speed be improved.
Embodiment
Simulator has important effect designing and developing of computer system in the process: design initial, simulator can be used for various design proposals are carried out the coarseness simulation, select optimization design scheme through comparing analog result; During the product development, simulator is used for various microstructure design are assessed, and some selections are traded off; In the product development later stage, simulator mainly is used for carrying out the systemic software development of goal systems, makes hardware and software development to carry out simultaneously, accelerates system development speed; After system accomplished, simulator can be obtained abundant tracking information, thereby system is carried out bottleneck analysis and performance optimization.Because simulator has above-mentioned vital role, academic and industry member has all been developed a large amount of simulators.
Simulator has several important measurement indexs: speed, precision, extensibility and debugging property etc.Speed refers to the speed of simulator execution simulation task, representes recently that with carrying out the time of using and on host, carrying out same application on the simulator this time ratio is commonly referred to reduction gear ratio usually; Precision refers to the goal systems that simulator simulates and the degree of closeness of real system, improves accuracy of simulation with accurate timing simulation usually, and the percentage that every used periodicity of instruction that the simulation commonly used of CPU simulator obtains and actual value depart from is recently represented precision; Extensibility refers to that simulator simulates the comfort level of different structure through configuration and whether can support the user to add easily or delete module, and the add-on third party instrument is integrated etc.; Debugging complexity when debugging property is meant and advances system software and applied software development based on simulator.One desirable simulator requirement execution speed is fast, simulation precision is high, be easy to expansion and convenient debugging,
But in fact, often there be relation, especially speed and the precision of some mutual restriction between these several persons of speed, precision, extensibility and debugging property, be difficult to get both simultaneously.In general, level of abstraction is high more, the speed of simulation is just fast more, but accuracy of simulation is also poor more; Increase simulation precision and then increased fictitious load, bring the decline of analog rate, and because the granularity of simulation attenuates, extendability also can be affected with debugging property.Therefore, according to different needs, simulator is often given priority in this Several Factors.Usually; In the hardware system and software kit product development process of reality; Requirement to simulation precision is lower, but very high to speed, extensibility and the requirement of debugging property, in addition; Total system simulator in the simulator can be supported developing operation operating system, obtain the abundant functions such as trace of application program, so total system simulator has application more widely in the actual product exploitation.Under situation about need assess the hardware microstructure, simulator often need be simulated sequential accurately, yet; Timing simulation is compared functional simulation; Analog rate can be obviously slower, therefore, and in the software simulator of mixed function simulation and timing simulation; Timing simulation often becomes bottleneck of performance, and this patent utilizes hardware resource to quicken.Because FPGA has travelling speed characteristics faster, therefore be fit to very much be used for carrying out local timing simulation, so both kept the dirigibility of software simulator, remedied the slower deficiency of software simulator travelling speed again.After adding FPGA hardware, whole simulator will be the system of a software and hardware combining, and the functional simulation part still uses software approach to realize, and partly uses FPGA to realize for timing simulation, can come mutual between the two through a buffer zone.By this method, can realize a simulator that travelling speed is fast, simulation precision is high.
When realizing, at first split the composition module of simulator, each module has independently analog functuion; Select consuming time then and be easy to the module that hardware programming realizes, carry out hardware description language and realize; Next, will be loaded in the FPGA platform with the module compiles that hardware description language is realized; At last, connect module that realizes with FPGA and the module that does not realize, common analog computing system with FPGA;
After above-mentioned technical scheme is implemented, can when guaranteeing accuracy of simulator, increase substantially analog rate, this is that very important techniques promotes concerning simulator.
It should be noted last that above embodiment is only in order to explanation and unrestricted technical scheme described in the invention; Therefore, although this instructions has carried out detailed explanation with reference to the above embodiments to the present invention,, those of ordinary skill in the art should be appreciated that still and can make amendment or replacement to the present invention with being equal to; And all do not break away from the technical scheme and the improvement thereof of the spirit and scope of the present invention, and it all should be encompassed in the middle of the claim scope of the present invention.

Claims (1)

1. the method quickened of a computing system simulator, it is characterized in that: this method comprises following step at least:
Step 1: split the composition module of simulator, each module has independently analog functuion.
Step 2: select consuming time and be easy to the module that hardware programming realizes, carry out hardware description language and realize.
Step 3: will be loaded into the module compiles that hardware description language is realized in the FPGA platform.
Step 4: connect module that realizes with FPGA and the module that does not realize, common analog computing system with FPGA.
CN2011101032415A 2011-04-25 2011-04-25 Method for accelerating computing system simulator Pending CN102760071A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011101032415A CN102760071A (en) 2011-04-25 2011-04-25 Method for accelerating computing system simulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2011101032415A CN102760071A (en) 2011-04-25 2011-04-25 Method for accelerating computing system simulator

Publications (1)

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CN102760071A true CN102760071A (en) 2012-10-31

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Application Number Title Priority Date Filing Date
CN2011101032415A Pending CN102760071A (en) 2011-04-25 2011-04-25 Method for accelerating computing system simulator

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101499937A (en) * 2009-03-16 2009-08-05 盛科网络(苏州)有限公司 Software and hardware collaborative simulation verification system and method based on FPGA

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101499937A (en) * 2009-03-16 2009-08-05 盛科网络(苏州)有限公司 Software and hardware collaborative simulation verification system and method based on FPGA

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
江霞林等: "基于FPGA的软硬件协同仿真加速技术", 《中国集成电路》 *
胡力佳等: "数字集成电路设计中的硬件加速验证技术", 《现代电子技术》 *

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Application publication date: 20121031