CN102736013A - Idle state test method of system-on-chip (SoC), system and test device - Google Patents
Idle state test method of system-on-chip (SoC), system and test device Download PDFInfo
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Abstract
The invention is suitable for the embedded technology field and provides an idle state test method of a system-on-chip (SoC), a system and a test device. The method comprises the followings steps: A. Carrying out power-on reset of the SoC and acquiring an identification number from a preset position in a preset random access memory; B. Calculating the identification number of a test case, wherein the test case is the test case of entering into/exiting the idle state of the SoC; C. Determining whether the identification number of the test case is a null character, if the identification number of the test case is the null character, exiting the test of the SoC, and if the identification number of the test case is not the null character, acquiring an address of the test case and executing the test case; after the test is completed, writing the identification number of the test case into the preset position of the preset random access memory and entering into the step A. According to the invention, batch test of the test case of entering into/exiting the idle state of the SoC is realized; test efficiency of a test system is increased and a processing amount of data is reduced.
Description
Technical field
The invention belongs to field of embedded technology, relate in particular to a kind of idle condition method of testing, system and proving installation of SoC chip.
Background technology
(SoC is an integrated circuit that application-specific target is arranged System-on-Chip) to system level chip, can be a complete system, for example microprocessor ARM, IP core (IP kernel) and storer.The SoC chip also is a kind of general designation of technology simultaneously,, divides to software/hardware from confirming that systemic-function begins in order to realization, and accomplishes the whole process that designs.
At present, the SoC chip has been widely used in the various handheld devices, for example digital camera, smart mobile phone etc.; This just requires the SoC chip to possess the characteristic of low-power consumption; In order to reduce the power consumption of SoC chip, comparatively effective method is the power supply of closing temporary transient no module in the SoC chip, makes the SoC chip enter into free time (idle) state; When the SoC chip is in idle condition; Except clock (RTC), power management module (PMU), internal random access memory (RAM) and external RAM, other module then can be carried out power down process, and wherein internal RAM is used for storing the configuration of the preceding chip of outage; The module of outage is used for recovering its configuration when reworking, and external RAM is used for save routine and data.The SoC chip can get into the idle state through the mode of software, also can withdraw from the idle state through the mode of software/hardware/timing, and a kind of mode of entrance and a kind of withdrawing mode are a kind of combination, and every kind of combined situation all need be carried out testing authentication.
In the SoC chip design, testing authentication is a link the most complicated, the most consuming time in the SoC chip design flow process, has approximately taken the over half of entire chip construction cycle, adopts advanced design and method of testing to become the successful key of SoC chip design.Get into/withdraw from the reliability of idle status method in order to test the SoC chip; Existing method of testing is in the entering of carrying out the SoC chip/when withdrawing from the test of idle state; Once can only test a test case; When the test case of the entering of the SoC chip of needs tests/withdraw from idle state more for a long time, test macro needs more time overhead carry out the compiling of test case, and in test process; Need to handle a plurality of different simulation waveform files, reduced the testing efficiency of test macro.
Summary of the invention
The purpose of the embodiment of the invention is to provide a kind of idle condition method of testing, system and proving installation of SoC chip; Existing method of testing is intended to solve owing to can't be carried out the lasting test of a plurality of test cases; Cause the test macro deal with data to increase, the problem that the testing efficiency of test macro reduces.
The embodiment of the invention is achieved in that a kind of idle condition method of testing of SoC chip, and said method comprises the steps:
A, carry out the electrification reset of SoC chip, after said SoC chip power resetted, the predeterminated position from preset RAS obtained an identification number;
B, calculate the identification number of test case according to said identification number, said test case is the test case that said SoC chip gets into/exits from idle status;
C, judge whether the identification number of said test case is NUL; It is the test of then withdrawing from said SoC chip; Otherwise the address that obtains said test case according to the corresponding relation of the identification number of said test case and said test case; Carry out said test case, after test is accomplished the identification number of said test case is write the preset position in the said preset RAS, and jump to steps A.
Another purpose of the embodiment of the invention is to provide a kind of idle condition test macro of SoC chip, and said system comprises:
The identification number acquiring unit is used to carry out the electrification reset of SoC chip, and after said SoC chip power resetted, the predeterminated position from preset RAS obtained an identification number;
The identification number computing unit, the identification number that is used for obtaining according to said identification number acquiring unit calculates the identification number of test case, the test case that said test case gets into/exits from idle status for the SoC chip;
The identification number judging unit, whether the identification number of the test case that is used to judge that said identification number computing unit calculates is NUL;
Withdraw from the unit, be used for when the identification number of test case is NUL, withdrawing from the test of SoC chip; And
Test cell; Be used for when the identification number of test case is not NUL; The address that obtains said test case according to the corresponding relation of the identification number of said test case and said test case; Carry out said test case, after test is accomplished the identification number of said test case is write the preset position in the said preset RAS.
Another purpose of the embodiment of the invention is to provide a kind of SoC proving installation that comprises the idle condition test macro of above-mentioned SoC chip.
When the embodiment of the invention was tested in the test case that the SoC chip is got into/exits from idle status, after resetting through the SoC chip power, the predeterminated position from preset RAS obtained an identification number; Calculate the identification number of test case according to this identification number; Whether the identification number of judging test case is NUL, is the test of then withdrawing from the SoC chip, otherwise the address that obtains test case according to the corresponding relation of the identification number of test case and test case; Implementation of test cases; Identification number with test case after test is accomplished writes the preset position in the preset RAS, and circulation is carried out all to be tested until test case, thus the batch testing of the test case that realizes the SoC chip is got into/exits from idle status; Improve the testing efficiency of test macro, reduced the treatment capacity of data.
Description of drawings
Fig. 1 is the realization flow figure of the idle condition method of testing of the SoC chip that provides of first embodiment of the invention;
Fig. 2 is the realization flow figure of the idle condition method of testing of the SoC chip that provides of second embodiment of the invention;
Fig. 3 is the structural drawing of the idle condition test macro of the SoC chip that provides of third embodiment of the invention.
Embodiment
In order to make the object of the invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with accompanying drawing and embodiment.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
When the embodiment of the invention was tested in the test case that the SoC chip is got into/exits from idle status, after resetting through the SoC chip power, the predeterminated position from preset RAS obtained an identification number; Calculate the identification number of test case according to this identification number; Whether the identification number of judging test case is NUL, is the test of then withdrawing from the SoC chip, otherwise the address that obtains test case according to the corresponding relation of the identification number of test case and test case; Implementation of test cases; Identification number with test case after test is accomplished writes the preset position in the preset RAS, and circulation is carried out all to be tested until test case, thus the batch testing of the test case that realizes the SoC chip is got into/exits from idle status; Improve the testing efficiency of test macro, reduced the treatment capacity of data.
The embodiment of the invention provides a kind of idle condition method of testing of SoC chip, and said method comprises the steps:
A, carry out the electrification reset of SoC chip, after said SoC chip power resetted, the predeterminated position from preset RAS obtained an identification number;
B, calculate the identification number of test case, the test case that said test case gets into/exits from idle status for the SoC chip according to said identification number;
C, judge whether the identification number of said test case is NUL; It is the test of then withdrawing from said SoC chip; Otherwise the address that obtains said test case according to the corresponding relation of the identification number of said test case and said test case; Carry out said test case, after test is accomplished the identification number of said test case is write the preset position in the said preset RAS, and jump to steps A.
The embodiment of the invention also provides a kind of idle condition test macro of SoC chip, and said system comprises:
The identification number acquiring unit is used to carry out the electrification reset of SoC chip, and after said SoC chip power resetted, the predeterminated position from preset RAS obtained an identification number;
The identification number computing unit, the identification number that is used for obtaining according to said identification number acquiring unit calculates the identification number of test case, the test case that said test case gets into/exits from idle status for the SoC chip;
The identification number judging unit, whether the identification number of the test case that is used to judge that said identification number computing unit calculates is NUL;
Withdraw from the unit, be used for when the identification number of test case is NUL, withdrawing from the test of SoC chip; And
Test cell; Be used for when the identification number of test case is not NUL; The address that obtains said test case according to the corresponding relation of the identification number of said test case and said test case; Carry out said test case, after test is accomplished the identification number of said test case is write the preset position in the said preset RAS.
The embodiment of the invention also provides a kind of SoC proving installation that comprises the idle condition test macro of above-mentioned SoC chip.
When the embodiment of the invention is tested in the test case that the SoC chip is got into/exits from idle status; After resetting through the SoC chip power; Predeterminated position from preset RAS obtains an identification number, calculates the identification number of test case according to this identification number, the address that obtains test case according to the corresponding relation of the identification number of test case and test case; Implementation of test cases; Identification number with test case after test is accomplished writes the preset position in the preset RAS, and circulation is carried out all to be tested until test case, thus the batch testing of the test case that realizes the SoC chip is got into/exits from idle status; Improve the testing efficiency of test macro, reduced the treatment capacity of data.
Below in conjunction with specific embodiment concrete realization of the present invention is described in detail:
Embodiment one:
In embodiments of the present invention; Whole test cases that the SoC chip is got into/exits from idle status are kept in the random access memory; Set up the one-to-one relationship of identification number and whole test cases; Through implementation of test cases in SoC chip enable process, to be tested intact until whole test cases that all SoC chips get into/exit from idle status.
Fig. 1 shows the realization flow of the idle condition method of testing of the SoC chip that first embodiment of the invention provides, and details are as follows:
In step S101, carry out the electrification reset of SoC chip, after the SoC chip power resetted, the predeterminated position from preset RAS obtained an identification number.
The SoC chip is the system level chip with certain function; Can comprise memory module and the outside interface module of carrying out communication of control logic module, microprocessor/microcontroller CPU core module, digital signal processor DSP module, embedding etc.; In embodiments of the present invention; Identification number of storage in the position that at first in preset RAS, is provided with in advance, this identification number be the identification number of test case of this previous SoC chip, if this test is for testing the SoC chip first time; Then this identification number can for example be set to 0 for the specific identification number that is provided with in advance.The SoC chip carries out electrification reset, and the SoC chip is carried out initialization, and after the SoC chip reset was accomplished, the start-up code of carrying out in the SoC chip (Boot code) was obtained the identification number of storage.
In step S102, according to the identification number of identification number calculating test case, the test case that this test case gets into/exits from idle status for the SoC chip.
In embodiments of the present invention; After in step S101, getting access to the identification number of storage, the account form that is provided with according to system is calculated the identification number of this test case, for example; Add-one operation or calculate the identification number of this test case through other monobasic linear function; More excellent ground because test case is a sequential storage, therefore calculates the identification number of this test case through add-one operation on RAS.
In step S103, judge whether the identification number of test case is NUL, be execution in step S105 then, otherwise execution in step S104.
In step S104; The address that obtains test case according to the corresponding relation of the identification number of test case and test case; Implementation of test cases, the identification number with test case after test is accomplished writes the preset position in the preset RAS, and jumps to step S101.
In step S105, withdraw from the test of SoC chip.
In the embodiment of the invention; Whether the identification number of the test case that calculates among the determining step S102 is NUL, is the test of then withdrawing from the SoC chip, when withdrawing from the test of SoC chip; Can the SoC chip be placed normal condition; The power supply of each building block all is in the normal power supply state, or the SoC chip is placed preset state, at this not in order to restriction the present invention.When identification number is not a NUL; Show in addition test case test as yet, the address that obtain test case according to the corresponding relation of the identification number of test case and test case this moment, implementation of test cases; Identification number with test case after test is accomplished writes the preset position in the preset RAS; The identification number that calculates test case for test next time provides condition, carries out the electrification reset of SoC chip after writing automatically, promptly jumps to step S101 and continues implementation of test cases.
In embodiments of the present invention, should set up and store the identification number of test case and the corresponding relation of test case in advance, obtain the address of the place RAS of test case according to the identification number of test case to make things convenient for system.
In embodiments of the present invention; Predeterminated position in preset RAS is stored an identification number; And the corresponding relation of the identification number of preserving test case in the startup of SoC chip (Boot) code and storage test case, i.e. the incidence relation of the identification number of test case and the address of the RAS of storage test case is behind the identification number that reads storage; Give test case in the RAS with the control of SoC chip; Carry out the test of test case, upgrade the identification number of the predeterminated position storage in the preset RAS after test is accomplished, it is all to be tested until all test cases to continue test; All test cases formed a test waveform figure after test was accomplished; And can not be output as a plurality of files separately, thus reduced the data processing amount of test macro in the test process, further improve the testing efficiency of test macro.
Embodiment two:
Fig. 2 shows the realization flow of the idle condition method of testing of the SoC chip that second embodiment of the invention provides, and details are as follows:
In step S201, test case to be tested is compiled, the test case after the compiling is saved in the RAS that is provided with in advance.
In embodiments of the present invention, in advance test case to be tested is compiled, the test case after the compiling is saved in the RAS that is provided with in advance, thereby improve the testing efficiency of test macro.
In step S202, set up and the identification number of storage test case and the corresponding relation of test case.
In step S203, carry out the electrification reset of SoC chip, after the SoC chip power resetted, the predeterminated position from preset RAS obtained an identification number.
The SoC chip is the system level chip with certain function; Interface module and the power supply that the memory module and outside that can comprise control logic module, microprocessor/microcontroller CPU core module, digital signal processor DSP module, embedding is carried out communication provides with the power managed module etc.; In embodiments of the present invention; Identification number of storage in the position that at first in preset RAS, is provided with in advance, this identification number be the identification number of test case of this previous SoC chip, if this test is for testing the SoC chip first time; Then this identification number can for example be set to 0 for the specific identification number that is provided with in advance.The SoC chip carries out electrification reset, and the SoC chip is carried out initialization, and after the SoC chip reset was accomplished, the start-up code of carrying out in the SoC chip (Boot code) was obtained the identification number of storage.
In step S204, according to the identification number of identification number calculating test case, the test case that this test case gets into/exits from idle status for the SoC chip.
In embodiments of the present invention; After in step S203, getting access to the identification number of storage, the account form that is provided with according to system is calculated the identification number of this test case, for example; Add-one operation or calculate the identification number of this test case through other monobasic linear function; More excellent ground because test case is a sequential storage, therefore can calculate the identification number of this test case through add-one operation on RAS.
In step S205, judge whether the identification number of test case is NUL, be execution in step S207 then, otherwise execution in step S206.
In step S206; The address that obtains test case according to the corresponding relation of the identification number of test case and test case; Implementation of test cases, the identification number with test case after test is accomplished writes the preset position in the preset RAS, and jumps to step S203.
In step S207, withdraw from the test of SoC chip,
In the embodiment of the invention; Whether the identification number of the test case that calculates among the determining step S204 is NUL, is the test of then withdrawing from the SoC chip, when withdrawing from the test of SoC chip; Can the SoC chip be placed normal condition; The power supply of each building block all is in the normal power supply state, or the SoC chip is placed preset state, at this not in order to restriction the present invention.When identification number is not a NUL; Show in addition test case test as yet, the address that obtain test case according to the corresponding relation of the identification number of test case and test case this moment, implementation of test cases; Identification number with test case after test is accomplished writes the preset position in the preset RAS; The identification number that calculates test case for test next time provides condition, carries out the electrification reset of SoC chip after writing automatically, promptly jumps to step S203 and continues implementation of test cases.
One of ordinary skill in the art will appreciate that all or part of step that realizes in the foregoing description method is to instruct relevant hardware to accomplish through program; Described program can be stored in the computer read/write memory medium; Described storage medium is like ROM/RAM, disk, CD etc.
Embodiment three:
Fig. 3 shows the structure of the idle condition test macro of the SoC chip that third embodiment of the invention provides, and for the ease of explanation, only shows the part relevant with the embodiment of the invention.
The idle condition test macro of this SoC chip can be used for testing the test platform of the idle condition function of SoC chip; Perhaps have in the SoC proving installation of idle condition test of SoC chip; It can be the software unit that runs in these SoC proving installations; Also can be used as independently, suspension member is integrated in these SoC proving installations or runs in the application system of these SoC proving installations, wherein:
31 pairs of test cases to be tested of test case compilation unit compile, and the test case after the compiling are saved in the RAS that is provided with in advance.
In embodiments of the present invention, in advance test case to be tested is compiled, the test case after the compiling is saved in the RAS that is provided with in advance, thereby improve the testing efficiency of test macro.
Corresponding relation is set up unit 32 and is set up and store the identification number of the test case after test case compilation unit 31 compiles and the corresponding relation of test case.
Identification number acquiring unit 33 carries out the electrification reset of SoC chip, and after the SoC chip power resetted, the predeterminated position from preset RAS obtained an identification number.
The SoC chip is the system level chip with certain function; Interface module and the power supply that the memory module and outside that can comprise control logic module, microprocessor/microcontroller CPU core module, digital signal processor DSP module, embedding is carried out communication provides with the power managed module etc.; In embodiments of the present invention; Identification number of storage in the position that at first in preset RAS, is provided with in advance, this identification number be the identification number of test case of this previous SoC chip, if this test is for testing the SoC chip first time; Then this identification number can for example be set to 0 for the specific identification number that is provided with in advance.The SoC chip carries out electrification reset, and the SoC chip is carried out initialization, and after the SoC chip reset was accomplished, the start-up code of carrying out in the SoC chip (Boot code) was obtained the identification number of storage.
The identification number that identification number computing unit 34 obtains according to identification number acquiring unit 33 calculates the identification number of test case, the test case that this test case gets into/exits from idle status for the SoC chip.
In embodiments of the present invention; After in step S203, getting access to the identification number of storage, the account form that is provided with according to system is calculated the identification number of this test case, for example; Add-one operation or calculate the identification number of this test case through other monobasic linear function; More excellent ground because test case is a sequential storage, therefore can calculate the identification number of this test case through add-one operation on RAS.Particularly, identification number computing unit 34 includes identification number and calculates son list 341, and the identification number that identification number calculating single 341 is used for identification number acquiring unit 33 is obtained carries out add-one operation, with the identification number of operation result as test case.
Identification number judging unit 35 judges whether the identification number of the test case that identification number computing unit 34 calculates is NUL.
When test cell 36 is not NUL when the identification number of test case; The address that obtains test case according to the corresponding relation of the identification number of test case and said test case; Implementation of test cases writes the identification number of said test case in the preset position in the aforementioned preset RAS after test is accomplished.
Withdraw from unit 37 when the identification number of test case is NUL, withdraw from the test of SoC chip.
When the embodiment of the invention is tested in the test case that the SoC chip is got into/exits from idle status; After resetting through the SoC chip power; Predeterminated position from preset RAS obtains an identification number, calculates the identification number of test case according to this identification number, the address that obtains test case according to the corresponding relation of the identification number of test case and test case; Implementation of test cases; Identification number with test case after test is accomplished writes the preset position in the preset RAS, and circulation is carried out all to be tested until test case, thus the batch testing of the test case that realizes the SoC chip is got into/exits from idle status; Improve the testing efficiency of test macro, reduced the treatment capacity of data.
The above is merely preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of within spirit of the present invention and principle, being done, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (9)
1. the idle condition method of testing of a SoC chip is characterized in that, said method comprises the steps:
A, carry out the electrification reset of SoC chip, after said SoC chip power resetted, the predeterminated position from preset RAS obtained an identification number;
B, calculate the identification number of test case according to said identification number, said test case is the test case that said SoC chip gets into/exits from idle status;
C, judge whether the identification number of said test case is NUL; It is the test of then withdrawing from said SoC chip; Otherwise the address that obtains said test case according to the corresponding relation of the identification number of said test case and said test case; Carry out said test case, after test is accomplished the identification number of said test case is write the predeterminated position in the said preset RAS, and jump to steps A.
2. the method for claim 1 is characterized in that, before said step C, said method also comprises the steps:
Test case to be tested compiles, and the test case after the compiling is saved in the RAS that is provided with in advance.
3. the method for claim 1 is characterized in that, before said step C, said method also comprises the steps:
Set up and the identification number of storage test case and the corresponding relation of said test case.
4. the method for claim 1 is characterized in that, said step B is specially:
Identification number to obtaining in the steps A carries out add-one operation, and with the identification number of operation result as test case, said test case is the test case that said SoC chip gets into/exits from idle status.
5. the idle condition test macro of a SoC chip is characterized in that, said system comprises:
The identification number acquiring unit is used to carry out the electrification reset of SoC chip, and after said SoC chip power resetted, the predeterminated position from preset RAS obtained an identification number;
The identification number computing unit, the identification number that is used for obtaining according to said identification number acquiring unit calculates the identification number of test case, the test case that said test case gets into/exits from idle status for the SoC chip;
The identification number judging unit, whether the identification number of the test case that is used to judge that said identification number computing unit calculates is NUL;
Withdraw from the unit, be used for when the identification number of test case is NUL, withdrawing from the test of SoC chip; And
Test cell; Be used for when the identification number of test case is not NUL; The address that obtains said test case according to the corresponding relation of the identification number of said test case and said test case; Carry out said test case, after test is accomplished the identification number of said test case is write the preset position in the said preset RAS.
6. system as claimed in claim 5 is characterized in that, said system also comprises:
The test case compilation unit is used for test case to be tested is compiled, and the test case after the compiling is saved in the RAS that is provided with in advance.
7. system as claimed in claim 5 is characterized in that, said system also comprises:
Corresponding relation is set up the unit, is used to set up and store the identification number of test case and the corresponding relation of said test case.
8. system as claimed in claim 5 is characterized in that, said system also comprises:
The identification number computation subunit is used for the identification number that said identification number acquiring unit obtains is carried out add-one operation, with the identification number of operation result as test case, the test case that said test case gets into/exits from idle status for the SoC chip.
9. a SoC proving installation is characterized in that, said SoC proving installation comprises the idle condition test macro of each described SoC chip of claim 5 to 8.
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| CN112035346A (en) * | 2020-08-25 | 2020-12-04 | 华东计算技术研究所（中国电子科技集团公司第三十二研究所） | Automatic testing method, system and medium based on embedded DSP operating system |
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