CN102723416A - LED epitaxial wafer and manufacturing method thereof - Google Patents
LED epitaxial wafer and manufacturing method thereof Download PDFInfo
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- CN102723416A CN102723416A CN2012102325263A CN201210232526A CN102723416A CN 102723416 A CN102723416 A CN 102723416A CN 2012102325263 A CN2012102325263 A CN 2012102325263A CN 201210232526 A CN201210232526 A CN 201210232526A CN 102723416 A CN102723416 A CN 102723416A
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Abstract
The invention discloses an LED epitaxial wafer and a manufacturing method thereof. The LED epitaxial wafer comprises a substrate, a graphic layer on the substrate, and an epitaxial layer on the graphic layer, wherein the graphic layer is provided with nano raised graphics among which gap intervals are formed. The manufacturing method is as follows: providing the substrate; preparing the graphic layer on the substrate, wherein the graphic layer is provided with nano raised graphics among which gap intervals are formed; and preparing the epitaxial layer on the graphic layer. The LED epitaxial wafer can improve the quality of the lattice of the epitaxial wafer, improve the light-emission efficiency of an LED chip, and avoid expensive laser stripping equipment as for vertically structured LED chip required to be stripped. Moreover, the quality of the stripped surface is ensured.
Description
Technical field
The present invention relates to Light-Emitting Diode (LED) manufacturing field, particularly relate to a kind of LED epitaxial wafer and preparation method thereof.
Background technology
Inorganic semiconductor material; Like inorganic material such as gallium nitride-based material, gallium phosphide sill and gallium nitrogen phosphorus sills; Can realize light-emitting diode (the light emitting diode of blue light, green glow or ultraviolet light through mixing other element (indium or aluminium); Be called for short LED), therefore have in fields such as demonstration, illumination and storages very widely and use.Since the thirties in last century; People have just begun the broad research to inorganic semiconductor material; Especially in the early 1990s; It is found that the inorganic semiconductor material nucleating layer that utilizes low-temperature epitaxy can largely improve the lattice quality of inorganic semiconductor material epitaxial loayer, and produced the LED device of high brightness thus.
Though the LED product of inorganic semiconductor material has been obtained very big progress at present; But it is to be solved to still have some key issues to have: at first be suitable substrate to be provided for epitaxial loayer; In the process of epitaxial loayer heteroepitaxial growth, can cause lattice not match like this; Problems such as heat does not match, and be accompanied by bigger dislocation defect, to this problem; Someone adopts transversal epitaxial growth technology (Lateral Epitaxial Over grown is called for short the ELOG technology) to come the nitride epitaxial film of growing high-quality; The another one problem is exactly the luminous extraction efficiency of LED.Because the refractive index of inorganic semiconductor material and air differs bigger, cause that the total reflection at the two interface is critical to be had only about 23 °, therefore; The light that is sent by active layer is returned epitaxial loayer by major part by total reflection, like this through repeatedly internal reflection and active layer to catoptrical absorption process again, light extraction efficiency reduces greatly; At present; In order to improve luminous efficiency, some carry out roughening to the light-emitting area of LED, promptly utilize laser irradiation; The way of corrosion or etching makes the surface form rough layer, thereby improves light extraction efficiency.
In addition, on present LED market, owing to depositing current-crowding effect and the little problem of light-emitting area in the led chip of traditional planar electrode structure, the led chip of vertical electrode structure becomes one of mainstream solution.In order to realize this vertical stratification, need complicated and expensive Ultra-Violet Laser peel-off device to realize separating of substrate and epitaxial wafer.But because the inorganic semiconductor material epitaxial loayer of on substrate, growing exists bigger lattice constant and thermal coefficient of expansion not match; Therefore; In the middle of the laser lift-off process, can produce local huge mechanical stress, cause the laser lift-off face uneven, and be accompanied by the appearance of crackle.And, bigger leakage current is arranged thereby can cause making led chip because the infrasound effect that laser pulse causes makes a large amount of stress concentrate on chip internal.
In sum; It is low in present LED product, still to exist the epitaxial loayer lattice quality; A little less than the light extraction efficiency, and in the LED of vertical stratification product, the problem such as of poor quality of the expensive and release surface of laser lift-off equipment price; Though have certain methods singlely to address the above problem, can not improve above-mentioned three problems simultaneously.
Summary of the invention
The objective of the invention is to; A kind of LED epitaxial wafer and preparation method thereof is provided, can solves above-mentioned three problems simultaneously, promptly can improve the epitaxial loayer lattice quality; Improve the led chip light extraction efficiency of planar structure; To the led chip of vertical stratification, avoided using expensive laser lift-off equipment, and the quality of release surface is guaranteed simultaneously.
For solving the problems of the technologies described above, the present invention provides a kind of LED epitaxial wafer, comprising:
Substrate;
Graph layer, said graph layer has the nano projection figure, has gapping interval between the said nano projection figure, and said graph layer is arranged on the said substrate;
Epitaxial loayer, said epitaxial loayer is arranged on the said graph layer.
Further, the shape of cross section of said nano projection figure is triangle, polygon or circle.
Further, the width of said nano projection figure is 0.05um-0.8um, highly is 1um-10um, and the width of the gapping interval between the said nano projection figure is 0.5um-5um.
Further, the top of said nano projection figure has platform.
Further, said epitaxial loayer adopts the growth of horizontal extension method.
Further, said substrate is Sapphire Substrate, silicon carbide substrates, silicon substrate, gallium nitride substrate or zinc oxide substrate.
Further, the material of said epitaxial loayer comprises one or more the combination in gallium nitride-based material, gallium phosphide sill, gallium nitrogen phosphorus sill and the Zinc oxide-base material.
Further, the light emitting diode (LED) chip with vertical structure that maybe need peel off of the said LED epitaxial wafer light emitting diode (LED) chip with vertical structure that is used to prepare the planar structure led chip, need not peel off.
Further; Said LED epitaxial wafer is used to the light emitting diode (LED) chip with vertical structure for preparing the planar structure led chip or need not peel off, and the material of said graph layer comprises one or more combination of carborundum, gallium nitride, zinc oxide, zinc sulphide, magnesia, titanium dioxide and aluminium oxide.
Further, said LED epitaxial wafer is used to prepare the light emitting diode (LED) chip with vertical structure that need peel off, and the material of said graph layer comprises zinc oxide, zinc sulphide and magnesian one or more combination.
Further; Said LED epitaxial wafer is used to prepare the light emitting diode (LED) chip with vertical structure that need peel off; When the light emitting diode (LED) chip with vertical structure that preparation need be peeled off, utilize the graph layer of the said LED epitaxial wafer of chemical wet etching, to realize separating of said substrate and said epitaxial loayer.
Further, the present invention also provides a kind of manufacture method of the LED of making epitaxial wafer, comprising:
Substrate is provided;
On said substrate, prepare graph layer, said graph layer has the nano projection figure, has gapping interval between the said nano projection figure;
On said graph layer, prepare epitaxial loayer.
Further, the shape of cross section of said nano projection figure is triangle, polygon or circle.
Further, the width of said nano projection figure is 0.05um-0.8um, highly is 1um-10um, and the width of the gapping interval between the said nano projection figure is 0.5um-5um.
Further, the top of said nano projection figure has platform.
Further, said graph layer directly forms through depositing operation, and said depositing operation is chemical vapour deposition (CVD) or deposited by pvd.
Further, through control vertical and horizontal speed of growth ratio, at the nano projection figure top of said graph layer platform appears.
Further, the forming process of said graph layer comprises:
Before forming said nano projection figure, form rete earlier through depositing operation earlier, said depositing operation is chemical vapour deposition (CVD) or deposited by pvd; And
The said nano projection figure of preparation obtains said graph layer on said rete.
Further, on said rete, prepare said nano projection figure through electron beam lithography.
Further, said epitaxial loayer adopts the growth of horizontal extension method.
Further, said substrate is Sapphire Substrate, silicon carbide substrates, silicon substrate, gallium nitride substrate or zinc oxide substrate.
Further, the material of said epitaxial loayer comprises one or more the combination in gallium nitride-based material, gallium phosphide sill, gallium nitrogen phosphorus sill and the Zinc oxide-base material.
Further, the said LED epitaxial wafer light emitting diode (LED) chip with vertical structure that is used to prepare the planar structure led chip, need not peel off maybe need be peeled off.
Further; Said LED epitaxial wafer is used to the light emitting diode (LED) chip with vertical structure for preparing the planar structure led chip or need not peel off, and the material of said graph layer comprises one or more combination of carborundum, gallium nitride, zinc oxide, zinc sulphide, magnesia, titanium dioxide and aluminium oxide.
Further, said LED epitaxial wafer is used to prepare the light emitting diode (LED) chip with vertical structure that need peel off, and the material of said graph layer comprises zinc oxide, zinc sulphide and magnesian one or more combination.
Further; Said LED epitaxial wafer is used to prepare the light emitting diode (LED) chip with vertical structure that need peel off; When the light emitting diode (LED) chip with vertical structure that preparation need be peeled off, utilize the graph layer of the said LED epitaxial wafer of chemical wet etching, to realize separating of said substrate and said epitaxial loayer.
Compared with prior art, LED epitaxial wafer provided by the invention and preparation method thereof has the following advantages:
1. at LED epitaxial wafer provided by the invention the graph layer that one deck has the nano projection figure is set between substrate and epitaxial loayer; On the one hand; Because the lattice match of graph layer and epitaxial loayer is superior to the lattice match of substrate and epitaxial loayer; Therefore, the lattice quality of the epitaxial loayer of on graph layer, growing will be higher than directly at the substrate growing epitaxial layers, and the lattice quality of the epitaxial loayer Seed Layer of on graph layer, growing in early days itself just is greatly improved; On the other hand; Along with the continuous growth and the thickness increase of epitaxial loayer, through the control of growth conditions, because crystal growth direction is perpendicular to the dislocation motion direction; Therefore reduce the extended dislocation density in the epitaxial loayer greatly; Make that epitaxial loayer merges gradually in the transversal epitaxial growth process, thereby whole epitaxial loayer joins together, thereby improved the lattice quality of epitaxial loayer once more.
2. between substrate and epitaxial loayer, has the graph layer that one deck has the nano projection figure at LED epitaxial wafer provided by the invention; Graph layer has coarse surface; Can reflex to upper surface through scattering effect to the light that penetrates under the extension course, thereby improve light extraction efficiency; In addition; Epitaxial loayer covers the top of the nano projection figure of said graph layer; Be to keep gapping interval between the nano projection figure of graph layer; So this gapping interval forms air bubble, owing to have bigger refringence between the material of air and graph layer, so be used for the planar structure led chip or during the light emitting diode (LED) chip with vertical structure that need not peel off when this LED epitaxial wafer; This air bubble can have stronger scattering and reflex to the light of outgoing under the extension course, thereby can improve light extraction efficiency and the external quantum efficiency of LED greatly.
3. between substrate and epitaxial loayer, has the graph layer that one deck has the nano projection figure at LED epitaxial wafer provided by the invention; When this LED epitaxial wafer is used for light emitting diode (LED) chip with vertical structure; Need separate substrate with epitaxial loayer, utilize the chemical perishable characteristic of graph layer material, avoid complicated and expensive Ultra-Violet Laser stripping technology; Adopt not damaged not have the chemical stripping technology of machinery separation and simple possible; Reduce greatly laser lift-off to the damage of epitaxial wafer and the leakage current and the low problem of yield that cause adopt the chemical stripping technology to carry out batch process simultaneously, and have gapping interval between the nano projection figure of graph layer the LED epitaxial wafer; Gapping interval has increased the surface area of chemical reaction, helps to accelerate the speed of chemical reaction.
Description of drawings
Fig. 1 is the schematic cross-section of structure of the LED epitaxial wafer of first embodiment of the invention;
Fig. 2 is the shape of cross section sketch map of graph layer nano projection figure of the LED epitaxial wafer of first embodiment of the invention;
Fig. 3 is the substrate and the epitaxial loayer separation process sketch map of the LED epitaxial wafer of first embodiment of the invention;
Fig. 4 is the flow chart of manufacture method of the LED epitaxial wafer of first embodiment of the invention;
Fig. 5 a-Fig. 5 c is the shape of cross section sketch map of graph layer nano projection figure of the LED epitaxial wafer of second embodiment of the invention.
Wherein, 101, substrate; 102, graph layer; 103, epitaxial loayer; 121, nano projection figure; 122, gapping interval; 131, resilient coating; 132, first limiting layer; 133, luminescent layer; 134, second limiting layer.
Embodiment
To combine sketch map that LED epitaxial wafer of the present invention and preparation method thereof is described in more detail below; The preferred embodiments of the present invention have wherein been represented; Should be appreciated that those skilled in the art can revise the present invention described here, and still realize advantageous effects of the present invention.Therefore, following description is appreciated that extensively knowing to those skilled in the art, and not as limitation of the present invention.
In the following passage, with way of example the present invention is described more specifically with reference to accompanying drawing.According to following explanation and claims, advantage of the present invention and characteristic will be clearer.What need explanation is, accompanying drawing all adopts the form of simplifying very much and all uses non-ratio accurately, only in order to convenient, the purpose of the aid illustration embodiment of the invention lucidly.
Core concept of the present invention is; A kind of LED epitaxial wafer and preparation method thereof is provided, is provided with the graph layer that one deck has the nano projection figure between the substrate of this LED epitaxial wafer and the epitaxial loayer, the graph layer with nano projection figure can improve the epitaxial loayer lattice quality; Improve light extraction efficiency; Simultaneously when substrate and epitaxial loayer are peeled off, avoid the expensive laser lift-off equipment of use, and guaranteed the quality of release surface.
In conjunction with above-mentioned core concept, the present invention provides a kind of LED epitaxial wafer and preparation method thereof, and the LED epitaxial wafer comprises: substrate; Graph layer, said graph layer has the nano projection figure, has gapping interval between the said nano projection figure, and said graph layer is arranged on the said substrate; Epitaxial loayer, said epitaxial loayer is arranged on the said graph layer.
Further, in conjunction with above-mentioned LED epitaxial wafer, the present invention also provides a kind of manufacturing approach, may further comprise the steps:
Step S11 provides substrate;
Step S12 prepares graph layer on said substrate;
Step S13 prepares epitaxial loayer on said graph layer.
Below in conjunction with core concept, specify LED epitaxial wafer according to the invention and preparation method thereof.
Below enumerate several embodiment of said LED epitaxial wafer and preparation method thereof; To clearly demonstrate content of the present invention; Will be clear that; Content of the present invention is not restricted to following examples, and the improvement of other routine techniques means by one of ordinary skill in the art is also within thought range of the present invention.
[first embodiment]
Below please refer to Fig. 1, it is the sectional view of structure of the LED epitaxial wafer of first embodiment of the invention.
In LED epitaxial wafer according to the invention and preparation method thereof, said graph layer directly forms through depositing operation.
As shown in Figure 1, in the present embodiment, substrate 101 can be selected from organizing material with next; This group material comprises: Sapphire Substrate, silicon carbide substrates, silicon substrate, gallium nitride substrate and zinc oxide substrate, and in preferred embodiment, substrate 101 is chosen Sapphire Substrate; Because sapphire stability is fine, can be used in the high growth temperature process, and; Sapphire mechanical strength is high, is easy to handle and clean.
Graph layer 102 is arranged on the substrate 101, and graph layer 102 has nano projection figure 121, has gapping interval 122 between the nano projection figure 121.In preferred embodiment, the top of nano projection figure 121 has platform, and the platform at the top of nano projection figure 121 helps epitaxial loayer 103 keeps graph layer 102 when growth gapping interval 122.In the present embodiment, because substrate 101 is chosen Sapphire Substrate, epitaxial loayer 103 is a gallium nitride-based material, so the preferable selective oxidation Zinc material of the material of graph layer 102.Gallium nitride and zinc oxide are hexagonal; The graph layer 102 of zinc oxide and the lattice match of gallium nitride-based epitaxial layer 103 are superior to the substrate 101 of sapphire material, and the lattice quality of epitaxial loayer 103 is higher when therefore on the graph layer 102 of zinc oxide, forming gallium nitride-based epitaxial layer 103.And the outer layer growth of gallium nitride comes capping oxidation zinc graph layer through transversal epitaxial growth; Because crystal growth direction is perpendicular to the dislocation motion direction; Therefore reduce the extended dislocation density in the epitaxial loayer greatly; Make that epitaxial loayer merges gradually in the transversal epitaxial growth process, thereby whole epitaxial loayer joins together, thereby improved the lattice quality of epitaxial loayer once more.The preparation of the nano projection figure of simultaneous oxidation zinc is controlled easily, and zinc oxide is amphoteric oxide, can and acid-base reaction, when realizing, carry out chemical wet etching easily to the separating of substrate 101 and epitaxial loayer 103.But other material, the material that can get rid of through chemical wet etching like zinc sulphide, magnesia etc. is also within thought range of the present invention.In addition; When the LED of present embodiment epitaxial wafer is used to prepare the planar structure led chip or during the light emitting diode (LED) chip with vertical structure that need not peel off, the material of graph layer 102 can also select carborundum, gallium nitride, titanium dioxide, aluminium oxide etc. to be difficult for by the chemical corrosion material.The material that it should be noted that the selection crystal formation of the same race that the material of material and epitaxial loayer 103 of graph layer 102 is preferable is to guarantee having good lattice match between graph layer 102 and the epitaxial loayer 103.Graph layer 102 directly forms through depositing operation; Depositing operation is chemical vapour deposition (CVD) or deposited by pvd; Wherein, Chemical vapour deposition (CVD) is metallo-organic compound chemical vapor deposition or plasma reinforced chemical meteorology deposition, and physical vapour deposition (PVD) is molecular beam epitaxy, pulsed laser deposition or magnetron sputtering.In the present embodiment; On substrate 101 in the process of deposition pattern layer 102; Can be through to the control of environment in chemical vapour deposition (CVD) or the physical gas-phase deposition, the atom that makes zinc oxide is from group bunch, and directly deposition formation nano projection figure 121; Has gapping interval 122 between the nano projection figure 121, so graph layer 102 has coarse surface.Through control vertical and horizontal speed of growth ratio, platform appears in nano projection figure 121 tops, presents cylindricality then; Because the material of graph layer 102 is a zinc oxide; Zinc oxide belongs to hexagonal, so the shape of cross section of nano projection figure 121 is hexagon, and is as shown in Figure 2.When not selective oxidation of the material zinc of graph layer 102, directly the shape of cross section of the nano projection figure 121 that forms of deposition can be for other shape, and like quadrangle, concrete shape is by the crystal formation decision of selected materials.The width of nano projection figure 121 is 0.05-0.8um, highly is 1-10um, and the width of gapping interval 122 is 0.5-5um.Preferable, the width of nano projection figure 121 is 0.1um, 0.2um, 0.3um, 0.5um, 0.6um, 0.7um, highly is 2um, 3um, 5um, 6um, 8um, 9um, the width of gapping interval 122 is 1um, 1.5um, 2um, 2.5um, 3um, 4um.
The preparation method of the LED epitaxial wafer of present embodiment below is described.With reference to figure 4, its be first embodiment of the invention the LED epitaxial wafer manufacture method flow chart.
At first carry out step S11, substrate 101 is provided.
Carry out step S12 then; Preparation graph layer 102 on substrate 101, graph layer 102 is through chemical vapour deposition (CVD) or deposited by pvd, in growth course; Through control to environment in chemical vapour deposition (CVD) or the physical gas-phase deposition; The zinc oxide atom that makes graph layer 102 is from group bunch, and directly deposition formation nano projection figure 121, have gapping interval 122 between the nano projection figure 121.Through control vertical and horizontal speed of growth ratio, platform appears in nano projection figure 121 tops, presents cylindricality then.
Carry out step S13 at last, adopt the horizontal extension method to be grown in preparation epitaxial loayer 103 on the graph layer 102.
The LED epitaxial wafer of present embodiment is used to prepare planar structure led chip or light emitting diode (LED) chip with vertical structure.In preferred embodiment; The LED epitaxial wafer of present embodiment is used to prepare the planar structure led chip or during the light emitting diode (LED) chip with vertical structure that need not peel off; The LED epitaxial wafer of present embodiment is used to do the planar structure led chip or the substrate and the epitaxial loayer of the vertical stratification LED core that need not peel off; Wherein, keep gapping interval 122 between the nano projection figure 121 of graph layer 102 bottoms that contact with substrate 101, so this gapping interval forms air bubble; This air bubble can have stronger scattering and reflex to the light of outgoing under the extension course, thereby can improve light extraction efficiency and the external quantum efficiency of LED greatly.In addition; Can the LED epitaxial wafer of present embodiment be used to prepare the light emitting diode (LED) chip with vertical structure that to peel off; The LED epitaxial wafer of present embodiment is used to do the epitaxial loayer of the vertical stratification LED core that need peel off; With the separating of substrate 101 and epitaxial loayer the time, utilize the method for chemical wet etching graph layer 102 to realize, see Fig. 3.Because the material of graph layer 102 has been selected can be by the material of chemical corrosion; So can adopt not damaged not have the chemical stripping technology of machinery separation and simple possible; Avoid complicated and expensive Ultra-Violet Laser stripping technology; Simultaneously batch process be can realize, leakage current and the low problem of yield that laser lift-off causes the damage of epitaxial wafer reduced greatly.
In the present embodiment, form through direct growth when the nano projection figure is the deposition pattern layer in this LED epitaxial wafer, the shape of cross section of nano projection figure is by the crystal formation decision of graph layer selected materials.
[second embodiment]
Present embodiment is on the basis of first embodiment; Difference is that the forming process of graph layer 102 comprises: before forming nano projection figure 121, form rete earlier through depositing operation earlier, said depositing operation is chemical vapour deposition (CVD) or deposited by pvd; And on said rete, prepare said nano projection figure 121, obtain said graph layer 102.In a second embodiment; Equally can be through chemical vapour deposition (CVD) or physical gas-phase deposition growth rete; But need not control environment in chemical vapour deposition (CVD) or the physical gas-phase deposition; Directly deposit rete, at this moment do not have nano projection figure 121 and gapping interval 122.Through electron beam lithography, on rete, carve nano projection figure 121 then, have gapping interval 122 between the nano projection figure 121, thereby obtain graph layer 102.Owing to adopt electron beam lithography to prepare nano projection figure 121 in the present embodiment; So the shape of cross section of nano projection figure 121 can be controlled on demand; Preferable; Shape of cross section comprises triangle, polygon and circle, and other figure such as irregular figure are also within thought range of the present invention.Fig. 5 a-Fig. 5 c is the shape of cross section sketch map of graph layer nano projection figure of the LED epitaxial wafer of second embodiment of the invention.In the drawings, identical reference number representes to be equal to label among Fig. 1, and shown in Fig. 5 a-Fig. 5 c, the shape of cross section of nano projection figure 121 is triangle, pentagon and circle.
Adopt the electron beam lithography preparation also can obtain having the graph layer 102 of nano projection figure 121 in the present embodiment; When adopting electron beam lithography to prepare nano projection figure 121; The shape of cross section of nano projection figure 121 can be controlled on demand, does not receive the restriction of graph layer 102 materials.Being provided with of graph layer 102 can be able to improve the epitaxial loayer lattice quality; Improve the led chip light extraction efficiency of planar structure; To the led chip of vertical stratification, avoided using expensive laser lift-off equipment simultaneously, and the guaranteed beneficial effect of the quality of release surface.
In sum, LED epitaxial wafer according to the invention and preparation method thereof is provided with one deck graph layer between substrate and epitaxial loayer, and said graph layer has the nano projection figure, has gapping interval between the said nano projection figure.Compared with prior art, LED epitaxial wafer provided by the invention has the following advantages:
1. at LED epitaxial wafer provided by the invention the graph layer that one deck has the nano projection figure is set between substrate and epitaxial loayer; On the one hand; Because the lattice match of graph layer and epitaxial loayer is superior to the lattice match of substrate and epitaxial loayer; Therefore, the lattice quality of the epitaxial loayer of on graph layer, growing will be higher than directly at the substrate growing epitaxial layers, and the lattice quality of the epitaxial loayer Seed Layer of on graph layer, growing in early days itself just is greatly improved; On the other hand; Along with the continuous growth and the thickness increase of epitaxial loayer, through the control of growth conditions, because crystal growth direction is perpendicular to the dislocation motion direction; Therefore reduce the extended dislocation density in the epitaxial loayer greatly; Make that epitaxial loayer merges gradually in the transversal epitaxial growth process, thereby whole epitaxial loayer joins together, thereby improved the lattice quality of epitaxial loayer once more.
2. between substrate and epitaxial loayer, has the graph layer that one deck has the nano projection figure at LED epitaxial wafer provided by the invention; Graph layer has coarse surface; Can reflex to upper surface through scattering effect to the light that penetrates under the extension course, thereby improve light extraction efficiency; In addition; Epitaxial loayer covers the top of the nano projection figure of said graph layer, keeps gapping interval between the nano projection figure of graph layer, so this gapping interval forms air bubble; Owing to there is bigger refringence between the material of air and graph layer; Therefore when this LED epitaxial wafer was used for the planar structure led chip, this air bubble can have stronger scattering and reflex to the light of outgoing under the extension course, thereby can improve light extraction efficiency and the external quantum efficiency of LED greatly.
3. between substrate and epitaxial loayer, has the graph layer that one deck has the nano projection figure at LED epitaxial wafer provided by the invention; When this LED epitaxial wafer is used for light emitting diode (LED) chip with vertical structure; Need separate substrate with epitaxial loayer, utilize the chemical perishable characteristic of graph layer material, avoid complicated and expensive Ultra-Violet Laser stripping technology; Adopt not damaged not have the chemical stripping technology of machinery separation and simple possible; Reduce greatly laser lift-off to the damage of epitaxial wafer and the leakage current and the low problem of yield that cause adopt the chemical stripping technology to carry out batch process simultaneously, and have gapping interval between the nano projection figure of graph layer the LED epitaxial wafer; Gapping interval has increased the surface area of chemical reaction, helps to accelerate the speed of chemical reaction.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, belong within the scope of claim of the present invention and equivalent technologies thereof if of the present invention these are revised with modification, then the present invention also is intended to comprise these changes and modification interior.
Claims (26)
1. LED epitaxial wafer comprises:
Substrate;
Graph layer, said graph layer has the nano projection figure, has gapping interval between the said nano projection figure, and said graph layer is arranged on the said substrate;
Epitaxial loayer, said epitaxial loayer is arranged on the said graph layer.
2. LED epitaxial wafer as claimed in claim 1 is characterized in that, the shape of cross section of said nano projection figure is triangle, polygon or circle.
3. LED epitaxial wafer as claimed in claim 1 is characterized in that, the width of said nano projection figure is 0.05um-0.8um, highly is 1um-10um, and the width of the gapping interval between the said nano projection figure is 0.5um-5um.
4. LED epitaxial wafer as claimed in claim 1 is characterized in that the top of said nano projection figure has platform.
5. LED epitaxial wafer as claimed in claim 1 is characterized in that, said epitaxial loayer adopts the growth of horizontal extension method.
6. LED epitaxial wafer as claimed in claim 1 is characterized in that, said substrate is Sapphire Substrate, silicon carbide substrates, silicon substrate, gallium nitride substrate or zinc oxide substrate.
7. LED epitaxial wafer as claimed in claim 1 is characterized in that, the material of said epitaxial loayer comprises one or more the combination in gallium nitride-based material, gallium phosphide sill, gallium nitrogen phosphorus sill and the Zinc oxide-base material.
8. like any described LED epitaxial wafer in the claim 1 to 7, it is characterized in that the light emitting diode (LED) chip with vertical structure that the light emitting diode (LED) chip with vertical structure that said LED epitaxial wafer is used to prepare the planar structure led chip, need not peel off maybe need be peeled off.
9. LED epitaxial wafer as claimed in claim 8; It is characterized in that; Said LED epitaxial wafer is used to the light emitting diode (LED) chip with vertical structure for preparing the planar structure led chip or need not peel off, and the material of said graph layer comprises one or more combination of carborundum, gallium nitride, zinc oxide, zinc sulphide, magnesia, titanium dioxide and aluminium oxide.
10. LED epitaxial wafer as claimed in claim 8 is characterized in that, said LED epitaxial wafer is used to prepare the light emitting diode (LED) chip with vertical structure that need peel off, and the material of said graph layer comprises zinc oxide, zinc sulphide and magnesian one or more combination.
11. LED epitaxial wafer as claimed in claim 8; It is characterized in that; Said LED epitaxial wafer is used to prepare the light emitting diode (LED) chip with vertical structure that need peel off; When the light emitting diode (LED) chip with vertical structure that preparation need be peeled off, utilize the graph layer of the said LED epitaxial wafer of chemical wet etching, to realize separating of said substrate and said epitaxial loayer.
12. a manufacture method of making the LED epitaxial wafer comprises:
Substrate is provided;
On said substrate, prepare graph layer, said graph layer has the nano projection figure, has gapping interval between the said nano projection figure;
On said graph layer, prepare epitaxial loayer.
13. LED epitaxial wafer as claimed in claim 12 is characterized in that, the shape of cross section of said nano projection figure is triangle, polygon or circle.
14. LED epitaxial wafer as claimed in claim 12 is characterized in that, the width of said nano projection figure is 0.05um-0.8um, highly is 1um-10um, and the width of the gapping interval between the said nano projection figure is 0.5um-5um.
15. LED epitaxial wafer as claimed in claim 12 is characterized in that the top of said nano projection figure has platform.
16. the manufacture method of LED epitaxial wafer as claimed in claim 12 is characterized in that, said graph layer directly forms through depositing operation, and said depositing operation is chemical vapour deposition (CVD) or deposited by pvd.
17. the manufacture method of LED epitaxial wafer as claimed in claim 16 is characterized in that, through control vertical and horizontal speed of growth ratio, platform occurs at the nano projection figure top of said graph layer.
18. the manufacture method of LED epitaxial wafer as claimed in claim 12 is characterized in that, the forming process of said graph layer comprises:
Before forming said nano projection figure, form rete earlier through depositing operation earlier, said depositing operation is chemical vapour deposition (CVD) or deposited by pvd; And
The said nano projection figure of preparation obtains said graph layer on said rete.
19. the manufacture method of LED epitaxial wafer as claimed in claim 18 is characterized in that, on said rete, prepares said nano projection figure through electron beam lithography.
20. the manufacture method of LED epitaxial wafer as claimed in claim 12 is characterized in that, said epitaxial loayer adopts the growth of horizontal extension method.
21. the manufacture method of LED epitaxial wafer as claimed in claim 12 is characterized in that, said substrate is Sapphire Substrate, silicon carbide substrates, silicon substrate, gallium nitride substrate or zinc oxide substrate.
22. the manufacture method of LED epitaxial wafer as claimed in claim 12 is characterized in that, the material of said epitaxial loayer comprises one or more the combination in gallium nitride-based material, gallium phosphide sill, gallium nitrogen phosphorus sill and the Zinc oxide-base material.
23. the manufacture method like any described LED epitaxial wafer in the claim 12 to 22 is characterized in that, the light emitting diode (LED) chip with vertical structure that said LED epitaxial wafer is used to prepare the planar structure led chip, need not peel off maybe need be peeled off.
24. the manufacture method of LED epitaxial wafer as claimed in claim 23; It is characterized in that; Said LED epitaxial wafer is used to the light emitting diode (LED) chip with vertical structure for preparing the planar structure led chip or need not peel off, and the material of said graph layer comprises one or more combination of carborundum, gallium nitride, zinc oxide, zinc sulphide, magnesia, titanium dioxide and aluminium oxide.
25. the manufacture method of LED epitaxial wafer as claimed in claim 23; It is characterized in that; Said LED epitaxial wafer is used to prepare the light emitting diode (LED) chip with vertical structure that need peel off, and the material of said graph layer comprises zinc oxide, zinc sulphide and magnesian one or more combination.
26. the manufacture method of LED epitaxial wafer as claimed in claim 23; It is characterized in that; Said LED epitaxial wafer is used to prepare the light emitting diode (LED) chip with vertical structure that need peel off; When the light emitting diode (LED) chip with vertical structure that preparation need be peeled off, utilize the graph layer of the said LED epitaxial wafer of chemical wet etching, to realize separating of said substrate and said epitaxial loayer.
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014071879A1 (en) * | 2012-11-12 | 2014-05-15 | 厦门市三安光电科技有限公司 | Method for separating light emitting diode substrate |
| CN103811537A (en) * | 2014-03-05 | 2014-05-21 | 上海新储集成电路有限公司 | Large-size wafer and preparation method thereof |
| CN103824919A (en) * | 2012-11-15 | 2014-05-28 | 财团法人工业技术研究院 | Light emitting diode |
| CN103996757A (en) * | 2014-05-30 | 2014-08-20 | 西安神光皓瑞光电科技有限公司 | Method for improving LED luminance through TiO2 nanometer tube array thin film |
| WO2017167190A1 (en) * | 2016-03-29 | 2017-10-05 | 苏州晶湛半导体有限公司 | Graphical si substrate-based led epitaxial wafer and preparation method therefor |
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005158846A (en) * | 2003-11-21 | 2005-06-16 | Sanken Electric Co Ltd | Plate-shaped substrate for forming semiconductor element and its manufacturing method |
| US20090261376A1 (en) * | 2006-02-02 | 2009-10-22 | Seoul Opto Device Co., Ltd. | Nitride semiconductor light emitting diode and method of fabricating the same |
| CN101794849A (en) * | 2010-02-23 | 2010-08-04 | 山东华光光电子有限公司 | Wet etching stripping method of SiC-substrate GaN-based LED |
| CN102214748A (en) * | 2011-06-20 | 2011-10-12 | 云峰 | Epitaxial structure of LED (light-emitting diode) with GaN (gallium nitride)-based vertical structure and manufacturing method thereof |
| CN102231414A (en) * | 2011-06-03 | 2011-11-02 | 王楚雯 | Formation method of LED |
| CN102244172A (en) * | 2010-05-11 | 2011-11-16 | 三星Led株式会社 | Semiconductor light emitting device and method for fabricating the same |
| CN102263178A (en) * | 2011-06-03 | 2011-11-30 | 王楚雯 | Epitaxial wafer and forming method thereof |
| CN202633369U (en) * | 2012-07-05 | 2012-12-26 | 杭州士兰明芯科技有限公司 | LED (Light-Emitting Diode) epitaxial wafer |
-
2012
- 2012-07-05 CN CN2012102325263A patent/CN102723416A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005158846A (en) * | 2003-11-21 | 2005-06-16 | Sanken Electric Co Ltd | Plate-shaped substrate for forming semiconductor element and its manufacturing method |
| US20090261376A1 (en) * | 2006-02-02 | 2009-10-22 | Seoul Opto Device Co., Ltd. | Nitride semiconductor light emitting diode and method of fabricating the same |
| CN101794849A (en) * | 2010-02-23 | 2010-08-04 | 山东华光光电子有限公司 | Wet etching stripping method of SiC-substrate GaN-based LED |
| CN102244172A (en) * | 2010-05-11 | 2011-11-16 | 三星Led株式会社 | Semiconductor light emitting device and method for fabricating the same |
| CN102231414A (en) * | 2011-06-03 | 2011-11-02 | 王楚雯 | Formation method of LED |
| CN102263178A (en) * | 2011-06-03 | 2011-11-30 | 王楚雯 | Epitaxial wafer and forming method thereof |
| CN102214748A (en) * | 2011-06-20 | 2011-10-12 | 云峰 | Epitaxial structure of LED (light-emitting diode) with GaN (gallium nitride)-based vertical structure and manufacturing method thereof |
| CN202633369U (en) * | 2012-07-05 | 2012-12-26 | 杭州士兰明芯科技有限公司 | LED (Light-Emitting Diode) epitaxial wafer |
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014071879A1 (en) * | 2012-11-12 | 2014-05-15 | 厦门市三安光电科技有限公司 | Method for separating light emitting diode substrate |
| CN103824919A (en) * | 2012-11-15 | 2014-05-28 | 财团法人工业技术研究院 | Light emitting diode |
| CN103811537B (en) * | 2014-03-05 | 2018-02-27 | 上海新储集成电路有限公司 | A kind of large scale wafer and preparation method thereof |
| CN103811537A (en) * | 2014-03-05 | 2014-05-21 | 上海新储集成电路有限公司 | Large-size wafer and preparation method thereof |
| CN103996757A (en) * | 2014-05-30 | 2014-08-20 | 西安神光皓瑞光电科技有限公司 | Method for improving LED luminance through TiO2 nanometer tube array thin film |
| CN103996757B (en) * | 2014-05-30 | 2016-09-07 | 西安神光皓瑞光电科技有限公司 | One utilizes TiO2nano-pipe array thin film improves the method for LED luminance |
| US10964843B2 (en) | 2016-03-29 | 2021-03-30 | Enkris Semiconductor, Inc | Patterned Si substrate-based LED epitaxial wafer and preparation method therefor |
| WO2017167190A1 (en) * | 2016-03-29 | 2017-10-05 | 苏州晶湛半导体有限公司 | Graphical si substrate-based led epitaxial wafer and preparation method therefor |
| CN108807630A (en) * | 2017-04-27 | 2018-11-13 | 中国科学院苏州纳米技术与纳米仿生研究所 | Semiconductor devices and preparation method thereof based on graphical template |
| CN108807630B (en) * | 2017-04-27 | 2021-02-26 | 中国科学院苏州纳米技术与纳米仿生研究所 | Semiconductor device based on graphical template and manufacturing method thereof |
| CN109613518A (en) * | 2018-12-24 | 2019-04-12 | 中科天芯科技（北京）有限公司 | A kind of light beam imaging device |
| CN110148660A (en) * | 2019-06-24 | 2019-08-20 | 湘能华磊光电股份有限公司 | A kind of graphical sapphire substrate and processing method |
| CN111628055A (en) * | 2020-04-20 | 2020-09-04 | 浙江博蓝特半导体科技股份有限公司 | AlGaN-based ultraviolet LED epitaxial layer and stripping method thereof |
| CN111628055B (en) * | 2020-04-20 | 2021-08-17 | 浙江博蓝特半导体科技股份有限公司 | AlGaN-based ultraviolet LED epitaxial layer and stripping method thereof |
| CN112820806A (en) * | 2020-12-25 | 2021-05-18 | 福建晶安光电有限公司 | Patterned substrate and manufacturing method thereof, and LED structure and manufacturing method thereof |
| CN112820806B (en) * | 2020-12-25 | 2022-12-20 | 福建晶安光电有限公司 | Patterned substrate and manufacturing method thereof, and LED structure and manufacturing method thereof |
| CN113328019A (en) * | 2021-05-24 | 2021-08-31 | 厦门乾照光电股份有限公司 | Epitaxial growth substrate, semiconductor epitaxial structure and manufacturing method thereof |
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