CN102694567A - Front end radio frequency transceiver system for multi-standard fully-compatible mobile user terminal chip - Google Patents
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Abstract
The invention discloses a front end radio frequency transceiver system for a multi-standard fully-compatible mobile user terminal chip. The front end radio frequency transceiver system comprises an LTE (long term evolution) diversification receiver, a single frequency synthesizer and an emitter, wherein the LTE diversification receiver is used for carrying out front end treatment at least including track filtering, frequency mixing, variable gain medium frequency and/or low noise amplifying, power detecting and AD (Analog-to-digital) converting on a radio frequency signal with a preset frequency spectrum; the single frequency synthesizer is used for carrying out frequency synthesizing treatment at least including multi-channel analog-to-digital frequency splitting, phase discriminating, oscillating, low-pass filtering and modulating on an acquired front end treatment result; and the emitter is used for carrying out frequency conversion treatment at least including radio frequency AD converting, signal attenuating and frequency converting on a frequency synthesized result, and carrying out high, middle and low end outputs. The system disclosed by the invention can overcome the defects in the prior art of high cost, high system complexity, poor compatibility, large occupied space and the like, so as to achieve the advantages of low cost, low system complexity, good compatibility, small occupied space and the like.
Description
Technical Field
The invention relates to the technical field of four-generation mobile communication, in particular to a radio frequency front end receiving and sending system of a multi-standard full-compatible mobile user terminal chip.
Background
With the development of smart phones and tablet computers, the traffic volume of mobile data is greatly increased. Time Division Long Term Evolution (TD-LTE for short), which is a fourth generation, i.e., 4G mobile communication technology and standard, developed by companies such as alcatel-lucent, nokia siemens communication, down telecommunications, hua shi technology, zhongxing communication, china mobile and the like, improves the spectrum utilization rate, and increases the transmission rate and the capacity of processable data. The success of LTE technology depends on the development of the ecosystem in which it exists, and transceiver technology must be developed at the same or faster rate than infrastructure implementations.
This has prompted operators to use spectrum resources efficiently and implement the frequency-oversubscribed LTE technology as soon as possible due to the expected explosive increase in data usage. This is a challenge in transceiver design. The third generation partnership project (3 GPP) has responded to this challenge with methods that unify Frequency Division Duplexing (FDD) and Time Division Duplexing (TDD) technologies. Currently, the wireless communication spectrum (up to 3.8 GHz) is divided into 43 bands, with 1 to 33 bands listed as LTE-FDD and 33 to 43 listed as LTE-TDD.
From the transceiver point of view, there are challenges:
the method comprises the following steps: such numerous LTE bands necessarily require multi-band transceivers;
the multi-mode: in a conventional operating network, such as Wideband Code Division Multiple Access (WCDMA), EVDO (EV-DO), which is an abbreviation of triple Evolution and Data Only, is called as follows: CDMA 20001 xEV-DO is a Time Division-Synchronous Code Division Multiple Access (TD-SCDMA for short), and roaming of Code Division Multiple Access (CDMA) and Global System for Mobile communication (GSM for short), etc., requires a multimode transceiver;
the technology comprises the following steps: dual technology transceivers need to support both TDD and FDD technologies.
Transceivers in the 0.7 to 2.7 GHz band need to handle both FDD and TDD technologies, as in fig. 1, to support the FDD band of 1-21 and the TDD band of 33-41. Here, the problem of requiring a large amount of digital computation processing power is solved by distributing the computation load between the baseband processor and the transceiver processor. For example, the transceiver may be equipped with an embedded ARM processor to reduce the baseband processing requirements. Meanwhile, the power consumption is reduced, the dynamic adjustment capability is improved, and the response time is shortened.
In addition to the requirements of multi-mode, multi-band, current multi-function radio transceivers also require the following features: low power consumption, small size, standardized baseband interface, flexible radio interface, carrier aggregation capability, and compatibility with 3GPP standards.
China mobile has begun to support four-band Gaussian Filtered Minimum Shift Keying (GMSK)/General Packet Radio Service (GPRS)/Enhanced Data Rate for GSM Evolution (i.e., GGE), TD-SCDMA, and TD-LTE standards on mobile phones, and is expected to be used in large scale in 2012.
In order to be competitive in the developing market, some technical problems have to be solved. When considering the competitive optimal strategy in this market, it is necessary to balance the frequency band allocation, the synchronous voice and data transmission, the Browser Object Model (BOM) cost, and the performance index.
While smartphones are the primary target of entry into the chinese 4G LTE market at the beginning, other market segments are also considered by hardware and software development programs. Considerations also include mature markets like europe and north america, regionally shared emerging markets that are also TD-LTE focused, like india, and other hardware products like dongles, data cards that do not require voice services.
These additional factors affect the design of hardware and software, which must be balanced against the design goals for china mobility. Extreme situations targeting high-end world-class telephony platforms, such as high-pass, fuji and ST ericsson chipsets that can apply the system across all regions, must be avoided. Any and all locales of chipsets may be effectively addressed. These chips are not cost effective as a mid-end product. The conclusion of preliminary market research and technical discussion is that the optimized regional mobile phone has low cost, high performance and low current. Such as envelope tracking DCDC converters, antenna tuning/standing wave compensation circuits and closed loop power control, will differentiate the designed products and solutions.
Fig. 2 shows a Fujitsu MB86Lxxx family of chip system functional block diagram for Fujitsu, eight transmitter outputs to drive an off-chip power amplifier, nine primary inputs and five secondary inputs to support GSM (GSM 850, EGSM900, DCS1800, and PCS 1900) WCDMA (bands I, II, III, IV, V, VI, VIII, IX, X, and XI), LTE ( FDD bands 1, 3, 4, 6, 7, 8, 9, 10, 11, 13, 17, and TDD bands 38 or 40).
Although the above solutions claim to be compatible with industry standards worldwide, handset holders can roam worldwide, but in the case that the world standards are not yet fully established, the main problem with such designs is that they are too costly to be used in mid-bottom handsets, tablets and data cards. The main reasons for the high cost are two, firstly, the chip package is large (6.5 mm x 9.0mm x 1.0 mm) due to the large number of rf inputs and outputs (27), and the design is limited by the number of interfaces. Secondly, the chip area is large due to a plurality of radio frequency front-end amplifiers, and the price has no competitive advantage.
Since the market of 2G second generation mobile phones (see fig. 3) is already mature, and the system solution of the mobile phone is to add the broadband data function of LTE/3G on the basis of the original 2G voice solution from the viewpoint of recycling hardware and software, the mobile phone solution generally includes 6 functional modules, i.e., 4G/3G/2G rf front-end transceiver, Power Amplifier (Power Amplifier), Baseband Processor (Baseband), Application Processor (Application Processor), Memory (Memory), and Power Management module (Power Management Unit). One of the reasons why the technical problems of power consumption, performance and the like of the current multi-standard mobile phone cannot be marketed and popularized on a large scale is that the chip performance is sacrificed due to the fact that the design is not specific and detailed enough and the multi-standard and world-type mobile phone is pursued on one side.
In order to cover all frequency bands of TD-LTE, TD-SCDMA and 4-frequency GSM (Quad-GSM), in the rf front end transceiver system of the conventional mobile user terminal chip shown in fig. 4, the receiver front end must use a surface acoustic filter (SAW filter) to reduce mutual interference between frequency bands, 34, 38, 39 and 40 bands, four bands require four SAW filters, and the LTE receiver requires diversity (diversity) to improve data rate and sensitivity, so the other three SAW filters are used for three LTE bands, 38, 39 and 40 bands. In order to be compatible with 2-generation Mobile phones (see fig. 3), 2 bands of Personal Communication Service (PCS) standard, 3 bands of Distributed Control System (DCS) standard, 5 bands of Enhanced Global System for Mobile Communications (EGSM) standard, and 8 bands of GSM standard are required to be supported, so that the receiver needs 11 saw filters and 11 receiving input terminals.
In the process of implementing the invention, the inventor finds that the prior art at least has the defects of high cost, high system complexity, poor compatibility, large occupied space and the like.
Disclosure of Invention
The invention aims to provide a radio frequency front end receiving and transmitting system of a multi-standard full-compatible mobile user terminal chip aiming at the problems so as to realize the advantages of low cost, low system complexity, good compatibility and small occupied space.
Another objective of the present invention is to provide an application system of a rf front-end transceiver system of a multi-standard fully compatible mobile user terminal chip, that is, an rf front-end system at least including a multi-standard fully compatible mobile user terminal chip based on the rf front-end transceiver system.
In order to achieve the purpose, the invention adopts the technical scheme that: the radio frequency front end receiving and transmitting system of the multi-standard full compatible mobile user terminal chip comprises:
an LTE diversity receiver, configured to perform any front-end processing including at least tracking filtering, frequency mixing, variable gain intermediate frequency and/or low noise amplification, power detection, and AD conversion on a radio frequency signal with a preset frequency spectrum (e.g., with an antenna single-ended receiving frequency of 869-2620 MHz);
a single frequency synthesizer, configured to perform any multiple frequency synthesis processing at least including multiple analog-to-digital frequency division, phase discrimination, oscillation, low-pass filtering, and modulation operation based on a front-end processing result obtained by performing front-end processing by the LTE diversity receiver;
the transmitter is configured to perform any frequency conversion processing at least including radio frequency DA conversion, signal attenuation, and frequency conversion operations based on the frequency synthesis result sent by the single frequency synthesizer, and output the frequency conversion results obtained by the frequency conversion processing (e.g., the high-frequency signal with the frequency of 2300-2620MHz, the intermediate-frequency signal with the frequency of 1880-2025MHz, and the low-frequency signal with the frequency of 824-915 MHz) from the high-frequency output terminal, the intermediate-frequency output terminal, and the low-frequency output terminal through three terminals, respectively.
Further, the LTE diversity receiver includes two signal processing channels disposed in parallel, and a power detector disposed between the two signal processing channels in a matching manner;
each signal processing channel comprises an LNA/VGA, a mixer, a PGA/LPF and two ADCs which are arranged in parallel and are sequentially in signal connection, and a tracking filter which is at least of Q enhancement type and/or Q adjustable type and is in signal connection with the output end of the LNA/VGA;
the first output ends of the two ADCs are respectively used as a diversified orthogonal I output end RXI _ diversity and a diversified orthogonal Q output end RXQ _ diversity of the LTE diversified receiver, or used as an orthogonal I output end RXI and a receiver orthogonal Q output end RXQ of the LTE receiver; second output ends of the two ADCs are connected, and the two ADCs are used for receiving signals from the frequency synthesizer as sampling frequencies;
the power detector is connected between the LNA/VGA output ends in the two signal processing channels; and the output end of the power detector is used for outputting a power detection result.
Furthermore, an on-chip Q value correction unit is arranged in the tracking filter; the on-chip Q value correction unit comprises an LNA, a filtering module, a local oscillator generator, a comparator and a digital correction central controller; wherein:
the output end of the LNA is respectively connected with the input end of the filtering module and the first input end of the comparator; the output end of the local oscillator generator is connected with the second input end of the comparator, the output end of the comparator is connected with the input end of the digital correction central controller, and the output end of the digital correction central controller is connected with the control end of the filtering module.
Further, the frequency synthesizer includes an MMD connected to the two ADCs in each signal processing channel, a receiving local oscillator generator connected to the mixer in each signal processing channel, a transmitting local oscillator generator connected to the MMD and the receiving local oscillator generator, an automatic frequency controller, a PFD/CP, and a digitally controlled crystal oscillator connected to the transmitting local oscillator generator in sequence, and a modulator connected to the automatic frequency controller and the PFD/CP, respectively.
Furthermore, the transmitter comprises an intermediate frequency transmitting unit connected with the 1880-plus 2025MHz radio frequency signal output end of the transmitting local oscillator generator, a high frequency transmitting unit connected with the 2300-plus 2620MHz radio frequency signal output end of the transmitting local oscillator generator, and a low frequency transmitting unit connected with the low frequency radio frequency signal output end of the transmitting local oscillator generator;
the first input end of the high-frequency transmitting unit and the first input end of the intermediate-frequency transmitting unit are orthogonal input ends TXI of the transmitter; and the second input end of the high-frequency transmitting unit and the second input end of the intermediate-frequency transmitting unit are orthogonal input ends TXQ of the transmitter.
Furthermore, the high-frequency transmitting unit comprises two parallel RFDACs and a high-band transformer, wherein the primary side of the high-band transformer is in cross connection with the output ends of the two RFDACs;
the intermediate frequency transmitting unit comprises two parallel RFDACs and a middle-band transformer, wherein the primary side of the middle-band transformer is in cross connection with the output ends of the two RFDACs;
the low-frequency transmitting unit comprises a Power Amplifier Driver (PAD) and a low-band transformer connected with the output end of the PAD.
Further, each RFDAC, for receiving data clocked ClockBB provided by the BBIC, comprises a DAC and a mixer in turn connected to the BBIC signal.
Furthermore, each RFDAC unit also comprises a digital control unit which is respectively connected with the DAC and the mixer through signals;
in the Quad-GSM mode, the digital control unit is used for disconnecting the data lines of the TD-LTD mode and the TD-SCDMA mode in a programming mode, so that the frequency mixing and DA conversion functions of the RFDAC are suspended, and only the buffer amplification function of signals Lop and Lon coming from the LOGEN is realized
Meanwhile, the invention adopts another technical scheme that: the application system of the radio frequency front end receiving and sending system based on the multi-standard fully compatible mobile user terminal chip at least comprises a radio frequency front end system based on the multi-standard fully compatible mobile user terminal chip of the radio frequency front end receiving and sending system;
the radio frequency front-end system of the multi-standard full-compatible mobile user terminal chip comprises a baseband processing chip (BBIC), a Radio Frequency Integrated Circuit (RFIC) which is in signal connection with the BBIC, is used for realizing multi-band signal transceiving and is based on the radio frequency front-end transceiving system, a multi-band Power Amplifier (PA) which is in signal connection with the RFIC respectively, a high-power RF switch which is in signal connection with the RFIC and the multi-band PA respectively, and an antenna which is in signal connection with the RFIC and the high-power RF switch respectively.
Further, the high power RF switch, including at least a high power single pole 5 throw switch (SP 5T); the multi-band PA comprises 34 and 49 band PA, 38 and 40 band PA and 800 and 900MHz band PA which are connected in parallel signals between an RFIC and SP 5T.
The radio frequency front end receiving and sending system of the multi-standard full compatible mobile user terminal chip of each embodiment of the invention, because the system includes: the LTE diversity receiver is used for performing front-end processing at least comprising tracking filtering, frequency mixing, variable gain intermediate frequency and/or low noise amplification, power detection and AD conversion on a radio frequency signal with a preset frequency spectrum; the single frequency synthesizer is used for performing frequency synthesis processing at least comprising multi-modulus frequency division, phase discrimination, oscillation, low-pass filtering and modulation on the obtained front-end processing result; the transmitter is used for carrying out frequency conversion processing at least comprising radio frequency DA conversion, signal attenuation and frequency conversion on the obtained frequency synthesis result and outputting the frequency synthesis result from a high end, a middle end and a low end; hardware cost and packaging interfaces can be reduced, the complexity of the system is reduced, and the feasibility of the system is improved; therefore, the defects of high cost, high system complexity, poor compatibility and large occupied space in the prior art can be overcome, and the advantages of low cost, low system complexity, good compatibility and small occupied space are realized.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a schematic diagram of a spectrum allocation of a fourth generation wireless communication;
FIG. 2 is a schematic diagram of the operating principle of a Fujitsu MB86Lxxx series chip system;
FIG. 3 is a schematic diagram of the working principle of a TD-LTE/TD-SCDMA/2G compatible mobile phone;
FIG. 4 is a schematic diagram of the operation of the RF front-end system of a conventional mobile user terminal chip;
FIG. 5 is a schematic diagram of the operation of the RF front-end system of the multi-standard fully compatible MT-T chip according to the present invention;
fig. 6 is a schematic diagram of the working principle of a radio frequency front end transceiver system [ specifically, a TD-LTE/TD-SCDMA Radio Frequency Integrated Circuit (RFIC) front end section ] of a multi-standard fully compatible mobile user terminal chip according to the present invention;
FIG. 7 is a block diagram showing the principle of RF filter calibration on chip;
FIG. 7a is a filtered waveform for different Q values;
FIG. 7b is a block diagram of filter Q correction;
FIG. 7c is an electrical schematic of a radio frequency digital to analog converter (RFDAC);
FIG. 7d is an electrical schematic of the RFDAC programmed as a buffer;
FIG. 7e is an electrical schematic of a tracking filter;
FIG. 7f is an electrical schematic diagram of the tracking filter adjustable based on the amount of Q enhancement of FIG. 7 e;
FIG. 7g is an electrical schematic diagram of a Q-enhanced wideband based tracking filter of FIG. 7 e;
FIG. 8 is a schematic diagram of the operation principle of a TD-SCDMA mode 34-band and 39-band Radio Frequency Integrated Circuit (RFIC) front-end transceiver system;
FIG. 9 is a schematic diagram of the operation of a TD-SCDMA mode 40 band Radio Frequency Integrated Circuit (RFIC) front end transceiver system;
fig. 10 is a schematic diagram of the operation principle of a TD-LTE mode 38 band Radio Frequency Integrated Circuit (RFIC) front end transceiver system;
FIG. 11 is a schematic diagram of the operation principle of a TD-LTE mode 39-band Radio Frequency Integrated Circuit (RFIC) front-end transceiver system;
fig. 12 is a schematic diagram of the operation principle of the Quad- GSM mode 2, 3, 5, 8-band Radio Frequency Integrated Circuit (RFIC) front-end transceiver system.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.
Embodiments of a radio frequency front end transceiver system
According to the embodiments of the present invention, as shown in fig. 6-12, a radio frequency front end transceiver system of a multi-standard fully-compatible mobile user terminal chip is provided to realize a TD-LTE/TD-SCDMA/Quad-GSM radio frequency front end system architecture with optimized cost and performance, so as to intensively study the LTE-TDD band with relatively concentrated spectrum from 1850MHz to 2660MHz, and simultaneously support the TD-SCDMA (3G), LTE-TDD (4G) and mature Quad-band 2G standards:
Band 2: 1930~1990MHz RX, 1850-1910MHz TX (PCS)；
Band 3: 1805~1880MHz RX, 1710-1785MHz TX (DCS)；
Band 5: 869~894MHz RX, 824~849MHz TX (EGSM)；
Band 8: 925~960MHz RX, 880~915MHz TX (GSM)；
Band 34: 2010~2025MHz (TD-SCDMA)；
Band 38: 2570~2620MHz (TD-LTE)；
Band 39F: 1880~1900MHz (TD-LTE)；
Band 39S: 1900~1920MHz (TD-SCDMA)；
Band 40: 2300~2400MHz (TD-SCDMA)。
as shown in fig. 6, the rf front-end transceiving system of the multi-standard full-compatible mobile user terminal chip of the present embodiment includes an LTE diversified receiver, a frequency synthesizer and a transmitter, which are sequentially connected by signals.
The LTE diversity receiver is configured to perform any front-end processing on a radio frequency signal with a preset frequency spectrum (e.g., an antenna single-ended receiving frequency of 869-2620 MHz), which at least includes tracking filtering, frequency mixing, variable gain intermediate frequency and/or low noise amplification, power detection, and AD conversion, and send an obtained front-end processing result to a single frequency synthesizer.
It should be noted that the Receiver (Receiver) includes two paths, the two paths have the same structure, the Receiver is marked with a diversity (diversity) identifier, and the diversity and multi-channel Receiver is specially used for realizing the standard requirement of LTE, so as to improve the data rate and sensitivity. The first module of the receiver part is a Low Noise Amplifier (LNA for short), and the Noise of the rear-end module is consistent through the gain of the Low Noise Amplifier while the Low Noise of the receiver part is ensured; the subsequent variable Gain module (VGA for short) is used to control the Gain of the low noise Amplifier to meet the requirement of the dynamic range of the receiver, that is, the receiver can adjust the Gain according to the size of the input signal. And a Tracking Filter (Tracking Filter) adjusts the center frequency of the Filter according to the received channel information, filters out-of-band interference and protects the subsequent mixer to work in the linearity range. The power detector senses the magnitude of the filtered signal power and provides signal power information to the baseband processor to configure the receiver. The mixer mixes the frequency signal of the local oscillator generator with the receiving frequency, converts the received frequency signal into a low-frequency signal, and the intermediate frequency Programmable Gain Amplifier (PGA) further amplifies the small signal to an amplitude that can be processed by the analog-to-digital converter, and controls the Gain to adapt to different input signal amplitudes. The Low Pass Filter (LPF) further filters out the out-of-band interference signal at the intermediate frequency, so as to ensure that the signal is within a dynamic range of the signal that can be processed by a Digital-to-Analog Converter (ADC). The digital-to-analog converter converts the analog signal into a digital signal for processing by a digital Baseband processor (Baseband, BB for short).
The single frequency synthesizer is configured to perform any multiple frequency synthesis processing at least including multiple analog-to-digital frequency division, phase discrimination, oscillation, low-pass filtering, and modulation operations based on a front-end processing result obtained by performing front-end processing on the LTE diversity receiver, and send the obtained frequency synthesis result to the transmitter.
It should be noted that, a Digital controlled Crystal oscillator (DCXO) uses a relatively precise off-chip Crystal oscillator, and combines with an on-chip oscillation circuit to generate a precise 26MHz Frequency signal as a reference source of a Frequency synthesizer, a Voltage Controlled Oscillator (VCO) generates a Frequency signal of 26MHz after passing through an analog Divider and dividing by 2, the Frequency signal of 26MHz is obtained after passing through a Multi-mode Divider (MMD), the Frequency signal is compared with the reference source generated by the Digital controlled Crystal oscillator through a Phase Frequency Detector (PFD), the difference between the Frequency and the Phase is converted into a Voltage through a Voltage Pump (Charge Pump, CP) to feed back and adjust the Voltage of the Voltage controlled oscillator, thereby outputting a stable and precise Frequency signal, in order to suppress the noise introduced by the Digital multiple Frequency Divider, a Loop Filter (Filter) is added between the Voltage Pump and the Voltage controlled oscillator, abbreviated LP). Automatic Frequency Control (AFC) coarsely adjusts the Frequency of a voltage controlled oscillator before locking. A Delata-Sigma Modulator (DSM) introduces a modulation signal by adjusting the frequency division multiple of the multi-modulus frequency divider. For the frequency synthesizer direct modulation mode of GMSK.
The transmitter is configured to perform any frequency conversion processing at least including radio frequency DA conversion, signal attenuation, and frequency conversion based on a frequency synthesis result obtained by performing frequency synthesis processing by the frequency synthesizer, and perform three-terminal output on frequency conversion results obtained by the frequency conversion processing (such as a high-frequency signal with a frequency of 2300-2620MHz, an intermediate-frequency signal with a frequency of 1880-2025MHz, and a low-frequency signal with a frequency of 824-915 MHz) from the high-frequency output terminal, the intermediate-frequency output terminal, and the low-frequency output terminal, respectively.
It should be noted that the quadrature I output and Q output of each of the high, medium and low bands are added at the transformer, and the image signal is cancelled, and the local oscillator leakage is also cancelled here due to the differential design. The frequency of the local oscillation orthogonal I and Q input signals of the middle waveband is 1880MHz to 2025MHz, and the frequency of the local oscillation orthogonal I and Q input signals of the high waveband is 23000MHz to 2620 MHz. In TD-SCDMA, TD-LTEh and EDGE modes, the high band and mid band portions receive the quadrature input signals TXI and TXQ from the baseband processor, respectively, and the RFDAC is a radio frequency digital-to-analog converter, as will be described in detail later. In GMSK mode, the modulated signal is directly accessed by the Delta Sigma modulator of the frequency synthesizer, the intermediate frequency (PCS and DCS bands) RFDAC will have a baseband processor programmed as a buffer amplifier, as shown in fig. 7d, and the low frequency (GSM and EGSM) GMSK signal will have the active amplifier driver directly output.
Specifically, as shown in fig. 6, the LTE diversity receiver includes two signal processing channels disposed in parallel, and a power detector disposed between the two signal processing channels in a matching manner; each signal processing channel comprises an LNA/VGA, a mixer, a PGA/LPF and two ADCs which are arranged in parallel and are sequentially in signal connection, and a tracking filter which is at least of Q enhancement type and/or Q adjustable type and is in signal connection with the output end of the LNA/VGA;
first output ends of the two ADCs are respectively used as a diversified orthogonal I output end RXI _ diversity and a diversified orthogonal Q output end RXQ _ diversity of the LTE diversified receiver or used as an orthogonal I output end RXI and a receiver orthogonal Q output end RXQ of the LTE receiver; second output ends of the two ADCs are connected, and the two ADCs are used for receiving signals from the frequency synthesizer as sampling frequencies; the power detector is connected between the LNA/VGA output ends in the two signal processing channels; and the output end of the power detector is used for outputting a power detection result.
In the implementation process of using the LTE diversity receiver as a single-ended multiband receiver, because there is no front-end filter, the front-end transconductance stage (Gm) of the Low Noise Amplifier (LNA) can not only amplify weak signals, but also cannot distort when facing out-of-band interference signals (Blocker) with power as high as 0 dBm. Therefore, an AB-class and A-class composite transconductance stage can be adopted, when an out-of-band interference signal comes, the AB-class provides more current to ensure no distortion, and the A-class transconductance stage ensures small-signal linearity and sensitivity.
A Variable Gain Amplifier (VGA) is used to guarantee the dynamic range of the receiver. The radio frequency filter is located at the output end of the LNA and comprises an output inductor, a capacitor bank and a negative transconductance, a 1880-2620 MHz target frequency band is favorable for realizing an on-chip inductor with a higher Q value, the frequency is not very high, the inductance value is not too large so as to need a very large chip area, the capacitor bank is used for adjusting the target frequency band, and the negative transconductance can improve the whole Q value to be more than 20. Meanwhile, by combining a passive mixer of local oscillator signals with duty ratio of 25% and intermediate frequency filtering, the overall 20MHz out-of-band signal rejection capability of 20dBc can be achieved, and the system index requirement can be met.
As shown in fig. 6, the frequency synthesizer includes an MMD connected to two ADCs in each signal processing channel, a receiving local oscillator generator connected to a mixer in each signal processing channel, a transmitting local oscillator generator connected to the MMD and the receiving local oscillator generator, an automatic frequency controller, a PFD/CP, and a digitally controlled crystal oscillator connected to the transmitting local oscillator generator in sequence, and a modulator connected to the automatic frequency controller and the PFD/CP, respectively.
In the process of using the frequency synthesizer as a single frequency synthesizer, because TD-LTE and TD-SCDMA are both time division duplex (time division duplex TDD) systems, and receive and transmit are performed in time division (not simultaneously), the receiver and transmitter can use the same frequency synthesizer, which reduces the complexity of the system compared to a dual frequency synthesizer system, and reduces the cost due to the reduction of chip area.
As shown in fig. 6, the transmitter includes an intermediate frequency transmitting unit connected to the 1880-2025MHz radio frequency signal output terminal of the transmitting local oscillator generator, a high frequency transmitting unit connected to the 2300-2620MHz radio frequency signal output terminal of the transmitting local oscillator generator, and a low frequency transmitting unit connected to the low frequency radio frequency signal output terminal of the transmitting local oscillator generator;
the first input end of the high-frequency transmitting unit and the first input end of the intermediate-frequency transmitting unit are orthogonal input ends TXI of the transmitter; and the second input end of the high-frequency transmitting unit and the second input end of the intermediate-frequency transmitting unit are orthogonal input ends TXQ of the transmitter.
The high-frequency transmitting unit comprises two parallel RFDACs and a high-band transformer, wherein the primary side of the high-band transformer is in cross connection with the output ends of the two RFDACs; the intermediate frequency transmitting unit comprises two parallel RFDACs and an intermediate band transformer of which the primary side is in cross connection with the output ends of the two RFDACs; and the low-frequency transmitting unit comprises a Power Amplifier Driver (PAD) and a low-band transformer connected with the output end of the PAD.
Here, the transmitter can be used as a three-output transmitter, as shown in fig. 5, and the transmitter output spectrum purity, efficiency and linearity are required to be separated into three independent high-frequency, intermediate-frequency and low-frequency components, B38 and B40 for high frequency, B2, B3, B34 and 39 for intermediate frequency, and B5 and B8 for low frequency. Similarly, the signal channels in the chip are also divided into three paths of independent high frequency, intermediate frequency and low frequency, so that the design can be optimized independently.
The rf front-end system of the multi-standard fully-compatible mobile user terminal chip shown in fig. 5 may be formed based on the rf front-end transceiving system of the multi-standard fully-compatible mobile user terminal chip shown in fig. 6. In fig. 5, a frequency synthesizer is used to optimize the front-end part of the rf front-end transceiving system of the multi-standard full-compatible mobile user terminal chip; for example, the TD-LTE standard, the TD-SCDMA standard and the Quad-GSM standard can be compatible.
Wherein, the receiver uses a tracking filter which can be corrected and reconstructed in the chip, so that the wave bands 2, 3, 5, 8, 34, 38, 39 and 40 are the same, the frequency signals share the same input end from 869MHz to 2620MHz, and the signals are selected according to the receiving frequency band by the Q-enhanced filter in the chip, compared with the prior art shown in FIG. 2, 11 surface acoustic filters are reduced, thereby reducing the cost; the chip package reduces 10 receiver input ends, thereby reducing the complexity of the system and improving the feasibility of the system; however, such a receiver needs to face the problems of the design of the high-linearity low-noise front-end device and the on-chip filtering process.
Fig. 7 can show the calibration process of the rf filter in the chip, in which the dark module is a functional module activated during the calibration process, and at this time, the front-end module is programmed into an oscillator by increasing the negative transconductance value, the frequency of the oscillator is mixed with the frequency synthesizer signal to output a baseband intermediate frequency signal, the frequency is detected by the baseband circuit, the rf filter is set by adjusting the capacitor bank of the front end, and the front-end device leaves the oscillation state and enters the amplification state by decreasing the negative transconductance after the setting. At this time, the Q value of the rf filter is the highest, and the selectivity of the filter is the best, and as shown in fig. 7a, the Q value of the filter can be increased from 3 to about 100.
As shown in fig. 7b, an on-Chip Q value correction unit is disposed Inside the tracking filter (i.e., Inside the Chip of the tracking filter); the on-chip Q value correction unit comprises a Low Noise Amplifier (LNA), a filter module, a Local oscillator (Local oscillator), a comparator and a Digital correction central controller (Digital Calibration Engine); wherein: the output end of the LNA is respectively connected with the input end of the filtering module and the first input end of the comparator; the output end of the local oscillator generator is connected with the second input end of the comparator, the output end of the comparator is connected with the input end of the digital correction central controller, and the output end of the digital correction central controller is connected with the control end of the filtering module.
In fig. 7b, the Q value of the tracking filter is corrected, and the digitally corrected engine controls the entire correction process and timing, the correction process including:
the method comprises the steps of disconnecting an input end of an LNA from an antenna, and programming a filter into an oscillator by increasing a negative transconductance;
a local oscillator (i.e., a local oscillator generator) is programmed to a center frequency of a desired frequency band.
The start-up of the oscillator is detected by the DC offset at the if output of the mixer.
And reducing the negative transconductance value until the front-end oscillation disappears, and recording the setting of the negative transconductance value.
And a fixed negative transconductance value is added to set a margin to ensure the stability of front-end amplification filtering. The Q value is optimal.
As shown in fig. 7c, each RFDAC, for receiving data clocked ClockBB provided by the BBIC, includes a DAC and mixer in turn connected to the BBIC signal.
Fig. 7c can show that the RF-DAC type transmitter circuit adopted in the above embodiment uses fLO/2 frequency as the sampling frequency of DAC, so that frequency 2 of sampling frequency of DAC is multiplied by fLO to be the output signal, which does not need to be filtered out, and can be directly superimposed with the transmitter output signal and output, thereby enhancing the output signal power, and the DAC repetition frequency spectrum above frequency 3 is high, and can be selectively filtered out by the output end RF transformer, so that the system does not need a low pass filter, and does not need a current-voltage conversion interface module, thereby reducing power consumption and noise compared with the conventional transmitter. Due to the adoption of a digital unit design, the weighting of multiple units can drive off-chip power amplification, and a Power Amplification Driver (PAD) module is not required in the system.
As shown in fig. 7d, each RFDAC cell further includes a digital control unit, and the digital control unit is respectively connected to the DAC and the mixer by signals; in the Quad-GSM mode, the digital control unit is used for disconnecting the data lines of the TD-LTD mode and the TD-SCDMA mode in a programming mode, so that the frequency mixing and DA conversion functions of the RFDAC are suspended, and only the buffer amplification functions of signals Lop and Lon coming from the LOGEN are realized.
In the Quad-GSM mode, in order to meet the requirement of strict system noise, the mode signal bandwidth is narrower than 200KHz, which is more suitable for the mode of directly modulating the frequency synthesizer by baseband signals, so the mode transmitter does not need a digital-to-analog converter, and in order to share the output module of the middle frequency band (MB) and the on-chip transformer with other modes, the digital-to-analog converter can be programmed into an output buffer by a digital control unit in a programmable mode. The data lines used in other modes can be disconnected, and the devices of the DAC unit are switched to a fixed level, such as a high level, for the NMOS to be in an on state.
The following are system block diagrams of various modes, wherein a dark-colored functional module is a module needing to be activated in the mode, and a light-colored module is closed in the mode so as to save current. The frequency synthesizer generates frequency signals of corresponding modes in various modes, and all receiving and transmitting related modules are set to the frequency and bandwidth of the mode.
In fig. 7e and 7f, a single-ended input common-drop amplifier design is used, with the input added from the source and the drain of device M1, and its input impedance matching is broadband, as long as 1/g is satisfied
，Is the transconductance of M1. However, the disadvantage of the common-gate design is that the Noise Figure (Noise Figure) is larger than 3dB, so we adopt the design of thermal Noise cancellation, add the device M2 of common source, the signal enters from the gate of M2, the drain outputs, so the gate of M1Thermal noise Vn1 is phase-invariant at the gate of M2 via the source of M1, whereas phase-invariant at the drain of M2 via the cascode device, phase-invariant at the output terminal OUTn is phase-inverse with Vn1, and phase-inverse at the drain of Vn1 via M1 via the cascode device is phase-inverse with Vn1 at the output terminal OUTp, so that thermal noise Vn1 of M1 appears as common mode noise at differential output terminals OUTp and OUTn, thereby suppressing cancellation. For the noise to cancel, it must satisfy:
wherein,
is the device channel thermal noise figure. To reduceInfluence on NF, design>
At the same time
>. This achieves both noise rejection and conversion of a single-ended input to a differential output.
The Peak Detector (Peak Detector) is used for detecting the magnitude of an input signal, and since the Peak Detector is connected to an input end without frequency selectivity, a large signal out of a band can be sensed, when an interference signal exceeds a threshold value, more input devices M1 and M2 (shown by a dotted line) are connected, the direct current bias of the input devices is reduced, and the input devices work in a class AB mode instead of a normal class A mode, the AB mode is a current mode, and when the signal is too large, a voltage domain has no space limited by a power supply voltage, the signal is not saturated by the current mode.
In addition, the output inductor is connected with the capacitor bank in parallel, and is adjusted by a control signal Band according to different frequency bands, so that the output end has frequency selectivity, and out-of-Band interference is filtered outWherein
In order to be able to adjust the frequency,
is electricityThe parasitic resistance of the inductor. Q value is close to 3, and the interference out of band is not much inhibited, all the applications of the method
Value enhancement technique, as shown on the right of FIG. 7e, using negative transconductance generation
In parallel with the output chamber effective impedance Rp because:
when in use
When the value is increased to 1/Rp,
the theoretical value of (a) is infinite, causing the amplifier to start oscillating.
Because, different frequency bands are required
All values are different, as shown in FIG. 9, we design the digital programmable control
The module sets different auxiliary materials according to different frequency ranges
Value, maximizing the Q value without oscillation. Because of this, it is possible to reduce the number of the,
the lowest band Rp is the smallest and therefore the largest is requiredThe value is obtained.
In fig. 7g, two measures are taken to cope with out-of-band large signal interference, and the peak detector and CLASS AB current domain design are first adopted to prevent the amplifier from saturating, as shown in the right part, and the peak detector sets the CLASS AB mode through the control signals Bias _ BLK and BLK after alarming. At this time, the current is large due to the large signal mode, and the impedance matching of the input is not important any more. Secondly, select the received signal through the output LC chamber of Q enhancement mode, the filtering interference signal makes it can not get into next module, down conversion mixer:
in view of the problems and the defects of the traditional low-noise amplifier, the radio frequency front-end receiving and transmitting system of the multi-standard full-compatible mobile user terminal chip of the embodiment adopts a single-end input, uses a single inductor, meets the noise performance, can filter out large out-of-band signals, and covers broadband amplifiers of TD-LTE, TD-SCDMA and four-band GSM.
Fig. 8-12 are block diagrams of systems in various modes, with dark function modules being the ones that need to be activated in this mode and light modules being turned off in the eating mode to save current. The frequency synthesizer generates frequency signals of corresponding modes in various modes, and all receiving and transmitting related modules are set to the frequency and bandwidth of the mode.
In fig. 8, the bands involved include:
Band 34: 2010~2025MHz (TD-SCDMA)；
Band 39 S: 1900~1920MHz (TD-SCDMA)。
in fig. 9, the bands involved include:
Band 40: 2300~2400MHz (TD-SCDMA)。
in fig. 10, the bands involved include:
Band 38: 2570~2620MHz (TD-LTE)。
in fig. 11, the bands involved include:
Band 39 F: 1880~1900MHz (TD-LTE)。
in fig. 12, the bands involved include:
Band 2: 1930~1990MHz RX, 1850-1910MHz TX (PCS)；
Band 3: 1805~1880MHz RX, 1710-1785MHz TX (DCS)；
Band 5: 869~894MHz RX, 824~849MHz TX (EGSM)；
Band 8: 925~960MHz RX, 880~915MHz TX (GSM)。
in the Quad-GSM mode, in order to meet the requirement of strict system noise, the mode signal bandwidth is narrower than 200KHz, which is more suitable for the mode of directly modulating the frequency synthesizer by baseband signals, so the mode transmitter does not need a digital-to-analog converter, and in order to share the output module of the middle frequency band (MB) and the on-chip transformer with other modes, the digital-to-analog converter can be programmed into an output buffer by a digital control unit in a programmable mode. As shown in fig. 7d, the data lines used in other modes are disconnected, and the devices of the DAC unit are switched to a fixed level, such as a high level, and are put into an NMOS state, so that the RF-DAC is in a conducting state.
In view of the problems and the defects of the traditional low-noise amplifier, the radio frequency front-end receiving and transmitting system of the multi-standard full-compatible mobile user terminal chip of the embodiment adopts a single-end input, uses a single inductor, meets the noise performance, can filter out large out-of-band signals, and covers broadband amplifiers of TD-LTE, TD-SCDMA and four-band GSM.
The radio frequency front end receiving and transmitting system of the multi-standard full-compatible mobile user terminal chip of the embodiment of the invention at least can achieve the following beneficial effects:
the method has the advantages that fewer devices outside the sheet are required, and the system cost is reduced;
the number of chip pins is small, the system complexity is reduced, and the cost is reduced;
the individuation and the single TD design are adopted, the performance is optimized, the single frequency synthesizer scheme is adopted, the cost is reduced, and the complexity is reduced;
the front end of the receiver is corrected on site, and performance is improved;
the system scheme is compatible with the existing 2G system, and the time to market is shortened.
Application system (i.e. radio frequency front-end system) embodiment of radio frequency front-end receiving and sending system
Based on the embodiment of the rf front end transceiving system, this embodiment provides one of application systems based on the rf front end transceiving system, that is, an rf front end system of a multi-standard fully compatible mobile user terminal chip based on the rf front end transceiving system.
As shown in fig. 5, the RF front-end system of the multi-standard full-compatible mobile user terminal chip of this embodiment includes a BBIC, a RF integrated circuit RFIC that is signal-connected to the BBIC, is used for implementing multi-band signal transceiving, and is based on the RF front-end transceiving system, a multi-band power amplifier PA that is signal-connected to the RFIC, a high-power RF switch that is signal-connected to the RFIC and the multi-band PA, and an antenna that is signal-connected to the RFIC and the high-power RF switch.
Here, the high power RF switch includes at least a high power single pole 5 throw switch SP 5T; the multi-band PA comprises 34 and 49 band PA, 38 and 40 band PA and 800 and 900MHz band PA which are connected in parallel signals between an RFIC and SP 5T.
In fig. 5, a single frequency synthesizer is used to optimize the front-end portion of the rf front-end system of the multi-standard full-compatible mobile user terminal chip; for example, the TD-LTE standard, the TD-SCDMA standard and the Quad-GSM standard can be compatible.
Wherein, the receiver uses a tracking filter which can be corrected and reconstructed in the chip, so that the wave bands 2, 3, 5, 8, 34, 38, 39 and 40 are the same, the frequency signals share the same input end from 869MHz to 2620MHz, and the signals are selected according to the receiving frequency band by the Q-enhanced filter in the chip, compared with the prior art shown in FIG. 4, 11 surface acoustic filters are reduced, thereby reducing the cost; the chip package reduces 10 receiver input ends, thereby reducing the complexity of the system and improving the feasibility of the system; however, such a receiver needs to face the problems of the design of the high-linearity low-noise front-end device and the on-chip filtering process.
In fig. 5, the device names and models used include:
34. a 49-band power amplifier (B34, B39 PA; Skyworks SKY 77712);
38. a 40 band power amplifier (B38, B40 PA; Skyworks SKY 77441);
800-900MHz high linearity power amplifier (B5, B8 PA; Skyworks SKY 65126-21);
high Power Single Pole 5-Throw (High-Power Single polar Five Throw, SP 5T; Skyworks, SKY13415-485 LF);
an LTE Baseband chip (BBIC, TD-LTE/TD-SCDMA/GSM Baseband Modem, Spreadtrum, SC 9610);
Band 2: 1930~1990MHz RX, 1850-1910MHz TX (PCS)；
Band 3: 1805~1880MHz RX, 1710-1785MHz TX (DCS)；
Band 5: 869~894MHz RX, 824~849MHz TX (EGSM)；
Band 8: 925~960MHz RX, 880~915MHz TX (GSM)；
Band 34: 2010~2025MHz (TD-SCDMA)；
Band 38: 2570~2620MHz (TD-LTE)；
Band 39 F: 1880~1900MHz (TD-LTE)；
Band 39 S: 1900~1920MHz (TD-SCDMA)；
Band 40: 2300~2400MHz (TD-SCDMA)。
in the foregoing embodiment of the rf front-end system, regarding the internal structure and performance of the RFIC, reference may be made to fig. 6 to fig. 12 and the related descriptions of the embodiments of the rf front-end transceiver system, which are not repeated herein.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. The radio frequency front end receiving and transmitting system of the multi-standard full compatible mobile user terminal chip is characterized by comprising:
the LTE diversified receiver is used for carrying out any front-end processing at least comprising tracking filtering, frequency mixing, variable gain intermediate frequency and/or low noise amplification, power detection and AD conversion on a radio frequency signal with a preset frequency spectrum;
a single frequency synthesizer, configured to perform any multiple frequency synthesis processing at least including multiple analog-to-digital frequency division, phase discrimination, oscillation, low-pass filtering, and modulation operation based on a front-end processing result obtained by performing front-end processing by the LTE diversity receiver;
and the transmitter is used for performing any frequency conversion processing at least comprising radio frequency DA conversion, signal attenuation and frequency conversion operation based on a frequency synthesis result obtained by performing frequency synthesis processing on the single frequency synthesizer, and outputting the frequency conversion result obtained by the frequency conversion processing from a high-frequency output end, a medium-frequency output end and a low-frequency output end respectively.
2. The rf front-end transceiver system of multi-standard full-compatible mobile user terminal chip according to claim 1, wherein the LTE diversified receiver comprises two signal processing channels disposed in parallel and a power detector disposed between the two signal processing channels in a matching manner;
each signal processing channel comprises an LNA/VGA, a mixer, a PGA/LPF and two ADCs which are arranged in parallel and are sequentially in signal connection, and a tracking filter which is at least of Q enhancement type and/or Q adjustable type and is in signal connection with the output end of the LNA/VGA;
the first output ends of the two ADCs are respectively used as a diversified orthogonal I output end RXI _ diversity and a diversified orthogonal Q output end RXQ _ diversity of the LTE diversified receiver, or used as an orthogonal I output end IRXI and an orthogonal Q output end RXQ of the LTE receiver; second output ends of the two ADCs are connected, and the two ADCs are used for receiving signals from the frequency synthesizer as sampling frequencies;
the power detector is connected between the LNA/VGA output ends in the two signal processing channels; and the output end of the power detector is used for outputting a power detection result.
3. The rf front-end transceiver system of multi-standard full-compatible mt chip of claim 2, wherein an on-chip Q-factor correction unit is disposed inside the tracking filter; the on-chip Q value correction unit comprises an LNA, a filtering module, a local oscillator generator, a comparator and a digital correction central controller; wherein:
the output end of the LNA is respectively connected with the input end of the filtering module and the first input end of the comparator; the output end of the local oscillator generator is connected with the second input end of the comparator, the output end of the comparator is connected with the input end of the digital correction central controller, and the output end of the digital correction central controller is connected with the control end of the filtering module.
4. The RF front-end transceiver system of claim 1, wherein the single frequency synthesizer comprises an MMD connected to two ADCs in each signal processing channel, a receiving local oscillator generator connected to a mixer in each signal processing channel, a transmitting local oscillator generator respectively connected to the MMD and the receiving local oscillator generator, an automatic frequency controller, a PFD/CP, and a NC crystal oscillator sequentially connected to the transmitting local oscillator generator, and a modulator respectively connected to the automatic frequency controller and the PFD/CP.
5. The system of claim 4, wherein the transmitter comprises an intermediate frequency transmitter unit connected to the 1880-2025MHz RF signal output of the transmit local oscillator generator, a high frequency transmitter unit connected to the 2300-2620MHz RF signal output of the transmit local oscillator generator, and a low frequency transmitter unit connected to the low frequency RF signal output of the transmit local oscillator generator;
the first input end of the high-frequency transmitting unit and the first input end of the intermediate-frequency transmitting unit are orthogonal input ends TXI of the transmitter; and the second input end of the high-frequency transmitting unit and the second input end of the intermediate-frequency transmitting unit are orthogonal input ends TXQ of the transmitter.
6. The RF front-end transceiver system of claim 5, wherein the high-frequency transmitter unit comprises two RFDACs arranged in parallel and a high-band transformer whose primary side is cross-connected to the output terminals of the two RFDACs;
the intermediate frequency transmitting unit comprises two parallel RFDACs and a middle-band transformer, wherein the primary side of the middle-band transformer is in cross connection with the output ends of the two RFDACs;
the low-frequency transmitting unit comprises a power amplifier driver PAD and a low-band transformer connected with the output end of the PAD.
7. The RF front-end transceiver system of claim 6, wherein each RF DAC is used to receive data clocked by ClockBB provided by BBIC, and comprises a DAC and a mixer connected to BBIC signal in turn.
8. The system of claim 7, wherein each RFDAC cell further comprises a digital control unit, the digital control unit is in signal connection with the DAC and the mixer respectively;
in the Quad-GSM mode, the digital control unit is configured to disconnect data lines of the TD-LTD mode and the TD-SCDMA mode in a programming manner, suspend the frequency mixing and DA conversion functions of the RFDAC, and only implement a buffering and amplifying function for signals Lop and Lon from LOGEN.
9. The application system of the RF front-end transceiver system based on the multi-standard fully compatible MT chip as claimed in claim 1, at least comprising the RF front-end system of the multi-standard fully compatible MT chip;
the radio frequency front-end system of the multi-standard full-compatible mobile user terminal chip comprises a baseband processing chip BBIC, a radio frequency integrated circuit RFIC which is in signal connection with the BBIC, is used for realizing multi-band signal transceiving and is based on the radio frequency front-end transceiving system, a multi-band power amplifier PA which is in signal connection with the RFIC respectively, a high-power RF switch which is in signal connection with the RFIC and the multi-band PA respectively, and an antenna which is in signal connection with the RFIC and the high-power RF switch respectively.
10. The system of claim 9, wherein the high power RF switch comprises at least a high power single pole 5 throw switch SP 5T; the multi-band PA comprises 34 and 49 band PA, 38 and 40 band PA and 800 and 900MHz band PA which are connected in parallel signals between an RFIC and SP 5T.
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