CN102651607A - Power supply control device and power supply control method - Google Patents
Power supply control device and power supply control method Download PDFInfo
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- CN102651607A CN102651607A CN2011100457884A CN201110045788A CN102651607A CN 102651607 A CN102651607 A CN 102651607A CN 2011100457884 A CN2011100457884 A CN 2011100457884A CN 201110045788 A CN201110045788 A CN 201110045788A CN 102651607 A CN102651607 A CN 102651607A
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Abstract
The invention discloses a power supply control device and a power supply control method. The power supply control device comprises a first electronic switch, a second electronic switch, a capacitor and a controller, wherein the first electronic switch is connected with a positive voltage source; the second electronic switch is connected in series with the first electronic switch; and the capacitor is electrically coupled with the first and the second electronic switches. When the voltage of the first electronic switch is lower than a preset voltage value, the controller can switch off the second electronic switch.
Description
Technical field
The invention relates to power electronic technology, and particularly relevant for a kind of power control and power control method.
Background technology
In recent years because industrial and commercial flourishing, social progress, the product that provides relatively also is primarily aimed at facility, certain, economical and practically is purport that therefore, current development product is also more progressive than in the past, and is able to contribution society.
Oil crisis is the problem that present each industry all must be faced, so carbon reduction becomes the important administration strategy of national governments.The supply of electric power is all power resources in the computer, has determined the stable and long-term quality of using of a computer.Therefore, control electric power how can be stable, and effective energy savings, real one of the current important research and development problem that belongs to also becomes current association area and needs improved target badly.
Summary of the invention
Therefore, a purpose of the present invention is that a kind of power control and power control method are being provided.
According to one embodiment of the invention, a kind of power control comprises one first electronic switch, one second electronic switch, a capacitor and a controller.Structurally, first electronic switch connects positive voltage source, and second electronic switch is connected in series first electronic switch, and capacitor electrically couples first, second electronic switch.On using, when the voltage of first electronic switch was lower than a scheduled voltage, controller can cut out second electronic switch.
Moreover the first above-mentioned electronic switch can be one first metal oxide semiconductor transistor.Structurally, the drain electrode of first metal oxide semiconductor transistor connects positive voltage source, and the source electrode of first metal oxide semiconductor transistor connects second electronic switch.
Moreover the first above-mentioned metal oxide semiconductor transistor has in one first and connects diode.Structurally, the negative pole that connects diode in first connects the drain electrode of first metal oxide semiconductor transistor, and the positive pole that connects diode in first connects the source electrode of first metal oxide semiconductor transistor.
Moreover the second above-mentioned electronic switch can be one second metal oxide semiconductor transistor.Structurally, the drain electrode of second metal oxide semiconductor transistor connects the source electrode of first metal oxide semiconductor transistor.
Moreover the second above-mentioned metal oxide semiconductor transistor has in one second and connects diode.Structurally, the negative pole that connects diode in second connects the drain electrode of second metal oxide semiconductor transistor, and the positive pole that connects diode in second connects the source electrode of second metal oxide semiconductor transistor.
Moreover above-mentioned power control also comprises an inductor.Structurally, source electrode and the other end that an end of inductor connects first metal oxide semiconductor transistor connects an end of capacitor, and wherein the other end of capacitor connects the source electrode of second metal oxide semiconductor transistor.
Moreover above-mentioned power control also comprises a step down voltage redulator.Step down voltage redulator has one first control signal output ends and one second control signal output ends.Structurally, first control signal output ends connects the grid of first metal oxide semiconductor transistor, and second control signal output ends connects controller.
Moreover above-mentioned controller also comprises an adverse current control device and a logical block.In the use, when the adverse current control device can be lower than scheduled voltage at the voltage between the drain electrode that detects first metal oxide semiconductor transistor, source electrode, produce a stop signal.Logical block can be ended second metal oxide semiconductor transistor when receiving from the pulse wave width modulation signal of second control signal output ends and receiving the stop signal from the adverse current control device.
Moreover, above-mentioned logical block be one with the door.Be connected second control signal output ends and adverse current control device respectively with two inputs of door, be connected the grid of second metal oxide semiconductor transistor with an output of door.
Moreover the exportable logic low of above-mentioned adverse current control device is with as above-mentioned stop signal.
According to another embodiment of the present invention, a kind of power control and power control method comprise the following steps:
(a) one first electronic switch, one second electronic switch and a capacitor are provided, wherein first electronic switch connects a positive voltage source, and second electronic switch is connected in series first electronic switch, and capacitor electrically couples first, second electronic switch; And
(b) when the voltage of first electronic switch is lower than a scheduled voltage, close second electronic switch.
In step (a); Can provide one first metal oxide semiconductor transistor with as first electronic switch; Wherein the drain electrode of first metal oxide semiconductor transistor connects positive voltage source, and the source electrode of first metal oxide semiconductor transistor connects second electronic switch.
Moreover; The first above-mentioned metal oxide semiconductor transistor has in one first and connects diode; The negative pole that connects diode in first connects the drain electrode of first metal oxide semiconductor transistor, and the positive pole that connects diode in first connects the source electrode of first metal oxide semiconductor transistor.
In addition, in step (a), can provide one second metal oxide semiconductor transistor with as second electronic switch, wherein the drain electrode of second metal oxide semiconductor transistor connects the source electrode of first metal oxide semiconductor transistor.
Moreover; The second above-mentioned metal oxide semiconductor transistor has in one second and connects diode; The negative pole that connects diode in second connects the drain electrode of second metal oxide semiconductor transistor, and the positive pole that connects diode in second connects the source electrode of second metal oxide semiconductor transistor.
In addition, in step (a), an inductor can be provided.Source electrode and the other end that inductor one end connects first metal oxide semiconductor transistor connects an end of capacitor, and wherein the other end of capacitor connects the source electrode of second metal oxide semiconductor transistor.
In step (b), can detect the drain electrode of first metal oxide semiconductor transistor, the voltage between source electrode; Then, when the drain electrode of first metal oxide semiconductor transistor, voltage between source electrode are lower than scheduled voltage, then produce a stop signal; Then, when receiving from the pulse wave width modulation signal of a step down voltage redulator and receiving the stop signal from the adverse current control device, second metal oxide semiconductor transistor is ended.
In sum, technical scheme of the present invention compared with prior art has tangible advantage and beneficial effect.Through technique scheme, can reach suitable technological progress, and have the extensive value on the industry, it has advantage at least:
1, see through closing of second electronic switch, make the reverse current of capacitor can not release via second electronic switch, thus energy savings; And
2, the reverse current of capacitor can be via the first electronic switch feed-in positive voltage source, and the energy avoids waste.
Below will do detailed description to above-mentioned explanation and ensuing execution mode, and explanation further will be provided technical scheme of the present invention with embodiment.
Description of drawings
For letting above and other objects of the present invention, characteristic, advantage and the embodiment can be more obviously understandable, the explanation of appended accompanying drawing be following:
Fig. 1 is the circuit block diagram according to a kind of power control of one embodiment of the invention;
Fig. 2 is the sequential chart of the power control of Fig. 1; And
Fig. 3 is the flow chart according to a kind of power control method of another embodiment of the present invention.
[primary clustering symbol description]
100: power control C: capacitor
110: step down voltage redulator D1: connect diode in first
111: the first control signal output ends D2: connect diode in second
112: the second control signal output ends L: inductor
120: controller MN1: first electronic switch
122: adverse current control device MN2: second electronic switch
124: logical block V
A: control voltage
125,136: input V
GATE1: first control signal
127: output V
GATE2: second control signal
210: scheduled voltage V
i: voltage
300: power control method V
In: positive voltage source
310,320: step V
o: output voltage
Embodiment
In order to make narration of the present invention more detailed and complete, can be with reference to appended accompanying drawing and the various embodiment of the following stated, identical number is represented same or analogous assembly in the accompanying drawing.On the other hand, well-known assembly and step are not described among the embodiment, to avoid that the present invention is caused unnecessary restriction.
In execution mode and claims, only if limit to some extent especially for article in the interior literary composition, otherwise " one " can make a general reference single one or more with " being somebody's turn to do ".
In addition; In execution mode and claims; Relate to the description of " electric property coupling (electrically coupled) ", it can be made a general reference an assembly and sees through other assembly and be electrically connected to another assembly indirectly, or an assembly need not see through other assembly and directly be electrically connected to another assembly.
In " comprising " used herein, " comprising ", " having " and similar vocabulary, all regard as open conjunction.For example, " have " expression assembly, composition or step combination in do not get rid of assembly, composition or the step that claim is not put down in writing.
Fig. 1 is the circuit block diagram according to a kind of power control 100 of one embodiment of the invention.On the practice, power control 100 to direct current transducer, reduction voltage circuit, circuit of synchronous rectification etc., or is used in relevant sport technique segment applicable to direct current widely.
As shown in Figure 1; Power control 100 can comprise step down voltage redulator 110, controller 120, the first electronic switch MN1, the second electronic switch MN2, capacitor C and inductor L, and wherein step down voltage redulator 110 has first control signal output ends 111 and second control signal output ends 112.
Structurally, first control signal output ends 111 connects the first electronic switch MN1, and second control signal output ends 112 connects controller 120.The first electronic switch MN1 connects positive voltage source V
In, the second electronic switch MN2 is connected in series the first electronic switch MN1, and capacitor C sees through first, second electronic switch of inductor L electric property coupling MN1, MN2.
On using, first control signal output ends, the 111 exportable first control signal V
GATE1To control the keying of the first electronic switch MN1, second control signal output ends, the 112 exportable second control signal V
GATE2Give controller 120.Controller 120 can be at the voltage V that detects the first electronic switch MN1
iWhen being lower than a scheduled voltage, close the second electronic switch MN2; Controller 120 can be at the voltage V that detects the first electronic switch MN1
iWhen being greater than or equal to this scheduled voltage, control the keying of the second electronic switch MN2 according to second control signal.
In present embodiment, " scheduled voltage " can be looked its size of practical application elasticity adjustment by the designer.The first control signal V that first control signal output ends 111 is exported
GATE1Can be the first pulse wave width modulation signal, the second control signal V that second control signal output ends 112 is exported
GATE2Can be the second pulse wave width modulation signal.
As shown in Figure 1, the first electronic switch MN1 can be first metal oxide semiconductor transistor.Structurally, the drain electrode of first metal oxide semiconductor transistor connects positive voltage source V
In, the source electrode of first metal oxide semiconductor transistor connects second electronic switch, and the grid of first metal oxide semiconductor transistor connects first control signal output ends 111.
Moreover first metal oxide semiconductor transistor has and meets diode D1 in first.Structurally, the negative pole that meets diode D1 in first connects the drain electrode of first metal oxide semiconductor transistor, and the positive pole that meets diode D1 in first connects the source electrode of first metal oxide semiconductor transistor.
As shown in Figure 1, the second electronic switch MN2 can be second metal oxide semiconductor transistor.Structurally, the drain electrode of second metal oxide semiconductor transistor connects the source electrode of first metal oxide semiconductor transistor, and the grid of second metal oxide semiconductor transistor connects controller 120.
Moreover second metal oxide semiconductor transistor has and meets diode D2 in second.Structurally, the negative pole that meets diode D2 in second connects the drain electrode of second metal oxide semiconductor transistor, and the positive pole that meets diode D2 in second connects the source electrode of second metal oxide semiconductor transistor.
Moreover source electrode and the other end that the end of inductor L connects first metal oxide semiconductor transistor connects the end of capacitor C, and wherein the other end of capacitor C connects the source electrode of second metal oxide semiconductor transistor.
In the use, adverse current control device 122 can be at the voltage V between the drain electrode that detects first metal oxide semiconductor transistor, source electrode
iWhen being lower than above-mentioned scheduled voltage, produce a stop signal.Logical block 124 can second metal oxide semiconductor transistor is ended, that is the second electronic switch MN2 be closed when receiving from the pulse wave width modulation signal of second control signal output ends 112 and receiving the stop signal from adverse current control device 122.
In present embodiment, logical block 124 be one with the door.Be connected second control signal output ends 112 and adverse current control device 122 respectively with two inputs 125,126 of door, be connected the grid of second metal oxide semiconductor transistor with an output 127 of door.
In using, adverse current control device 122 can be at the drain electrode of first metal oxide semiconductor transistor, voltage V between source electrode
iBe lower than above-mentioned scheduled voltage during, output voltage V
oBe a logic low (logic low level) with as above-mentioned stop signal.Whereby, with the interior during this period control voltage V of the output 127 of door
ABe low-voltage position standard, and second metal oxide semiconductor transistor is ended.
On the contrary, adverse current control device 122 can be at the drain electrode of first metal oxide semiconductor transistor, voltage V between source electrode
iBe greater than or equal to above-mentioned scheduled voltage during, output voltage V
oBe that a logic high is accurate.Whereby, with the output 127 of door during this period in, output pulse wave width modulation signal is with conducting second metal oxide semiconductor transistor off and on.
On real the work, step down voltage redulator 110 can be step-down control circuit (buck control IC).Adverse current control device 122 can comprise detecting voltage device and signal generator, and detecting voltage device wherein can be detected the drain electrode of first metal oxide semiconductor transistor, the voltage V between source electrode
iWhether be lower than above-mentioned scheduled voltage, signal generator can be according to voltage V
iWhether be lower than scheduled voltage and come output logic low level or logic high standard.
For power control 100 is done to set forth more specifically, please with reference to Fig. 2, Fig. 2 is the sequential chart of the power control 100 of Fig. 1.As shown in Figure 2, control signal V
GATE2Be the pulse wave width modulation signal, at the drain electrode of first metal oxide semiconductor transistor, voltage V between source electrode
iBe lower than scheduled voltage 210 during, output voltage V
oBe logic low (logic low level).Whereby, control voltage V
AFor low-voltage position standard, in order to second metal oxide semiconductor transistor is ended.
On the contrary, at the drain electrode of first metal oxide semiconductor transistor, voltage V between source electrode
iBe greater than or equal to above-mentioned scheduled voltage during, output voltage V
oBe the logic high standard.Whereby, control voltage V
AAccording to the accurate output in the position of pulse wave width modulation signal, in order to the conducting off and on of second metal oxide semiconductor transistor.
Fig. 3 is the flow chart according to a kind of power control method 300 of another embodiment of the present invention.As shown in Figure 3, power control method 300 comprises step 310～320 (should be appreciated that mentioned in the present embodiment step except that chatting bright its order person especially, all can be adjusted its front and back order according to actual needs, even can carry out simultaneously simultaneously or partly).
In step 310 one first electronic switch, one second electronic switch and a capacitor can be provided, wherein first electronic switch connects a positive voltage source, and second electronic switch is connected in series first electronic switch, and capacitor electrically couples first, second electronic switch; And
When step 320 can be lower than a scheduled voltage at the voltage of first electronic switch, close second electronic switch.
In step 310; Can provide one first metal oxide semiconductor transistor with as first electronic switch; Wherein the drain electrode of first metal oxide semiconductor transistor connects positive voltage source, and the source electrode of first metal oxide semiconductor transistor connects second electronic switch.
Moreover; The first above-mentioned metal oxide semiconductor transistor has in one first and connects diode; The negative pole that connects diode in first connects the drain electrode of first metal oxide semiconductor transistor, and the positive pole that connects diode in first connects the source electrode of first metal oxide semiconductor transistor.
In addition, in step 310, can provide one second metal oxide semiconductor transistor with as second electronic switch, wherein the drain electrode of second metal oxide semiconductor transistor connects the source electrode of first metal oxide semiconductor transistor.
Moreover; The second above-mentioned metal oxide semiconductor transistor has in one second and connects diode; The negative pole that connects diode in second connects the drain electrode of second metal oxide semiconductor transistor, and the positive pole that connects diode in second connects the source electrode of second metal oxide semiconductor transistor.
In addition, in step 310, an inductor can be provided.Source electrode and the other end that inductor one end connects first metal oxide semiconductor transistor connects an end of capacitor, and wherein the other end of capacitor connects the source electrode of second metal oxide semiconductor transistor.
In step 320, can detect the drain electrode of first metal oxide semiconductor transistor, the voltage between source electrode; Then, when the drain electrode of first metal oxide semiconductor transistor, voltage between source electrode are lower than scheduled voltage, then produce a stop signal; Then, when receiving from the pulse wave width modulation signal of a step down voltage redulator and receiving the stop signal from the adverse current control device, second metal oxide semiconductor transistor is ended.
Though the present invention discloses as above with execution mode; Right its is not in order to limit the present invention; Anyly be familiar with this art; Do not breaking away from the spirit and scope of the present invention, when can doing various changes and retouching, so protection scope of the present invention is as the criterion when looking the scope that appending claims defines.
Claims (17)
1. a power control is characterized in that, comprises at least:
One first electronic switch connects a positive voltage source;
One second electronic switch is connected in series this first electronic switch;
One capacitor, this first, second electronic switch of electric property coupling; And
One controller when being lower than a scheduled voltage in order to the voltage when this first electronic switch, cuts out this second electronic switch.
2. power control according to claim 1; It is characterized in that; This first electronic switch is one first metal oxide semiconductor transistor; The drain electrode of this first metal oxide semiconductor transistor connects this positive voltage source, and the source electrode of this first metal oxide semiconductor transistor connects this second electronic switch.
3. power control according to claim 2; It is characterized in that; This first metal oxide semiconductor transistor has in one first and connects diode; This negative pole that connects diode in first connects the drain electrode of this first metal oxide semiconductor transistor, and this positive pole that connects diode in first connects the source electrode of this first metal oxide semiconductor transistor.
4. power control according to claim 3; It is characterized in that; This second electronic switch is one second metal oxide semiconductor transistor, and the drain electrode of this second metal oxide semiconductor transistor connects the source electrode of this first metal oxide semiconductor transistor.
5. power control according to claim 4; It is characterized in that; This second metal oxide semiconductor transistor has in one second and connects diode; This negative pole that connects diode in second connects the drain electrode of this second metal oxide semiconductor transistor, and this positive pole that connects diode in second connects the source electrode of this second metal oxide semiconductor transistor.
6. power control according to claim 5 is characterized in that, also comprises:
One inductor, one of which end connect the source electrode of this first metal oxide semiconductor transistor and the other end connects an end of this capacitor, and wherein the other end of this capacitor connects the source electrode of this this second metal oxide semiconductor transistor.
7. power control according to claim 6 is characterized in that, also comprises:
One step down voltage redulator has one first control signal output ends and one second control signal output ends, and wherein this first control signal output ends connects the grid of this first metal oxide semiconductor transistor, and this second control signal output ends connects this controller.
8. power control according to claim 7 is characterized in that, this controller comprises:
One adverse current control device in order to when the voltage between the drain electrode that detects this first metal oxide semiconductor transistor, source electrode is lower than this scheduled voltage, produces a stop signal; And
One logical block in order to when receiving from the pulse wave width modulation signal of this second control signal output ends and receiving this stop signal from this adverse current control device, is ended this second metal oxide semiconductor transistor.
9. power control according to claim 8; It is characterized in that; This logical block be one with the door; Should be connected this second control signal output ends and this adverse current control device respectively with two inputs of door, should be connected the grid of this second metal oxide semiconductor transistor with an output of door.
10. power control according to claim 9 is characterized in that, this adverse current control device is exported a logic low with as this stop signal.
11. a power control method is characterized in that, comprises the following step:
(a) one first electronic switch, one second electronic switch and a capacitor are provided, wherein this first electronic switch connects a positive voltage source, this this first electronic switch of second electronic switch serial connection, and this capacitor electrically couples this first, second electronic switch; And
(b) when the voltage of this first electronic switch is lower than a scheduled voltage, close this second electronic switch.
12. power control method according to claim 11 is characterized in that, step (a) comprises:
Provide one first metal oxide semiconductor transistor with as this first electronic switch; Wherein the drain electrode of this first metal oxide semiconductor transistor connects this positive voltage source, and the source electrode of this first metal oxide semiconductor transistor connects this second electronic switch.
13. power control method according to claim 12; It is characterized in that; This first metal oxide semiconductor transistor has in one first and connects diode; This negative pole that connects diode in first connects the drain electrode of this first metal oxide semiconductor transistor, and this positive pole that connects diode in first connects the source electrode of this first metal oxide semiconductor transistor.
14. power control method according to claim 13 is characterized in that, step (a) also comprises:
Provide one second metal oxide semiconductor transistor with as this second electronic switch, wherein the drain electrode of this second metal oxide semiconductor transistor connects the source electrode of this first metal oxide semiconductor transistor.
15. the power control method of stating according to claim 14; It is characterized in that; This second metal oxide semiconductor transistor has in one second and connects diode; This negative pole that connects diode in second connects the drain electrode of this second metal oxide semiconductor transistor, and this positive pole that connects diode in second connects the source electrode of this second metal oxide semiconductor transistor.
16. power control method according to claim 15 is characterized in that, step (a) also comprises:
One inductor is provided, and this inductor one end connects the source electrode of this first metal oxide semiconductor transistor and the other end connects an end of this capacitor, and wherein the other end of this capacitor connects the source electrode of this second metal oxide semiconductor transistor.
17. power control method according to claim 16 is characterized in that, step (b) comprises:
Detect the drain electrode of this first metal oxide semiconductor transistor, the voltage between source electrode;
When the drain electrode of this first metal oxide semiconductor transistor, voltage between source electrode are lower than this scheduled voltage, produce a stop signal; And
When receiving from the pulse wave width modulation signal of a step down voltage redulator and receiving this stop signal from this adverse current control device, this second metal oxide semiconductor transistor is ended.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011100457884A CN102651607A (en) | 2011-02-23 | 2011-02-23 | Power supply control device and power supply control method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011100457884A CN102651607A (en) | 2011-02-23 | 2011-02-23 | Power supply control device and power supply control method |
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| CN102651607A true CN102651607A (en) | 2012-08-29 |
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| CN2011100457884A Pending CN102651607A (en) | 2011-02-23 | 2011-02-23 | Power supply control device and power supply control method |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000092824A (en) * | 1998-09-10 | 2000-03-31 | Matsushita Electric Ind Co Ltd | Switching regulator and lsi system |
| CN101252316A (en) * | 2007-02-22 | 2008-08-27 | 株式会社理光 | Switching regulator |
-
2011
- 2011-02-23 CN CN2011100457884A patent/CN102651607A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000092824A (en) * | 1998-09-10 | 2000-03-31 | Matsushita Electric Ind Co Ltd | Switching regulator and lsi system |
| CN101252316A (en) * | 2007-02-22 | 2008-08-27 | 株式会社理光 | Switching regulator |
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Application publication date: 20120829 |