CN102650982A - LM (Levenberg-Marquard) algorithm realizing method based on FPGA (Field Programmable Gate Array) - Google Patents
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Abstract
The invention relates to an LM (Levenberg-Marquard) algorithm realizing method based on an FPGA (Field Programmable Gate Array), in particular to an FPGA realizing technology for the LM algorithm of Gaussian curve fitting, and belongs to the technical field of data processing. The LM algorithm realizing method based on the FPGA comprises the following steps of: at first, carrying out series-parallel conversion and normalization on an input serial data stream, and then carrying out an LM algorithm iterative loop, wherein the iterative loop comprises the following sub steps of: at first, calculating a fitting variable; carrying out an index search; calculating an iteration coefficient; and after calculating the iteration coefficient, synchronizing time of each parameter reaching function module through a delay sub module, and correcting the iteration coefficient through a parallel judgment sub module, so as to correct the fitting variable. With the adoption of the LM algorithm realizing method provided by the invention, the processing speed of the LM algorithm is improved. Not only can the high-precision measurement be satisfied, but also the requirements of high speed and instantaneity can be met. An algorithm module not only can calculate parameters of a linear model but also can calculate parameters of a non-linear model. Meanwhile, the LM algorithm realizing method provided by the invention has the characteristics of low power consumption, miniaturization, high speed and the like, and can be applied to the field of high-precision real-time signal processing.
Description
Technical field
The present invention relates to a kind of LM algorithm implementation method based on FPGA, particularly a kind of FPGA realization technology that is used for the LM algorithm of gaussian curve approximation belongs to technical field of data processing.
Background technology
In the current Measurement and Data Processing process, under the prerequisite of observed reading Normal Distribution, least-squares estimation is that optimum linearity does not have inclined to one side estimation, thereby in data processing, is widely used.And when the function model of measuring is nonlinear model, generally be to utilize Taylor's formula to be similar to nonlinear model to turn to linear model, handle with the least-squares estimation method then.Nonlinear least square method has inclined to one side, and when the needs high precision was found the solution the nonlinear model parameter, computational solution precision was lower, and what have even can be linear not approximate, thereby the practical value as a result of trying to achieve is little.At this moment need study the accurate numerical solution of nonlinear model.
Levenberg-Marquard algorithm (often being called the LM algorithm for short) can calculate PARAMETERS IN THE LINEAR MODEL, can calculate the nonlinear model parameter again, and no matter normal equation is good attitude, morbid state or rank defect, and this algorithm can both be restrained, and result of calculation is reliable.If function model is linear and is good attitude that just this algorithm only needs iteration once can obtain exact solution, iteration can converge to stable solution several times during wan.If function model is a nonlinear model,,, can obtain optimum solution through increasing iterations when initial value departs from true value when far away just the general iteration that only needs can restrain several times.
Yet need repeatedly iteration just because of the LM algorithm, operand is big, and real-time is difficult to guarantee when calculating with multi-purpose computer or DSP etc., comes processing cost very high again with high-performance computer.Though fpga chip on speed with DSP gap slightly, can realize parallel organization.In the FPGA device of up-to-date release, not only be integrated with abundant configurable logic block resource, also comprise a large amount of DSP unit, block RAM and high-speed serial communication unit of using towards computation-intensive.Therefore select programmable logical device to carry out the development trend that digital signal processing is the world today.
Summary of the invention
The objective of the invention is in order to overcome the defective of above-mentioned prior art; Can be when realizing the LM algorithm have not only guaranteed real-time but also can cost too not high; A kind of LM algorithm implementation method based on FPGA has been proposed; This module is all realized by hardware description language, can promote travelling speed and the stability and the data computing efficient of data processing, saves cost of development.
The objective of the invention is to realize through following technical scheme.
A kind of LM algorithm implementation method of the present invention based on FPGA; Its implementation platform is FPGA; The employing hardware description language is realized; Module is input as the externally measured data that adopt the serial data stream mode, and the LM algoritic module comprises following submodule: go here and there and conversion submodule, normalization processing sub, match variograph operator module, Index for Calculation submodule, iteration coefficient calculations A submodule, time-delay A submodule, iteration coefficient calculations B submodule, time-delay B submodule and parallel judgement submodule; At first convert the serial data stream of input to parallel data and send into the normalization processing sub and carry out normalization and handle through string and conversion submodule; Carry out the circulation of LM algorithm iteration afterwards; Also promptly at first get into match variograph operator module and calculate the match variable; Carry out index through the Index for Calculation submodule then and search, and then, utilize the time-delay submodule to realize the time of each parameter arrival functional module synchronously after the iteration coefficient calculations through iteration coefficient calculations submodule calculating iteration coefficient; Through parallel judgement submodule the iteration coefficient is revised, and then revised the match variable.
Above-mentioned a kind of LM algorithm implementation method based on FPGA, its step is following:
1) through string and conversion submodule the outside input serial data circulation of this algoritic module is changed to parallel data stream and sends into the normalization submodule;
2) parallel data that normalization module generates step 1) carries out sending into match variograph operator module after normalization is handled;
3) match variograph operator module is according to step 2) data computation match variable after normalization is handled and the initial value of match variable, and this match variable and match variable initial value sent into the Index for Calculation submodule;
4) the Index for Calculation submodule carries out index to the match variable of step 3) and searches, and the Index for Calculation value is sent into iteration coefficient calculations submodule;
5) iteration coefficient calculations A submodule calculates the Index for Calculation value that step 4) produces, and calculates the iteration parameter of required correction in the iterative process, and each iteration parameter is sent into the time-delay submodule;
6) utilization time-delay A submodule synchronizing step 5) each iteration parameter that produces arrives time of parallel judgement submodule, and result is sent into the parallel submodule of judging;
7) judge that through parallel submodule to revising through each iteration parameter of step 6) processing, draws the match variate-value X under the present case
i
8) to match variate-value X
iFurther the match variable is handled through iteration coefficient calculations B submodule and time-delay B submodule again;
The match variable that 9) will pass through after step 8) is handled is sent into step 3); Calculate match variable initial value; And current match variable and match variable initial value sent into step 4), repeating step 4)～step 9) carries out the LM algorithm iteration up to reaching predefined iterations or algorithm convergence.
Index look-up table in the index search procedure of above-mentioned Index for Calculation submodule adopts the staging treating mode; Confirm the precision of searching of each segment of curve according to the index curve probability density characteristics; Wherein segment of curve is precipitous more; Then this section to search precision high more, this mode has guaranteed that not only the overall precision of look-up table is constant, and has reduced the resource that look-up table takies.
Above-mentioned time-delay submodule adopts shift register to realize; The result of calculation of each iteration parameter is stored in the shift register; After all calculation of parameter finish; Output to the parallel judgement of next functional module submodule simultaneously, avoid, and realize that synchronous each parameter arrives the time of functional module because time delay causes losing of data stream;
Parallel judge that submodule is at first judged iteration parameter and adopt the parallel processing mode then; Judged result to each iteration parameter is implemented the match variable algorithm under three kinds of situation, according to the judged result of iteration parameter is selected the match variate-value X under the output present case
i, the processing time of having practiced thrift algorithm.
Beneficial effect
The present invention proposes a kind of LM algorithm implementation method, improved the processing speed of LM algorithm, this algoritic module is applied to field of measurement such as Fibre Optical Sensor measurement, when satisfying high-acruracy survey, can also reach the demand of high-speed real-time based on FPGA.This algoritic module can calculate PARAMETERS IN THE LINEAR MODEL, can calculate the nonlinear model parameter again, has characteristics such as low-power consumption, miniaturization, high speed simultaneously, can be applicable to the signal Processing field of real-time high-precision, is particularly useful for high-precision gaussian curve approximation.
Description of drawings
Fig. 1 is the overall procedure block diagram based on the LM algorithm implementation method of FPGA;
Fig. 2 is the FB(flow block) of index calculating sub module among the present invention;
Fig. 3 is the parallel theory diagram of judging submodule among the present invention.
Embodiment
Below in conjunction with accompanying drawing and embodiment the present invention is further specified.
A kind of LM algorithm implementation method based on FPGA; It is input as the externally measured data that adopt the serial data stream mode; As shown in Figure 1, the LM algoritic module comprises following submodule: string is also changed submodule, normalization processing sub, match variograph operator module, Index for Calculation submodule, iteration coefficient calculations A submodule, time-delay A submodule, iteration coefficient calculations B submodule, time-delay B submodule and is walked abreast and judge submodule;
At first convert the serial data stream of input to parallel data and send into the normalization processing sub and carry out normalization and handle, carry out the circulation of LM algorithm iteration afterwards through string and conversion submodule;
In the circulation of LM algorithm iteration; At first get into match variograph operator module and calculate the match variable; Carry out index through the Index for Calculation submodule then and search, and then, utilize the time-delay submodule to realize the time of each parameter arrival functional module synchronously after the iteration coefficient calculations through iteration coefficient calculations submodule calculating iteration coefficient; Through parallel judgement submodule the iteration coefficient is revised, and then revised the match variable.
Above-mentioned a kind of LM algorithm implementation method based on FPGA, its algorithm steps is following:
1) through string and conversion submodule the outside input serial data circulation of this algoritic module is changed to parallel data stream and sends into the normalization submodule;
2) parallel data that normalization module generates step 1) carries out sending into match variograph operator module after normalization is handled;
3) match variograph operator module is according to step 2) data computation match variable after normalization is handled and the initial value of match variable, and this match variable and match variable initial value sent into the Index for Calculation submodule;
4) the Index for Calculation submodule carries out index to the match variable of step 3) and searches, and the Index for Calculation value is sent into iteration coefficient calculations submodule;
5) iteration coefficient calculations A submodule calculates the Index for Calculation value that step 4) produces, and calculates the iteration parameter of required correction in the iterative process, and each iteration parameter is sent into the time-delay submodule;
6) utilization time-delay A submodule synchronizing step 5) each iteration parameter that produces arrives time of parallel judgement submodule, and result is sent into the parallel submodule of judging;
7) judge that through parallel submodule to revising through each iteration parameter of step 6) processing, draws the match variate-value X under the present case
i
8) to match variate-value X
iFurther the match variable is handled through iteration coefficient calculations B submodule and time-delay B submodule again;
The match variable that 9) will pass through after step 8) is handled is sent into step 3); Calculate match variable initial value; And current match variable and match variable initial value sent into step 4), repeating step 4)～step 9) carries out the LM algorithm iteration up to reaching predefined iterations or algorithm convergence.
Index look-up table in the index search procedure of above-mentioned Index for Calculation submodule adopts the staging treating mode; Confirm the precision of searching of each segment of curve according to the index curve probability density characteristics; Wherein precipitous more then this section of segment of curve to search precision high more; This mode has guaranteed that not only the overall precision of look-up table is constant, and has reduced the resource that look-up table takies.
Above-mentioned time-delay submodule adopts shift register to realize; Each CALCULATION OF PARAMETERS result is stored in the shift register; After all calculation of parameter finish; Output to next functional module simultaneously, avoid, and realize the time of each parameter arrival functional module synchronously because time delay causes losing of data stream;
Parallel judge that submodule is at first judged iteration parameter and adopt the parallel processing mode then, calculates three match variable algorithms, according to the judged result of iteration parameter is selected to export the match variate-value X under the present case
i, the processing time of having practiced thrift algorithm.
Embodiment
Above-mentioned a kind of LM algorithm implementation method based on FPGA is handled the serial data stream of this module input, and string and conversion submodule convert the serial data stream of input into parallel N data output Y
1, Y
2... Y
N, the normalization submodule carries out normalization to all data and handles output, at first searches N data maximal value Y wherein
Max, through being output as (Y after the normalization module
1/ Y
Max), (Y
2/ Y
Max) ..., (Y
Max/ Y
Max) ..., (Y
N/ Y
Max);
After obtaining normalization data, get into the circulation of LM algorithm iteration, variable X=(A, B C), obtain match variable initial value X at first in match variograph operator module, to calculate match
0, then with match variable X and initial value X
0Send into the Index for Calculation submodule;
The internal process structure of Index for Calculation submodule is as shown in Figure 2; Comprise exponential depth calculating sub module, positive number look-up table, negative look-up table and index output sub-module; The index look-up table adopts the staging treating mode; According to the index curve probability density characteristics, the curve flat sections search the precision of searching that precision is lower than the curve abrupt segment, have positive negative situation to the power of index; Whole locating function is accomplished through two look-up tables of positive number sum of powers negative power, and the Index for Calculation submodule is realized through following steps:
41) it is negative for just perhaps to calculate the power value through the exponential depth calculating sub module;
42) according to the positive negative signal of Index for Calculation submodule, select positive number look-up table or negative look-up table, carry out index and search;
43) the Index for Calculation value after output is searched through the index output sub-module;
The Index for Calculation value of Index for Calculation submodule output is input to iteration parameter and calculates the A submodule; Be used for calculating the parameter of required correction in the iterative process; Comprising damping factor; Mainly comprise Jacobi matrix etc., this module matrix inversion, matrix and column vector partial content such as multiply each other, each iteration parameter that is calculated utilizes time-delay A submodule to realize that each parameter arrives the parallel time of judging submodule of next functional module synchronously again;
Judge that by parallel submodule carries out the judgement of iteration criterion is selected; Parallel judgement submodule theory diagram is as shown in Figure 3; Iteration parameter rat with after calculating is an example, according to the value that gets into the rat that judges submodule three kinds of situation: situation A is arranged, 0＜rat＜0.5 o'clock corresponding match variable algorithm A; Nu=max (nu*10,0.1); Situation B, 0.5＜rat＜1 o'clock corresponding match variable algorithm B, nu=0; Situation C, rat＞1 o'clock corresponding match variable algorithm C, the value of nu does not change, and the match variate-value X that judges output is through output sub-module output; Parallel judge that submodule is at first judged iteration parameter and adopt the parallel processing mode then, calculate A, B, three match variablees of C algorithm, according to the judged result of iteration parameter is selected the match variate-value X under the output present case
i
With match variate-value X
iAgain through iteration coefficient calculations B submodule and time-delay B submodule; And then correction iteration coefficient; The match variograph operator module that gets among Fig. 1 gets into secondary iterative process, judges whether to carry out next iteration according to iterations, thereby accomplishes the LM algorithm match to the match variable.
The above is preferred embodiment of the present invention, and the present invention should not be confined to the disclosed content of this embodiment and accompanying drawing.Everyly do not break away from the equivalence of accomplishing under the disclosed spirit of the present invention or revise, all fall into the scope of the present invention's protection.
Claims (4)
1. LM algorithm implementation method based on FPGA; Its implementation platform is FPGA; The employing hardware description language is realized; Module is input as the externally measured data that adopt the serial data stream mode; It is characterized in that the LM algoritic module comprises following submodule: string is also changed submodule, normalization processing sub, match variograph operator module, Index for Calculation submodule, iteration coefficient calculations A submodule, time-delay A submodule, iteration coefficient calculations B submodule, time-delay B submodule and is walked abreast and judge submodule;
Said a kind of LM algorithm implementation method based on FPGA, its step is following:
1) through string and conversion submodule the outside input serial data circulation of this algoritic module is changed to parallel data stream and sends into the normalization submodule;
2) parallel data that normalization module generates step 1) carries out sending into match variograph operator module after normalization is handled;
3) match variograph operator module is according to step 2) data computation match variable after normalization is handled and the initial value of match variable, and this match variable and match variable initial value sent into the Index for Calculation submodule;
4) the Index for Calculation submodule carries out index to the match variable of step 3) and searches, and the Index for Calculation value is sent into iteration coefficient calculations submodule;
5) iteration coefficient calculations A submodule calculates the Index for Calculation value that step 4) produces, and calculates the iteration parameter of required correction in the iterative process, and each iteration parameter is sent into the time-delay submodule;
6) utilization time-delay A submodule synchronizing step 5) each iteration parameter that produces arrives time of parallel judgement submodule, and result is sent into the parallel submodule of judging;
7) judge that through parallel submodule to revising through each iteration parameter of step 6) processing, draws the match variate-value X under the present case
i
8) to match variate-value X
iFurther the match variable is handled through iteration coefficient calculations B submodule and time-delay B submodule again;
The match variable that 9) will pass through after step 8) is handled is sent into step 3); Calculate match variable initial value; And current match variable and match variable initial value sent into step 4), repeating step 4)～step 9) carries out the LM algorithm iteration up to reaching predefined iterations or algorithm convergence.
2. a kind of LM algorithm implementation method according to claim 1 based on FPGA; It is characterized in that; Said Index for Calculation submodule comprises exponential depth calculating sub module, positive number look-up table, negative look-up table and index output sub-module; Positive number look-up table and negative look-up table all adopt the staging treating mode, confirm the precision of searching of each segment of curve according to the index curve probability density characteristics, and wherein segment of curve is precipitous more; Then this section to search precision high more, the Index for Calculation submodule is realized through following steps:
41) it is negative for just perhaps to calculate the power value through the exponential depth calculating sub module;
42) according to the positive negative signal of Index for Calculation submodule, select positive number look-up table or negative look-up table, carry out index and search;
43) the Index for Calculation value after output is searched through the index output sub-module.
3. a kind of LM algorithm implementation method according to claim 1 based on FPGA; It is characterized in that; Said time-delay submodule adopts shift register to realize; The result of calculation of each iteration parameter is stored in the shift register, after all calculation of parameter finish, outputs to the parallel judgement of next functional module submodule simultaneously.
4. a kind of LM algorithm implementation method according to claim 1 based on FPGA; It is characterized in that; Said parallel judgement submodule is at first judged iteration parameter and is adopted the parallel processing mode then; Judged result to each iteration parameter is implemented the match variable algorithm under three kinds of situation, according to the judged result of iteration parameter is selected the match variate-value X under the output present case
i
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105095774A (en) * | 2015-06-12 | 2015-11-25 | 北京京东尚科信息技术有限公司 | Data encryption method and system |
| CN106198433A (en) * | 2016-06-27 | 2016-12-07 | 中国科学院合肥物质科学研究院 | Infrared spectrum method for qualitative analysis based on LM GA algorithm |
| CN106500671A (en) * | 2016-09-22 | 2017-03-15 | 天津大学 | A kind of based on LM algorithms decompose laser radar waveform determine sea water advanced method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1930573A (en) * | 2004-03-16 | 2007-03-14 | 贝克休斯公司 | Method and apparatus for chemometric estimations of fluid density, viscosity, dielectric constant, and resistivity from mechanical resonator data |
| CN101634544A (en) * | 2009-09-02 | 2010-01-27 | 郑州辰维科技有限公司 | Water turbine blade blank profile measuring and machining allowance analyzing method |
| CN101789126A (en) * | 2010-01-26 | 2010-07-28 | 北京航空航天大学 | Three-dimensional human body motion tracking method based on volume pixels |
| KR20100091383A (en) * | 2009-02-10 | 2010-08-19 | 전남대학교산학협력단 | Correction method of radial distortion based on a line-fitting |
-
2012
- 2012-03-28 CN CN201210085501.5A patent/CN102650982B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1930573A (en) * | 2004-03-16 | 2007-03-14 | 贝克休斯公司 | Method and apparatus for chemometric estimations of fluid density, viscosity, dielectric constant, and resistivity from mechanical resonator data |
| KR20100091383A (en) * | 2009-02-10 | 2010-08-19 | 전남대학교산학협력단 | Correction method of radial distortion based on a line-fitting |
| CN101634544A (en) * | 2009-09-02 | 2010-01-27 | 郑州辰维科技有限公司 | Water turbine blade blank profile measuring and machining allowance analyzing method |
| CN101789126A (en) * | 2010-01-26 | 2010-07-28 | 北京航空航天大学 | Three-dimensional human body motion tracking method based on volume pixels |
Non-Patent Citations (1)
| Title |
|---|
| 张欣: "递归神经网络的并行LM算法", 《机械管理开发》 * |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105095774A (en) * | 2015-06-12 | 2015-11-25 | 北京京东尚科信息技术有限公司 | Data encryption method and system |
| CN105095774B (en) * | 2015-06-12 | 2018-03-23 | 北京京东尚科信息技术有限公司 | Data ciphering method and system |
| CN106198433A (en) * | 2016-06-27 | 2016-12-07 | 中国科学院合肥物质科学研究院 | Infrared spectrum method for qualitative analysis based on LM GA algorithm |
| CN106198433B (en) * | 2016-06-27 | 2019-04-12 | 中国科学院合肥物质科学研究院 | Infrared spectroscopy method for qualitative analysis based on LM-GA algorithm |
| CN106500671A (en) * | 2016-09-22 | 2017-03-15 | 天津大学 | A kind of based on LM algorithms decompose laser radar waveform determine sea water advanced method |
| CN106500671B (en) * | 2016-09-22 | 2020-04-07 | 天津大学 | Method for determining sea water depth by decomposing laser radar waveform based on LM algorithm |
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