CN102629572B - Thin film transistor liquid crystal display array substrate and manufacturing method thereof - Google Patents
Thin film transistor liquid crystal display array substrate and manufacturing method thereof Download PDFInfo
- Publication number
- CN102629572B CN102629572B CN201110189576.3A CN201110189576A CN102629572B CN 102629572 B CN102629572 B CN 102629572B CN 201110189576 A CN201110189576 A CN 201110189576A CN 102629572 B CN102629572 B CN 102629572B
- Authority
- CN
- China
- Prior art keywords
- public electrode
- substrate
- thickness
- negative photoresist
- film transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
Disclosed in the invention are a thin film transistor liquid crystal display (TFT-LCD) array substrate and a manufacturing method thereof, thereby improving the performance of the TFT-LCD array substrate. The method comprises: forming gate lines, data lines, a thin film transistor (TFT), a pixel electrode and first common electrodes on a substrate; coating a negative photoresist on a first surface of the substrate equipped with the first common electrodes; exposing the negative photoresist from a second surface opposite to the first surface and carrying out development; depositing a transparent conducting film on the first surface of the substrate after the development; and stripping the exposed negative photoresist and forming second common electrodes on one first common electrode perpendicular to and opposite to the gate lines and on one first common electrode perpendicular to and opposite to the data lines.
Description
Technical field
The present invention relates to LCD Technology field, particularly a kind of thin-film transistor LCD device array substrate and preparation method thereof.
Background technology
In recent years, along with scientific and technical progress, digital to television starts in Stepping into daily life.(Thin Firm Transistor Liquid Crystal Display, TFT-LCD) is little with its volume, low in energy consumption, radiationless for Thin Film Transistor-LCD, and resolution advantages of higher becomes current leading products.
TFT-LCD, mainly by the array base palte of box and color membrane substrates are formed, vacuumizes rear envelope therebetween and fills with liquid crystal material, and like this, TFT-LCD display screen forms hundreds of thousands to pel array up to a million, and each pixel is carried out display graphics by the control of TFT.
Senior super dimension field switch technology (Advanced-Super Dimensional Switching; Be called for short: the longitudinal electric field producing between parallel electric field AD-SDS) producing by pixel electrode in same plane or public electrode edge and pixel electrode and public electrode forms multi-dimensional electric field, make in liquid crystal cell between pixel electrode or public electrode, all aligned liquid-crystal molecules can both produce rotation conversion directly over pixel electrode or public electrode, thereby to have improved planar orientation be liquid crystal operating efficiency and increased light transmission efficiency.Senior super dimension field switch technology can improve TFT-LCD picture quality, has high permeability, wide visual angle, high aperture, low aberration, low-response time, without advantages such as water of compaction ripple (push Mura) ripples, is widely used at present.
In prior art, the array base palte of a kind of TFT-LCD of AD-SDS pattern comprises: glass substrate, and the grid line forming on this glass substrate, data wire, TFT switch, pixel electrode, and public electrode.Wherein, public electrode is positioned at the top layer of array base palte.The multi-dimensional electric field that pixel electrode and public electrode form drives liquid crystal to reverse, and therefore, needs public electrode that consistent voltage is provided on whole substrate.And public electrode voltages is applied by substrate peripheral, can cause so the interior zones of different voltage attenuation of substrate inconsistent, therefore, the square resistance of public electrode is less, and the performance of array base palte is better.At present, by increasing the thickness of public electrode, reduce the square resistance of public electrode.
Public electrode is generally by adopting composition (MASK) technique to form after deposit transparent conductive film on glass substrate, wherein, MASK technique comprises: mask, exposure, development, etching and the technique such as peel off.And transparent conductive film comprises: amorphous tin indium oxide (ITO) or polycrystalline tin indium oxide (ITO).
In forming the technique of amorphous ITO public electrode, for increasing the thickness of public electrode, need the amorphous ito thin film that deposition is thicker.But, when the thickness of amorphous ito thin film of deposition reaches certain thickness, 700 dusts for example, now, the amorphous ITO of the glass substrate edge of array base palte is converted into poly-ITO, like this, and in follow-up etching process, because the etching speed of poly-ITO will be far smaller than the etching speed of amorphous ITO, therefore,, after etching technics completes, at glass substrate edge, have ITO residual, can cause like this pixel bad, affect the performance of TFT-LCD.
Visible, the amorphous ITO public electrode in the array base palte of the TFT-LCD of existing AD-SDS pattern can't be very thick, and the performance of array base palte is not also fine.
Summary of the invention
The embodiment of the present invention provides a kind of thin-film transistor LCD device array substrate and preparation method thereof, in order to improve the performance of array base palte of the TFT-LCD of AD-SDS pattern.
The embodiment of the present invention provides a kind of manufacture method of thin-film transistor LCD device array substrate, comprising:
On the first surface of substrate, form grid line, data wire, thin-film transistor TFT, pixel electrode and the first public electrode;
On the first surface of substrate that has formed the first public electrode, apply negative photoresist;
From relative with described first surface second described negative photoresist of exposure and develop;
Depositing electrically conductive transparent membrane on the first surface of the substrate after development;
Peel off the negative photoresist after exposure, with vertically opposite the first public electrode of described grid line on and with vertically opposite the first public electrode of described data wire on form the second public electrode.
The embodiment of the present invention provides a kind of thin-film transistor LCD device array substrate, comprise: substrate, and the grid line forming on the first surface of substrate, data wire, thin-film transistor TFT, pixel electrode and the first public electrode, also comprise: with vertically opposite the first public electrode of described grid line on and with vertically opposite the first public electrode of data wire on the second public electrode of forming.
In the embodiment of the present invention, in TFT-LCD array base palte, not only comprise the first public electrode, but also be included on the first public electrode vertically opposite with grid line and with vertically opposite the first public electrode of data wire on the second public electrode of forming.Like this, increased in array base palte the thickness of the public electrode vertically opposite with data wire, effectively reduced the square resistance of public electrode, improved the performance of array base palte, thereby further improved the performance of TFT-LCD.
Accompanying drawing explanation
Fig. 1 makes the flow chart of TFT-LCD array base palte in the embodiment of the present invention;
Fig. 2 (a) is for having formed the cross-sectional schematic of the substrate after the first public electrode in the embodiment of the present invention;
Fig. 2 (b) is for having applied the cross-sectional schematic of the substrate of negative photoresist in the embodiment of the present invention;
Fig. 2 (c) is the cross-sectional schematic of the substrate after exposure imaging in the embodiment of the present invention;
Fig. 2 (d) is the cross-sectional schematic of the substrate of depositing electrically conductive transparent membrane in the embodiment of the present invention;
Fig. 2 (e) is for peeling off the cross-sectional schematic of the substrate of negative photoresist in the embodiment of the present invention.
Embodiment
In the embodiment of the present invention, according to existing technique, formed after the array base palte of TFT-LCD of AD-SDS pattern, also in this array base palte with the vertically opposite public electrode of grid line on and with the vertically opposite public electrode of data wire on form again certain thickness public electrode, like this, increased in array base palte the thickness of the public electrode vertically opposite with data wire, effectively reduce the square resistance of public electrode, improved the performance of array base palte.
Referring to Fig. 1, the manufacturing process of the array base palte of the TFT-LCD of AD-SDS pattern comprises:
Step 101: form grid line, data wire, thin-film transistor TFT, pixel electrode and the first public electrode on the first surface of substrate.
Here, substrate is generally glass substrate, can adopt prior art on the first surface of this glass substrate, to form grid line, data wire, thin-film transistor TFT, pixel electrode and the first public electrode.For example: adopt existing 1+4MASK technique to produce TFT-LCD array base palte, or, adopt 1+5MASK technique to produce TFT-LCD and produce TFT-LCD array base palte.Wherein, MASK technique comprises: mask, exposure, development, etching and the technique such as peel off.
Formed the cross-sectional schematic of the substrate after the first public electrode as shown in Fig. 2 (a), having comprised: glass substrate 1, grid line 2, gate insulator 3 (GATE INSULATOR), pixel electrode 4, passivation layer 5 (PASSIVATION LAYER) and the first public electrode 6.Here, the first surface of substrate is the upper surface of glass substrate 1.Certainly, formed and on the substrate after the first public electrode, also comprised data wire and thin-film transistor (not shown).Generally, the thickness of pixel electrode 4 is that 400 Izods are right, and the thickness of the first public electrode 6 is identical or close with the thickness of pixel electrode 4, like this, the thickness of the first public electrode 6 is also that 400 Izods are right, and preferably, the thickness range of the first public electrode 6 is: 300 dust-600 dusts.
Step 102: apply negative photoresist on the first surface of substrate that has formed the first public electrode 6.
Photoresist, according to its chemical reaction mechanism and development principle, can divide negative photoresist and positive photoresist two classes.What wherein, after illumination, form insoluble material is negative photoresist.
Here, apply the cross-sectional schematic of substrate of negative photoresist as shown in Fig. 2 (b), on the first public electrode 6, be coated with negative photoresist 7.
Step 103: from relative with first surface second exposure negative photoresist and develop.
After above-mentioned steps, because grid line and data wire are lighttight metal wire, like this, light is from second incident relative with first surface, with on vertically opposite the first public electrode of grid line and with the negative photoresist on vertically opposite the first public electrode of data wire, be exposed because of not blocking of grid line and data wire, and other local negative photoresists form insoluble material because of after exposing.
Like this, adopt negative photoresist developing liquid developing, after development, can remove unexposed negative photoresist.
Here, the cross-sectional schematic of the substrate after exposure imaging is as shown in Fig. 2 (c).The first surface of substrate is the upper surface of glass substrate 1, and second is the lower surface of glass substrate 1.
Step 104: depositing electrically conductive transparent membrane on the first surface of the substrate after development.
Depositing electrically conductive transparent membrane on the first surface of the substrate after development.The material of transparent conductive film can be amorphous tin indium oxide (ITO) or polycrystalline tin indium oxide (ITO).
The thickness of depositing electrically conductive transparent membrane can be any, and preferably, the thickness of depositing electrically conductive transparent membrane is more than or equal to the thickness of the first public electrode.The cross-sectional schematic of the substrate of depositing electrically conductive transparent membrane is as shown in Fig. 2 (d).On the first surface of substrate, some places have negative photoresist 7, and some places do not have negative photoresist 7, deposited amorphous ITO8 on first surface.
Step 105: peel off the negative photoresist after exposure, with vertically opposite the first public electrode of grid line on and with vertically opposite the first public electrode of data wire on form the second public electrode.
With on vertically opposite the first public electrode of grid line and with vertically opposite the first public electrode of data wire on there is no negative photoresist, and on other positions, there is the negative photoresist after exposure, therefore, peel off after the negative photoresist after exposure, only have on the first public electrode vertically opposite with grid line and retain with the amorphous ITO on vertically opposite the first public electrode of data wire, therefore, with vertically opposite the first public electrode of grid line on and with vertically opposite the first public electrode of data wire on form the second public electrode.
Peel off the cross-sectional schematic of substrate of negative photoresist as shown in Fig. 2 (e).Now, with vertically opposite the first public electrode of data wire on amorphous ITO be the second public electrode 9.Therefore, preferably, the thickness of the second public electrode 9 is more than or equal to the thickness of the first public electrode 6.Because the thickness of the first public electrode 6 is identical or close with the thickness of pixel electrode 4, therefore, the thickness of the second public electrode 9 be greater than or the thickness that equals pixel electrode 4.When the thickness of pixel electrode 4 is 400 dust, the thickness of the second public electrode 9 can be between 400 dust-600 dusts.
In the array base palte of the TFT-LCD of the AD-SDS pattern of making according to said process, with vertically opposite the first public electrode of grid line on and with vertically opposite the first public electrode of data wire on form the second public electrode.Like this, increased in array base palte the public electrode vertically opposite with grid line, and with the thickness of the vertically opposite public electrode of data wire, effectively reduced the square resistance of public electrode, improved the performance of array base palte.
In above-described embodiment, the cross-sectional schematic that Fig. 2 (a)-Fig. 2 (e) is substrate, therefore, the second public electrode shown on figure with vertically opposite the first public electrode of data wire on, but the embodiment of the present invention, according to above-mentioned work manufacturing process, on vertically opposite the first public electrode of grid line, also formed the second public electrode.Specifically all no longer illustrate.
Impact for fear of the amorphous ITO edge region depositing, therefore, in another enforcement of the embodiment of the present invention, before developing, also can adopt box ultraviolet (Cell UV) substrate is made to mask plate from the first surface exposure negative photoresist of substrate, like this, substrate peripheral comprises that the negative photoresist of fringe region is all exposed, like this, while carrying out step 104, amorphous ITO can not affect fringe region.Because Cell UV substrate is for solidifying sealed plastic box to box (Cell) technique, this Cell UV substrate interior zone is light tight because metal covers, and like this, after ultraviolet ray (UV) is irradiated, solidify in sealed plastic box region, completes box operation.Therefore, Cell UV substrate is existing in existing technique, does not need to make in addition again, and the embodiment of the present invention does not need the cost that spends again great number to remove to make mask plate.
In order to make the second public electrode and the first public electrode better be combined crystallization, therefore, in the embodiment of the present invention, can also peel off after the negative photoresist after exposure in step 105, the substrate after peeling off is carried out to annealing in process.Like this, the ITO of front and back deposition can be good in conjunction with crystallization, has further reduced the square resistance of public electrode, has improved the performance of array base palte.
The array base palte of the TFT-LCD making according to above-mentioned technique comprises: substrate, and the grid line forming on the first surface of substrate, data wire, thin-film transistor TFT, pixel electrode and the first public electrode, also comprise: with vertically opposite the first public electrode of grid line on and with vertically opposite the first public electrode of data wire on the second public electrode of forming.
The cross-sectional schematic of the array base palte of this TFT-LCD is as shown in Fig. 2 (e), shown in figure: glass substrate 1, source-drain layer 2, gate insulator 3, pixel electrode 4, passivation layer 5, the first public electrode 6 and the second public electrode 9.
In the array base palte of TFT-LCD, preferably the thickness of the second public electrode is more than or equal to the thickness of the first public electrode.And the thickness of the first public electrode is identical with the thickness of pixel electrode or close.Like this, in the array base palte of TFT-LCD, with the vertically opposite public electrode of grid line, and increase by one times or more with the thickness of the vertically opposite public electrode of data wire, effectively reduced the square resistance of public electrode.
In the array base palte that technique shown in the embodiment of the present invention is produced, public electrode is amorphous ITO public electrode, but the embodiment of the present invention is not limited to this, also can form poly-ITO public electrode.Be in the embodiment of the present invention, the material of the first public electrode comprises: amorphous tin indium oxide (ITO) or polycrystalline tin indium oxide (ITO); The material of the second public electrode comprises: amorphous tin indium oxide (ITO) or polycrystalline tin indium oxide (ITO).
In the embodiment of the present invention, in TFT-LCD array base palte, not only comprise the first public electrode, but also be included in the second public electrode forming on the first public electrode vertically opposite with data wire.Like this, in the array base palte of TFT-LCD, with the vertically opposite public electrode of grid line, and increased with the thickness of the vertically opposite public electrode of data wire, effectively reduce the square resistance of public electrode, improved the performance of array base palte, thereby further improved the performance of TFT-LCD.
And, in the embodiment of the present invention, when increasing public electrode thickness, do not need to append mask plate, like this, can not increase considerably process costs.In addition, adopt annealing process to process, before and after can making, the ITO of deposition can be good in conjunction with crystallization, has further reduced the square resistance of public electrode, has improved the performance of array base palte.
Obviously, those skilled in the art can carry out various changes and modification and not depart from the spirit and scope of the present invention the present invention.Like this, if within of the present invention these are revised and modification belongs to the scope of the claims in the present invention and equivalent technologies thereof, the present invention is also intended to comprise these changes and modification interior.
Claims (9)
1. a manufacture method for thin-film transistor LCD device array substrate, is characterized in that, comprising:
On the first surface of substrate, form grid line, data wire, thin-film transistor TFT, pixel electrode and the first public electrode;
On the first surface of substrate that has formed the first public electrode, apply negative photoresist;
From relative with described first surface second described negative photoresist of exposure and develop;
Depositing electrically conductive transparent membrane on the first surface of the substrate after development;
Peel off the negative photoresist after exposure, with vertically opposite the first public electrode of described grid line on and with vertically opposite the first public electrode of described data wire on form the second public electrode.
2. the method for claim 1, is characterized in that, at second described negative photoresist of exposure from relative with described first surface and before developing, also comprises:
Utilization, exposes to being positioned at the described negative photoresist of described substrate edges from the first surface of described substrate as mask plate to box ultraviolet Cell UV substrate.
3. the method for claim 1, is characterized in that, described in peel off the negative photoresist after exposure after, also comprise:
Substrate is carried out to annealing in process.
4. the method for claim 1, is characterized in that, the thickness of described the second public electrode is more than or equal to the thickness of described the first public electrode.
5. the method for claim 1, is characterized in that, the thickness of described the first public electrode is identical with the thickness of described pixel electrode or close.
6. a thin-film transistor LCD device array substrate, comprise: substrate, and the grid line forming on the first surface of described substrate, data wire, thin-film transistor TFT, pixel electrode and the first public electrode, it is characterized in that, also comprise: with vertically opposite the first public electrode of described grid line on and with vertically opposite the first public electrode of described data wire on the second public electrode of forming.
7. array base palte as claimed in claim 6, is characterized in that, the thickness of described the second public electrode is more than or equal to the thickness of described the first public electrode.
8. array base palte as claimed in claim 6, is characterized in that, the thickness of described the first public electrode is identical with the thickness of described pixel electrode or close.
9. array base palte as claimed in claim 6, is characterized in that, the material of described the first public electrode comprises: amorphous tin indium oxide or polycrystalline tin indium oxide; The material of described the second public electrode comprises: amorphous tin indium oxide or polycrystalline tin indium oxide.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201110189576.3A CN102629572B (en) | 2011-07-07 | 2011-07-07 | Thin film transistor liquid crystal display array substrate and manufacturing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201110189576.3A CN102629572B (en) | 2011-07-07 | 2011-07-07 | Thin film transistor liquid crystal display array substrate and manufacturing method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102629572A CN102629572A (en) | 2012-08-08 |
CN102629572B true CN102629572B (en) | 2014-03-12 |
Family
ID=46587800
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201110189576.3A Active CN102629572B (en) | 2011-07-07 | 2011-07-07 | Thin film transistor liquid crystal display array substrate and manufacturing method thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN102629572B (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103579104A (en) * | 2012-08-02 | 2014-02-12 | 北京京东方光电科技有限公司 | Array substrate, preparation method thereof and display device |
CN110634748B (en) * | 2019-09-04 | 2021-07-06 | Tcl华星光电技术有限公司 | Preparation method of thin film transistor and thin film transistor |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1614742A (en) * | 2003-11-04 | 2005-05-11 | Lg.菲利浦Lcd株式会社 | Thin film transistor substrate with horizontal electric field and its manufacture |
CN1983001A (en) * | 2005-12-14 | 2007-06-20 | Lg.菲利浦Lcd株式会社 | Liquid crystal display device |
CN101308299A (en) * | 2007-05-14 | 2008-11-19 | 乐金显示有限公司 | Liquid crystal display device and fabricating method thereof |
CN101515097A (en) * | 2008-02-19 | 2009-08-26 | 乐金显示有限公司 | Liquid crystal display device |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003287770A (en) * | 2002-03-28 | 2003-10-10 | Nec Lcd Technologies Ltd | Liquid crystal display device |
KR101182557B1 (en) * | 2005-06-24 | 2012-10-02 | 엘지디스플레이 주식회사 | Liquid crystal display device and method for manufacturing thereof |
KR100930363B1 (en) * | 2005-12-28 | 2009-12-08 | 엘지디스플레이 주식회사 | Manufacturing method of array substrate for transverse electric field type liquid crystal display device |
US8125603B2 (en) * | 2007-05-17 | 2012-02-28 | Lg Display Co., Ltd. | In-plane switching mode liquid crystal display device and method for fabricating the same |
-
2011
- 2011-07-07 CN CN201110189576.3A patent/CN102629572B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1614742A (en) * | 2003-11-04 | 2005-05-11 | Lg.菲利浦Lcd株式会社 | Thin film transistor substrate with horizontal electric field and its manufacture |
CN1983001A (en) * | 2005-12-14 | 2007-06-20 | Lg.菲利浦Lcd株式会社 | Liquid crystal display device |
CN101308299A (en) * | 2007-05-14 | 2008-11-19 | 乐金显示有限公司 | Liquid crystal display device and fabricating method thereof |
CN101515097A (en) * | 2008-02-19 | 2009-08-26 | 乐金显示有限公司 | Liquid crystal display device |
Also Published As
Publication number | Publication date |
---|---|
CN102629572A (en) | 2012-08-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102148196B (en) | TFT-LCD (thin film transistor-liquid crystal display) array substrate and manufacturing method therefor | |
CN103928406B (en) | The preparation method of array base palte, array base palte, display device | |
CN103151359B (en) | A kind of display unit, array base palte and preparation method thereof | |
CN105633016A (en) | Manufacturing method of TFT substrate and prepared TFT substrate | |
CN104216183B (en) | A kind of array base palte and preparation method thereof, display device | |
US8895334B2 (en) | Thin film transistor array substrate and method for manufacturing the same and electronic device | |
CN104950541A (en) | BOA-type liquid crystal display panel and manufacturing method thereof | |
US10566458B2 (en) | Array substrate and method for manufacturing the same | |
CN105679714B (en) | Array substrate and preparation method thereof | |
CN103309105B (en) | Array base palte and preparation method thereof, display device | |
KR20140037782A (en) | Array substrate, display panel and method for manufacturing array substrate | |
CN103107133B (en) | Array substrate, manufacturing method thereof and displaying device | |
CN103066017A (en) | Preparing method of array substrate | |
CN103293776A (en) | Array substrate and preparation method and display device thereof | |
CN102789106A (en) | Organic thin film transistor array substrate, preparation method thereof and display device | |
CN103413784B (en) | Array substrate, preparing method thereof and display device | |
CN103022056A (en) | Array substrate, manufacturing method of array substrate, and display device | |
CN103022055A (en) | Array substrate, manufacturing method of array substrate, and display device | |
CN104810321A (en) | Production method of TFT (thin film transistor) array substrate and display device | |
CN104779203A (en) | Array substrate and manufacturing method thereof and display device | |
CN104020621A (en) | Array substrate and preparation method thereof and display device | |
CN102629572B (en) | Thin film transistor liquid crystal display array substrate and manufacturing method thereof | |
CN100501515C (en) | Liquid crystal display device fabricating method | |
CN102854681B (en) | The manufacture method of a kind of array base palte, display device and array base palte | |
CN102629587A (en) | Array substrate and manufacturing method thereof and display device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |