CN102629242A

CN102629242A - Lumped peripheral interface module

Info

Publication number: CN102629242A
Application number: CN2012100917929A
Authority: CN
Inventors: 刘昊; 范磊; 王琢玉
Original assignee: Suzhou Institute Southeast University; Suzhou BeeLinker Technology Co Ltd
Current assignee: Suzhou Institute Southeast University; Suzhou BeeLinker Technology Co Ltd
Priority date: 2012-03-31
Filing date: 2012-03-31
Publication date: 2012-08-08

Abstract

The invention discloses a lumped peripheral interface module, which comprises a central processing unit (CPU), an interface multiplexer, a function selection switch and a contact pin lead foot, wherein the CPU processor is connected with the interface multiplexer through four lines, namely a data line, an interrupt line, a clock line and a power line; the interface multiplexer is connected with the contact pin lead foot arranged outside an interface module through four lines, namely a data line, an interrupt line, a clock line and a power line; the contact pin lead foot is used for being connected with a peripheral interface; and the function selection switch is connected with the interface multiplexer and used for switching interface standards. The lumped peripheral interface module has the advantages that the interface standards can be adjusted according to user requirements, and received data are converted to data satisfying the interface standards to be transmitted out, and the cost increased because the CPU need to support various interface modules can be reduced.

Description

A kind of lump Peripheral Interface module

Technical field

The present invention relates to Computer Interface Technology, be specifically related to a kind of lump Peripheral Interface module.

Background technology

Along with the development of Computer Interface Technology, the kind of the interface that processor need be supported and use is more and more, and this just requires processor to have the hardware supports to multiple kind of class interface.But in actual the use; Not all interface all can be used; And processor has to keeping the functional module of various interface again in order to deal with various situation, so processor inside exists the area waste; Exist the situation of pin waste on the Chip Packaging, these all can influence the cost and the performance of processor.

Summary of the invention

The object of the invention is to provide a kind of lump Peripheral Interface module; It can adjust interface standard according to user's request; Become the data transmission of required interface standard to go out the data-switching that receives, can reduce that processor need be supported the multiple interfaces module and the cost that increases.

In order to solve these problems of the prior art, technical scheme provided by the invention is:

A kind of lump Peripheral Interface module; It comprises CPU processor, interface multiplexer, functional select switch, contact pin pin; The CPU processor links to each other with interface multiplexer through data line, interrupt line, clock line, four groups of lines of power lead, and interface multiplexer is connected at the outer contact pin pin of interface module through data line, interrupt line, clock line, four groups of lines of power lead, and said contact pin pin is used to connect Peripheral Interface; Functional select switch links to each other with interface multiplexer, is used for the switching interface standard.

More detailed technical scheme is: a kind of lump Peripheral Interface module; It comprises CPU processor, interface multiplexer, functional select switch, contact pin pin; The CPU processor links to each other with interface multiplexer through data line, interrupt line, clock line, four groups of lines of power lead; Interface multiplexer is connected at the outer contact pin pin of interface module through data line, interrupt line, clock line, four groups of lines of power lead; Said contact pin pin is used to connect Peripheral Interface, and functional select switch links to each other with interface multiplexer, is used for the switching interface standard.Said interface multiplexer is the FPGA module; Be preset with the multiple interfaces standard in the said FPGA module; Said interface standard can be switched through functional select switch; The standard of said FPGA module can be handled through CPU and reset; Being used for user's later stage adds different interface standards, and said FPGA module comprises receive data register, Date Conversion Unit, transmitting data register and sequential adjustment unit, and the required data of sending of CPU processor are at first sent to receive data register; Date Conversion Unit according to the data in the selected interface standard of the functional select switch conversion receive data register and with the data storage of being changed out in transmitting data register, the data that are stored in the transmitting data register are sent to peripheral hardware through the contact pin pin after through the sequential adjustment unit data sequential being adjusted.

As optimization; Said FPGA module also comprises the interface standard configuration register; The interface standard configuration register links to each other with Date Conversion Unit; Said interface standard configuration register is used for receiving interface standard steering order, and said Date Conversion Unit is according to interface standard steering order switching interface standard and translation data

With respect to scheme of the prior art, advantage of the present invention is:

1. lump Peripheral Interface module described in the invention is through the different demands of default multiple interfaces standard in the interface multiplexer with adaptive user; And interface standard can be switched through the set functional select switch in outside by the user according to user's request; Use very flexible; Because the interface multiplexer among the present invention realizes that through the FPGA module FPGA module is a PLD, when needs add new interface standard, only need and to get final product about the burned FPGA module of the program of new interface standard in addition; Very easy to use, greatly increased the reusability of interface and to the support of following interface;

2. set interface standard configuration register can be accepted long-range interface standard steering order among the present invention, can realize the long-range switching to lump Peripheral Interface module inner joint standard, uses convenient more flexible.

Description of drawings

Below in conjunction with accompanying drawing and embodiment the present invention is further described:

Fig. 1 is the one-piece construction theory diagram of the embodiment of the invention.

Embodiment

Below in conjunction with specific embodiment such scheme is further specified.Should be understood that these embodiment are used to the present invention is described and are not limited to limit scope of the present invention.The implementation condition that adopts among the embodiment can be done further adjustment according to the condition of concrete producer, and not marked implementation condition is generally the condition in the normal experiment.

Embodiment:

The described lump Peripheral Interface of present embodiment module; It comprises CPU processor, interface multiplexer, functional select switch, contact pin pin; The CPU processor links to each other with interface multiplexer through data line, interrupt line, clock line, four groups of lines of power lead; Interface multiplexer is connected at the outer contact pin pin of interface module through data line, interrupt line, clock line, four groups of lines of power lead; Said contact pin pin is used to connect Peripheral Interface, and functional select switch links to each other with interface multiplexer, is used for the switching interface standard.Said interface multiplexer is the FPGA module; Be preset with the multiple interfaces standard in the said FPGA module; Said interface standard can be switched through functional select switch; The standard of said FPGA module can be handled through CPU and reset; Being used for user's later stage adds different interface standards, and said FPGA module comprises receive data register, Date Conversion Unit, transmitting data register and sequential adjustment unit, and the required data of sending of CPU processor are at first sent to receive data register; Date Conversion Unit according to the data in the selected interface standard of the functional select switch conversion receive data register and with the data storage of being changed out in transmitting data register, the data that are stored in the transmitting data register are sent to peripheral hardware through the contact pin pin after through the sequential adjustment unit data sequential being adjusted.

For the ease of long-range switching interface standard; Also be provided with the interface standard configuration register in the said FPGA module; The interface standard configuration register links to each other with Date Conversion Unit; Said interface standard configuration register is used for receiving interface standard steering order, and said Date Conversion Unit is according to interface standard steering order switching interface standard and translation data.

The described lump Peripheral Interface of present embodiment module is through the different demands of default multiple interfaces standard in the interface multiplexer with adaptive user; And interface standard can be switched through the set functional select switch in outside by the user according to user's request; Use very flexible; Owing to originally penalize the interface multiplexer that hits to realize that through the FPGA module FPGA module is a PLD, when needs add new interface standard, only need and to get final product about the burned FPGA module of the program of new interface standard in addition; Very easy to use, greatly increased the reusability of interface and to the support of following interface;

Set interface standard configuration register can be accepted long-range interface standard steering order in the present embodiment, can realize the long-range switching to lump Peripheral Interface module inner joint standard, uses convenient more flexible.

Above-mentioned instance only is explanation technical conceive of the present invention and characteristics, and its purpose is to let the people who is familiar with this technology can understand content of the present invention and enforcement according to this, can not limit protection scope of the present invention with this.All equivalent transformations that spirit is done according to the present invention or modification all should be encompassed within protection scope of the present invention.

Claims

1. lump Peripheral Interface module; It is characterized in that; It comprises CPU processor, interface multiplexer, functional select switch, contact pin pin; The CPU processor links to each other with interface multiplexer through data line, interrupt line, clock line, four groups of lines of power lead, and interface multiplexer is connected at the outer contact pin pin of interface module through data line, interrupt line, clock line, four groups of lines of power lead, and said contact pin pin is used to connect Peripheral Interface; Functional select switch links to each other with interface multiplexer, is used for the switching interface standard.

2. a kind of lump Peripheral Interface module according to claim 1 is characterized in that said interface multiplexer is the FPGA module, is preset with the multiple interfaces standard in the said FPGA module, and said interface standard can be switched through functional select switch.

3. a kind of lump Peripheral Interface module according to claim 2 is characterized in that, the standard of said FPGA module can be handled through CPU and reset, and is used for user's later stage to add different interface standards.

4. according to claim 1 or 2 or 3 described a kind of lump Peripheral Interface modules; It is characterized in that; Said FPGA module comprises receive data register, Date Conversion Unit, transmitting data register and sequential adjustment unit; The required data of sending of CPU processor are at first sent to receive data register; Date Conversion Unit according to the data in the selected interface standard of the functional select switch conversion receive data register and with the data storage of being changed out in transmitting data register, the data that are stored in the transmitting data register are sent to peripheral hardware through the contact pin pin after through the sequential adjustment unit data sequential being adjusted.

5. a kind of lump Peripheral Interface module according to claim 4; It is characterized in that; Said FPGA module also comprises the interface standard configuration register; The interface standard configuration register links to each other with Date Conversion Unit, and said interface standard configuration register is used for receiving interface standard steering order, and said Date Conversion Unit is according to interface standard steering order switching interface standard and translation data.