Summary of the invention
Technical matters to be solved by this invention provides a kind of bulged tube openend identification sensor of expansion bolt.
The technical scheme that the present invention solves its technical matters is:
The bulged tube openend identification sensor of expansion bolt; Have or not identification circuit and servo circuit to form by openend identification circuit, bulged tube; Bulged tube has or not identification circuit and servo circuit composition to make the bulged tube openend all towards a direction queuing through openend identification circuit, bulged tube, cooperates vibrating disc and semi-automatic setscrew kludge can realize the full-automatic assembling of setscrew.
Particularly; Described openend identification circuit comprises two branch roads; First route light emitting diode D1, photodiode D2, operational amplifier IC1A, diode D7, diode D5, resistance R 10, photoelectrical coupler U3, FET Q3, solenoid valve L1 constitute; Second route light emitting diode D3, photodiode D4, operational amplifier IC1B, diode D8, diode D9, resistance R 9, photoelectrical coupler U4, FET Q4, solenoid valve L2 constitute; Bulged tube have and do not have identification and control circuit constitute by light emitting diode D13, photodiode D14, operational amplifier IC1C, delay chip IC3, resistance R 28, photoelectrical coupler U1, triode Q1, relay K 1, control chip IC4, resistance R 11, operational amplifier IC1D, delay chip IC2, diode D18, photoelectrical coupler U2, resistance R 30, triode Q2, relay K 2; The 1 pin ground connection of control chip IC4; Be connected with resistance R 29 between 1 pin of IC4 and 6 pin; 4 pin of IC4 and 8 pin short circuits; Between 2 pin of IC4 and 4 pin, be connected with resistance R 26, tell three parallel branches from 3 pin of IC4, first parallel branch connects after resistance R 11 forward series connection light emitting diode D1 and D3 ground connection more earlier; Second parallel branch elder generation forward connects behind the light emitting diode D11 ground connection behind the resistance in series R18 again, and the 3rd parallel branch be reverse earlier to connect behind the light emitting diode D12 4 pin that meet IC4 behind the resistance in series R17 again; Tell many parallel branches from 4 pin and 8 pin from IC4, first parallel branch is earlier reverse to connect behind the photodiode D2 ground connection behind the resistance in series R1 again, and second parallel branch is reverse earlier to connect behind the photodiode D4 ground connection behind the resistance in series R2 again, and the 3rd parallel branch connects and has tapped resistance R 3 back ground connection; The 4th parallel branch connects and has tapped resistance R 4 back ground connection, and the 5th parallel branch connects the Vs+ pin of IC1A, and the 6th parallel branch connects 4 pin that resistance R 12 meets photoelectrical coupler U3 more earlier, connects the D utmost point of FET Q3 behind the 7th parallel branch series electrical magnet valve L1; The 8th parallel branch connects earlier resistance R 14 backs and is connecing 4 pin of photoelectrical coupler U4, connects the D utmost point of FET Q4 behind the 9th parallel branch series electrical magnet valve L2, and the tenth parallel branch connects after the resistance R 16 forward earlier again and connects ground connection behind the light emitting diode D13, and the 11 parallelly connected branch road is reverse earlier to connect resistance in series R19 ground connection behind the photodiode D14; The series connection of the 12 parallel branch has tapped resistance R 20 back ground connection, and the 13 parallel branch connects the collector of triode Q1, and the 14 parallel branch connects 4 pin of photoelectrical coupler U2, the positive pole of the positive input termination photodiode D2 of operational amplifier IC1A; The centre tap of the negative input end connecting resistance R3 of operational amplifier IC1A, the Vs-pin ground connection of operational amplifier IC1A connects 1 pin of photoelectrical coupler U3 after the output terminal series diode D5 of operational amplifier IC1A and the resistance R 10, and the positive pole of diode D5 connects the output terminal of operational amplifier IC1A; The 2 pin ground connection of photoelectrical coupler U3 are parallel with capacitor C1 and resistance R 7 between the negative pole of 2 pin of photoelectrical coupler U3 and diode D5, simultaneously, the output terminal of operational amplifier IC1A is reverse earlier to connect diode D6 ground connection behind the resistance in series R5 again; 3 pin of photoelectrical coupler U3 connect the G utmost point of FET Q3, and the S utmost point ground connection of FET Q3 is connected with resistance R 13 between the G of the FET Q3 utmost point and the S utmost point, and the centre tap of resistance R 4 connects the negative input end of operational amplifier IC1B; The positive pole of photodiode D4 connects the positive input terminal of operational amplifier IC1B, connects 1 pin of photoelectrical coupler U4 after the output terminal series diode D9 of operational amplifier IC1B and the resistance R 9, and diode D9 positive pole connects the output terminal of operational amplifier IC1B, the 2 pin ground connection of photoelectrical coupler U4; Between the negative pole of 2 pin of photoelectrical coupler U4 and diode D9, be parallel with capacitor C 2 and resistance R 8, simultaneously, the output terminal of operational amplifier IC1B is reverse earlier to connect diode D10 ground connection behind the resistance in series R6 again, and 3 pin of photoelectrical coupler U4 connect the G utmost point of FET Q4; The S utmost point ground connection of FET Q4 is connected with resistance R 15 between the G of the FET Q4 utmost point and the S utmost point, the positive pole of photodiode D14 connects the positive input terminal of operational amplifier IC1C and IC1D, and the centre tap of resistance R 20 connects the negative input end of operational amplifier IC1C and IC1D; The output terminal of operational amplifier IC1C and IC1D connects 4 pin of delay chip IC3 and IC2 respectively, is connected ground connection behind capacitor C 4 and the C3 behind 4 pin of delay chip IC3 and IC2 and the 8 pin short circuits, 2 pin of delay chip IC3 and IC2 and 6 pin short circuits respectively, between 2 pin of delay chip IC3 and IC2 and 6 pin and 8 pin, is connected with resistance R 33 and resistance R 32 respectively; The equal ground connection of 1 pin of delay chip IC3 and IC2, the output terminal of operational amplifier IC1C is reverse earlier to connect light emitting diode D15 ground connection behind the resistance in series R21 again, and the output terminal of operational amplifier IC1D is reverse earlier to connect light emitting diode D16 ground connection behind the resistance in series R22 again, and the 3 pin elder generation forward of delay chip IC2 connects 1 pin that diode D18 meets photoelectrical coupler U2 again behind the resistance in series R34; The 2 pin ground connection of photoelectrical coupler U2, the negative pole of diode D18 are reverse earlier to connect light emitting diode D17 ground connection behind the resistance in series R23 again, and the negative pole of diode D18 oppositely connects the output terminal that meets operational amplifier IC1A behind the diode D7, and the negative pole of diode D18 oppositely connects the output terminal that meets operational amplifier IC1B behind the diode D8; 3 pin of delay chip IC3 are reverse earlier to connect light emitting diode D19 ground connection behind the resistance in series R24 again, and 3 pin of delay chip IC3 connect 1 pin that meets photoelectrical coupler U1 after the resistance R 28, and the collector of triode Q1 connects 4 pin that meet photoelectrical coupler U1 after the resistance R 25, and the base stage of triode Q1 connects 3 pin of photoelectrical coupler U1; The 2 pin ground connection of photoelectrical coupler U1 are connected with resistance R 27 between 2 pin of photoelectrical coupler U1 and 3 pin, the emitter of triode Q1 is succeeded an end of the coil of electrical equipment K1, the other end ground connection of the coil of relay K 1; The a pair of normally opened contact one end ground connection of relay K 1,2 pin of another termination IC4 connect the base stage of triode Q2 behind the 3 pin resistance in series R30 of photoelectrical coupler U2; The base stage of triode Q2 connects resistance R 31 back ground connection, and the collector of triode Q2 connects 4 pin and 8 pin of IC4, and the emitter of triode Q2 is succeeded an end of the coil of electrical equipment K2; The other end ground connection of the coil of relay K 2,4 pin and 8 pin of a pair of normally opened contact one termination IC4 of relay K 2,6 pin of another termination IC4.
Light emitting diode D1, D3 and D13 are LED optically focused light emitting diode, photodiode D2, D4, D14, are the optically focused reception diode.
The model of contrast chip IC 1A, IC1B, IC1C, IC1D is LM324.
The model of delay chip IC2, IC3, control chip IC4 is NE555.
Light emitting diode D6, D10, D12, D16, D17, D19, D15, show having and not having of each road signal.
The light that light emitting diode D13 sends, the resistance that is received behind the light by photodiode D14 reception, D14 diminish; The 10 pin voltages of IC1C uprise, 8 pin of IC1C 2 pin that change to positive potential, IC3 can not get voltage to 3 pin negative potentials, the photoelectrical coupler U1 of 8 pin positive potentials, IC3 and do not work simultaneously; The 2 pin positive potentials of the not conducting of B utmost point negative electricity Q1 of triode Q1, relay K 1 not adhesive, IC4,3 pin negative potentials, D1 and the D3 of IC4 are not luminous; It all is electronegative potential that D2 and D4 can not get 5 pin that light resistance becomes the 3 pin IC1B of big, IC1AD; 7 pin of the 1 pin IC1B of IC1A also all are electronegative potentials; Voltage is not worked so photoelectrical coupler U3 and U4 can not get, Q3 and Q4 are failure to actuate by, solenoid valve L1 and L2 no current, and this is in the identification course of work that does not have under the state of bulged tube
As bulged tube arrive D13 and D14 between the time D13 light that sends be inflated that pipe blocks, D14 can not get light, resistance becomes big, the 10 pin voltage decreases of IC1C, 3 pin positive potentials, U1 conducting, Q1 conducting, relay K 1 adhesive that 8 pin current potentials become negative potential, IC3; The 2 pin negative potentials of IC4,3 pin positive potentials, D1 and D3 is luminous, the 5 pin voltages of 3 pin of the resistance of D2 and D4, IC1A, IC1B uprise, 1 pin of IC1A, the 7 pin positive potentials of IC1B; U3 and U4 obtain voltage power supply, Q3 and Q4 conducting, L1 and L2 and obtain electric current action, when between described D13 and the D14 bulged tube being arranged, the just certain light that sends through LED luminotron D1, D3 between D1 and D2 or D3 and the D4 of openend of bulged tube will arrive photodiode D2 or D4 through the opening of bulged tube, make solenoid valve L1 or L2 action then, the openend that promotes bulged tube is lined up to a direction.
Compared with prior art; The present invention cooperates vibrating disc and full-automatic setscrew kludge can realize the full-automatic assembling of setscrew; Changed the present situation that bulged tube relies on the people to discern; With low cost, efficient is high, simple to operate, the labour intensity that greatly reduces the people, has also reduced production cost of products simultaneously.The present invention has filled up the technological gap of bulged tube openend identification.
Embodiment
The bulged tube openend identification sensor of expansion bolt; Have or not identification circuit and servo circuit to form by openend identification circuit, bulged tube; Bulged tube has or not identification circuit and servo circuit composition to make the bulged tube openend all towards a direction queuing through openend identification circuit, bulged tube, cooperates vibrating disc and semi-automatic setscrew kludge can realize the full-automatic assembling of setscrew.
As shown in the figure; Described openend identification circuit comprises two branch roads; First route light emitting diode D1, photodiode D2, operational amplifier IC1A, diode D7, diode D5, resistance R 10, photoelectrical coupler U3, FET Q3, solenoid valve L1 constitute; Second route light emitting diode D3, photodiode D4, operational amplifier IC1B, diode D8, diode D9, resistance R 9, photoelectrical coupler U4, FET Q4, solenoid valve L2 constitute; Bulged tube have and do not have identification and control circuit constitute by light emitting diode D13, photodiode D14, operational amplifier IC1C, delay chip IC3, resistance R 28, photoelectrical coupler U1, triode Q1, relay K 1, control chip IC4, resistance R 11, operational amplifier IC1D, delay chip IC2, diode D18, photoelectrical coupler U2, resistance R 30, triode Q2, relay K 2; The 1 pin ground connection of control chip IC4; Be connected with resistance R 29 between 1 pin of IC4 and 6 pin; 4 pin of IC4 and 8 pin short circuits; Between 2 pin of IC4 and 4 pin, be connected with resistance R 26, tell three parallel branches from 3 pin of IC4, first parallel branch connects after resistance R 11 forward series connection light emitting diode D1 and D3 ground connection more earlier; Second parallel branch elder generation forward connects behind the light emitting diode D11 ground connection behind the resistance in series R18 again, and the 3rd parallel branch be reverse earlier to connect behind the light emitting diode D12 4 pin that meet IC4 behind the resistance in series R17 again; Tell many parallel branches from 4 pin and 8 pin of IC4, first parallel branch is earlier reverse to connect behind the photodiode D2 ground connection behind the resistance in series R1 again, and second parallel branch is reverse earlier to connect behind the photodiode D4 ground connection behind the resistance in series R2 again, and the 3rd parallel branch connects and has tapped resistance R 3 back ground connection; The 4th parallel branch connects and has tapped resistance R 4 back ground connection, and the 5th parallel branch connects the Vs+ pin of IC1A, and the 6th parallel branch connects 4 pin that resistance R 12 meets photoelectrical coupler U3 more earlier, connects the D utmost point of FET Q3 behind the 7th parallel branch series electrical magnet valve L1; The 8th parallel branch connects earlier resistance R 14 backs and is connecing 4 pin of photoelectrical coupler U4, connects the D utmost point of FET Q4 behind the 9th parallel branch series electrical magnet valve L2, and the tenth parallel branch connects after the resistance R 16 forward earlier again and connects ground connection behind the light emitting diode D13, and the 11 parallelly connected branch road is reverse earlier to connect resistance in series R19 ground connection behind the photodiode D14; The series connection of the 12 parallel branch has tapped resistance R 20 back ground connection, and the 13 parallel branch connects the collector of triode Q1, and the 14 parallel branch connects 4 pin of photoelectrical coupler U2, the positive pole of the positive input termination photodiode D2 of operational amplifier IC1A; The centre tap of the negative input end connecting resistance R3 of operational amplifier IC1A, the Vs-pin ground connection of operational amplifier IC1A connects 1 pin of photoelectrical coupler U3 after the output terminal series diode D5 of operational amplifier IC1A and the resistance R 10, and the positive pole of diode D5 connects the output terminal of operational amplifier IC1A; The 2 pin ground connection of photoelectrical coupler U3 are parallel with capacitor C1 and resistance R 7 between the negative pole of 2 pin of photoelectrical coupler U3 and diode D5, simultaneously, the output terminal of operational amplifier IC1A is reverse earlier to connect diode D6 ground connection behind the resistance in series R5 again; 3 pin of photoelectrical coupler U3 connect the G utmost point of FET Q3, and the S utmost point ground connection of FET Q3 is connected with resistance R 13 between the G of the FET Q3 utmost point and the S utmost point, and the centre tap of resistance R 4 connects the negative input end of operational amplifier IC1B; The positive pole of photodiode D4 connects the positive input terminal of operational amplifier IC1B, connects 1 pin of photoelectrical coupler U4 after the output terminal series diode D9 of operational amplifier IC1B and the resistance R 9, and diode D9 positive pole connects the output terminal of operational amplifier IC1B, the 2 pin ground connection of photoelectrical coupler U4; Between the negative pole of 2 pin of photoelectrical coupler U4 and diode D9, be parallel with capacitor C 2 and resistance R 8, simultaneously, the output terminal of operational amplifier IC1B is reverse earlier to connect diode D10 ground connection behind the resistance in series R6 again, and 3 pin of photoelectrical coupler U4 connect the G utmost point of FET Q4; The S utmost point ground connection of FET Q4 is connected with resistance R 15 between the G of the FET Q4 utmost point and the S utmost point, the positive pole of photodiode D14 connects the positive input terminal of operational amplifier IC1C and IC1D, and the centre tap of resistance R 20 connects the negative input end of operational amplifier IC1C and IC1D; The output terminal of operational amplifier IC1C and IC1D connects 4 pin of delay chip IC3 and IC2 respectively, is connected ground connection behind capacitor C 4 and the C3 behind 4 pin of delay chip IC3 and IC2 and the 8 pin short circuits, 2 pin of delay chip IC3 and IC2 and 6 pin short circuits respectively, between 2 pin of delay chip IC3 and IC2 and 6 pin and 8 pin, is connected with resistance R 33 and resistance R 32 respectively; The equal ground connection of 1 pin of delay chip IC3 and IC2, the output terminal of operational amplifier IC1C is reverse earlier to connect light emitting diode D15 ground connection behind the resistance in series R21 again, and the output terminal of operational amplifier IC1D is reverse earlier to connect light emitting diode D16 ground connection behind the resistance in series R22 again, and the 3 pin elder generation forward of delay chip IC2 connects 1 pin that diode D18 meets photoelectrical coupler U2 again behind the resistance in series R34; The 2 pin ground connection of photoelectrical coupler U2, the negative pole of diode D18 are reverse earlier to connect light emitting diode D17 ground connection behind the resistance in series R23 again, and the negative pole of diode D18 oppositely connects the output terminal that meets operational amplifier IC1A behind the diode D7, and the negative pole of diode D18 oppositely connects the output terminal that meets operational amplifier IC1B behind the diode D8; 3 pin of delay chip IC3 are reverse earlier to connect light emitting diode D19 ground connection behind the resistance in series R24 again, and 3 pin of delay chip IC3 connect 1 pin that meets photoelectrical coupler U1 after the resistance R 28, and the collector of triode Q1 connects 4 pin that meet photoelectrical coupler U1 after the resistance R 25, and the base stage of triode Q1 connects 3 pin of photoelectrical coupler U1; The 2 pin ground connection of photoelectrical coupler U1 are connected with resistance R 27 between 2 pin of photoelectrical coupler U1 and 3 pin, the emitter of triode Q1 is succeeded an end of the coil of electrical equipment K1, the other end ground connection of the coil of relay K 1; The a pair of normally opened contact one end ground connection of relay K 1,2 pin of another termination IC4 connect the base stage of triode Q2 behind the 3 pin resistance in series R30 of photoelectrical coupler U2; The base stage of triode Q2 connects resistance R 31 back ground connection, and the collector of triode Q2 connects 4 pin and 8 pin of IC4, and the emitter of triode Q2 is succeeded an end of the coil of electrical equipment K2; The other end ground connection of the coil of relay K 2,4 pin and 8 pin of a pair of normally opened contact one termination IC4 of relay K 2,6 pin of another termination IC4.
Described light emitting diode D1, D3 and D13 are LED optically focused light emitting diode, photodiode D2, D4, D14, are the optically focused reception diode.
The model of contrast chip IC 1A, IC1B, IC1C, IC1D is LM324.
The model of delay chip IC2, IC3, control chip IC4 is NE555.