CN102622979B - LCD (Liquid Crystal Display) controller and display control method thereof - Google Patents

LCD (Liquid Crystal Display) controller and display control method thereof Download PDF

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CN102622979B
CN102622979B CN 201210064452 CN201210064452A CN102622979B CN 102622979 B CN102622979 B CN 102622979B CN 201210064452 CN201210064452 CN 201210064452 CN 201210064452 A CN201210064452 A CN 201210064452A CN 102622979 B CN102622979 B CN 102622979B
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module
display
data
lcd
lcd controller
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CN102622979A (en
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任玉洁
卢玉超
刘新宁
王镇
孙亚芳
杨军
时龙兴
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Southeast University
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Southeast University
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Abstract

The invention relates to an LCD (Liquid Crystal Display) controller and a display control method thereof. The LCD controller comprises a slave module, a DMA (Direct Memory Access) channel module, an FIFO (First-In First-Out) buffer, a data format converting module, a 3D (3-Dimensional) processing module, an overly multi-layer overlay module, a DISP (Display) FIFO display cache module and a time sequence module, and supports the functions, such as naked-eye 3D visualization, multi-layer display and automatic restoration. The multi-layer display function is achieved by the LCD controller and isnot subjected to the operation processing of a processor any more, so that the operating speed is increased, and the load of the processor is reduced; the automatic restoration function means that the LCD controller can temporarily stop outputting image data if the condition that bandwidth is insufficient in a short term occurs when the LCD controller plays a high-definition video, and outputs the image data again until the bandwidth is enough, and the image data are sufficient; and as the condition that the bandwidth is insufficient is an occasional and short-term case, the display control method can solve the problems of screen cracking and screen blurring arising from short-term insufficient bandwidth on the basis of not affecting a watching effect.

Description

A kind of lcd controller and display control method thereof
Technical field
The invention belongs to the chip design art field, relate to the lcd controller in the digital integrated circuit SoC chip, be a kind of lcd controller and display control method thereof of supporting the functions such as bore hole 3 D visible, Multi-level display, automatic reparation.
Background technology
Along with integrated in the SoC chip of image display technology, lcd controller has become part indispensable among the SoC on the sheet, and is widely applied in 10 years in the past.Along with developing rapidly of mobile Internet, various abundant multimedia application constantly are integrated in the various portable terminals, and the user wishes to enjoy as much as possible more gorgeous visual effect true to nature.Under this background, the technology such as bore hole 3 D visible, Multi-level display, high definition demonstration are arisen at the historic moment.
Existing lcd controller shows that stereo-picture needs by processor image to be carried out showing after the calculation process again first; And existing lcd controller only possesses the free hand drawing layer function, realize Multi-level display, need to multi-layer image be carried out showing after the computing stack with processor; Above two kinds of technical schemes can take very large processor system resources, no matter be to use ppu or a processor is set in lcd controller, all can take ample resources, are not suitable for day by day complicated SoC chip system.In addition, in current SoC chip system, data bandwidth more and more becomes system bottleneck, and it is very high to the data bandwidth requirement that LCD plays HD video, is easy to occur the bandwidth deficiency when playing HD video, causes LCD the problems such as screen, Hua Ping to occur splitting.
Therefore, also there is defective in above-mentioned prior art, awaits improving and development.
Summary of the invention
The problem to be solved in the present invention is: the display requirements such as the corresponding bore hole 3 D visible of existing lcd controller, Multi-level display, high definition demonstration need to take a large amount of processor system resources, be not suitable for day by day complicated SoC chip system, bandwidth easily occuring not enough, causes LCD the problems such as screen, Hua Ping to occur splitting; And also all can only realize separately the function of bore hole 3 D visible, Multi-level display at present, can not satisfy the demand that 3D shows.
Technical scheme of the present invention is: a kind of lcd controller, and lcd controller is connected with display-memory DDR by the AXI interface, is connected with ppu by the AHB interface, is connected with the external LCD screen by rgb interface, and described external LCD screen is the 3D display screen; Lcd controller comprises SLAVE slave module, the DMA channel module, the FIFO buffer, the Data Transform module, the 3D processing module, OVERLY multiple-layer stacked module, DISP FIFO display buffer module and tfi module, the DMA channel module comprises at least 3 DMA passages, ppu is connected to SLAVE slave module by the output of AHB interface, SLAVE slave module is exported respectively and is connected to the DMA passage, the FIFO buffer, the Data Transform module, the 3D processing module, OVERLY multiple-layer stacked module and tfi module, display-memory DDR connects DMA channel module FIFO buffer successively by the output of AXI bus, the Data Transform module, the 3D processing module, OVERLY multiple-layer stacked module and DISP FIFO display buffer module, tfi module produces the lcd screen time sequence information, and the output of tfi module and DISP FIFO display buffer module is connected to the external LCD screen.
Described external LCD screen is for adopting the bore hole 3D screen of disparity barrier technology or lens pillar technology.
Carrying out bore hole for the 3D film source shows, ppu is by ahb bus collocating LCD controller working method register, after enabling lcd controller, the DMA passage by the AXI bus from display-memory DDR the reading displayed data to the FIFO buffer, process Data Transform module is unified into 24bpp RGB data layout with the RGB data of video data or different-format, through the 3D processing module image interleaving treatment is become bore hole 3D pattern, deliver to OVERLAY multiple-layer stacked module after finishing dealing with, carrying out the COLOR_KEY chroma key processes, the ALPHA_BLENDING transparent processing, after MIX mixes the overlap-add procedure operation, the data that finally show are delivered to DISP FIFO display buffer module, tfi module produces the required clock signal of LCD screen, pixel data signal with the output of DISP FIFO display buffer module is delivered to the lcd screen interface together, be rgb interface, the external LCD screen shows according to clock signal and pixel data, realizes that bore hole 3D shows.
Interweave by image and the 3D film source to be carried out bore hole show, lcd controller reads first the left-eye frame picture material from display-memory DDR, right eye two field picture content among the reading displayed storer DDR again, then sequentially right and left eyes two field picture content being delivered to the 3D processing module successively processes, the 3D processing module comprises 4 hardware subelements: write control module, read control module, left-eye frame impact damper and right eye frame buffer, write control module as the Data Input Interface of 3D processing module, be connected to the Data Transform module, the output of writing control module is connected to left-eye frame impact damper and right eye frame buffer, the output of left-eye frame impact damper and right eye frame buffer is connected to reads control module, read control module as the output interface of 3D processing module, be connected to OVERLAY multiple-layer stacked module; Write control module the raw data of Data Transform module output is put into left-eye frame impact damper and right eye frame buffer by left-right frames successively, write first delegation's left-eye frame image to the left-eye frame impact damper, write again delegation's right eye two field picture to the right eye frame buffer, successively circulation; Left-eye frame impact damper and right eye frame buffer are deposited respectively left eye data and the right eye data of delegation; Read successively read pixel and interweave and get up to deliver to continuously OVERLAY multiple-layer stacked module from left-eye frame impact damper and right eye frame buffer of control module, read first the pixel data of a left-eye frame impact damper, read again the pixel data of a right eye frame buffer, successively circulation.
Image is carried out Overlapping display, ground floor is layer as a setting, the second layer is as video layer, the 3rd layer as menu layer, the 4th layer as hardware mouse layer, set 4 tomographic image desired datas at display-memory DDR, DMA passage in the lcd controller is by AXI bus reading out data from display-memory DDR, after processing output, the 3D processing module superposeed by OVERLY multiple-layer stacked module, be output into a width of cloth composograph, deliver to output display in the DISP FIFO display buffer: OVERLY multiple-layer stacked module is realized by general purpose multipliers, first with synthetic piece image after ground floor image and the stack of second layer image blend, mix with the 3rd tomographic image again and be superimposed as piece image, the last mixing with the 4th tomographic image is superimposed as the image that finally will show, stacking method between whenever two-layer is identical, the pixel data of getting the ground floor image multiply by coefficient a, the pixel of second layer image multiply by coefficient b, wherein a and b sum are 1, the value of a and b is obtained by configuration SLAVE slave module by ppu, at last two results added that multiply each other is obtained final stack pixel.
Lcd controller judges that according to the demonstration data number in the DISP FIFO display buffer current whether bandwidth is not enough, when showing the data number less than setting value, judge that current bandwidth is not enough, start automatic repair function, that is: lcd controller stops the output display data, and pixel clock signal is set to disarmed state, the LCD screen stops displacement and refreshes pixel at this moment, until lcd controller according to the number in the current DISP FIFO display buffer greater than setting value, thereby judge when bandwidth is enough, output display data again again, and pixel clock signal recovered normal, the LCD screen will continue normally to be shifted to refresh pixel this moment.
The invention provides a kind of lcd controller of supporting the functions such as bore hole 3 D visible, Multi-level display, automatic reparation.The present invention has realized these functions in a controller, 1), for bore hole 3 D visible and Multi-level display integrated these function subject matters have:, although prior art can independently realize this two functions, all needs processor to come the computing view data; 2), for the automatic reparation of picture, prior art does not also have relevant solution.Lcd controller of the present invention does not have additionally to increase in the situation of processor, three kinds of functions are concentrated in the controller realize, ppu does not relate to the processing of concrete view data, the action command of responsible Configuration Control Unit only, lcd controller of the present invention is supported the bore hole 3 D visible simultaneously, the Multi-level display function, it or not simple function stack, by the continuous artificial debugging to circuit, realize integrated, and circuit structure is succinct, does not set up extra processor structure, no longer carries out calculation process by ppu, by lcd controller hardware special disposal, both improved arithmetic speed, reduced again processor load.Automatically repair function is by the pixel clock of the real-time control output of the empty full state of monitoring fifo buffer, thereby accomplish automatic reparation, lcd controller is being play HD video, during such as the 1080p HD video, if there is the not enough situation of of short duration bandwidth, lcd controller can temporarily stop output image data, until bandwidth is enough, more again output when view data is sufficient, because the bandwidth deficiency is accidental and of short duration situation, therefore, the method can solve on the basis that does not affect viewing effect bandwidth of short duration cause not split screen, colored screen problem.
Beneficial effect of the present invention is:
A. the 3D processing module that arranges interweaves by the right and left eyes image and realizes bore hole 3 D visible function, satisfies current techniques development trend and user's request;
B. realize Multi-level display by OVERLY multiple-layer stacked module, OVERLY multiple-layer stacked module is realized by general purpose multipliers, does not take processor resource, has reduced processor load, has improved processing speed;
C. the pixel clock of exporting by the real-time control of the empty full state of monitoring fifo buffer, thereby accomplish automatic reparation, although image can repaired pause in theory, but because the time of suspending is very short, differentiate not the out so of short duration time and human eye is basic, therefore the viewing experience for the people is can be not influential, has solved the not enough problem of bandwidth when HD video is play, and has improved system reliability.
Description of drawings
Fig. 1 is the present invention and outside annexation figure.
Fig. 2 is structural drawing of the present invention.
Fig. 3 is that bore hole three-dimensional display function of the present invention is realized schematic diagram.
Fig. 4 is Multi-level display implementation structure figure of the present invention.
Fig. 5 is that the automatic repair function of the present invention is realized schematic diagram.
Fig. 6 is among the present invention, and 3D film source raw data is externally deposited organizational form among the display-memory DDR, and the 3D data layout that interweaves of right and left eyes.
Fig. 7 is the structural representation of 3D processing module of the present invention.
Embodiment
Lcd controller of the present invention comprises with lower interface:
1) AMBA AHB interface: ppu is connected to lcd controller by the AHB interface;
2) AMBA AXI interface: lcd controller is connected among the outside display-memory DDR by the AXI interface.
3) lcd screen rgb interface: lcd controller synthesizes the image that a width of cloth finally shows after view data is processed, and outputs on the external LCD screen by rgb interface to show.
Described external LCD screen is for adopting the bore hole 3D screen of disparity barrier technology or lens pillar technology, H60WVHTM12JDMC model 3D screen such as VSTAR TECHNOLOGY LIMITED company, this 3D screen, need not to wear special eyeglasses can bore hole directly find out stereoeffect.
The annexation of the present invention and outside:
As shown in Figure 1, lcd controller is connected reading displayed data from DDR by the AXI interface with display-memory DDR; Be connected ppu collocating LCD controller, the working method of decision lcd controller with ppu by the AHB interface; Be connected with the external LCD screen by rgb interface.
The inner annexation of the present invention:
As shown in Figure 2, ppu is by after the good lcd controller SLAVE of the AHB interface configuration slave module, and the slave module is connected to other modules, and the configuration control information is provided; The DMA channel module is connected to display-memory DDR by the AXI bus, behind the reading out data, be connected in the fifo buffer, fifo buffer is connected to the Data Transform module, and the Data Transform module is connected to the 3D processing module, and the 3D processing module is connected to OVERLAY multiple-layer stacked module, OVERLAY multiple-layer stacked module is connected to DISP_FIFO display buffer module, tfi module produces the lcd screen time sequence information, in conjunction with DISP_FIFO display buffer module, is connected to together the external LCD screen.
Make lcd controller normal operation of the present invention, according to showing needs, follow following configuration flow:
1) collocating LCD screen attribute register;
2) configuration display-memory DDR, need configure the corresponding figures layer during bore hole stereo display is stereo format, configures each tomographic image form, be the 24bpp rgb format such as ground floor, the second layer is the YUV420 form, and the 3rd layer is the YUV16bpp rgb format, and the 4th layer of hardware mouse layer is the 1bpp form.Processing mode between the arrangement plan layer is as covering demonstration, transparent demonstration etc.
3) register is repaired in configuration automatically, and namely DISP FIFO display buffer module will make automatic repair function effective, and the user need to configure corresponding registers.
4) enable lcd controller, lcd controller automatically reads image data by built-in DMA channel module according to user configuration information and processes rear output display from display-memory DDR.
Technical scheme of the present invention is as follows:
As shown in Figure 2, processor is by ahb bus collocating LCD controller working method register, after enabling lcd controller, built-in DMA channel module by the AXI bus from display-memory DDR the reading displayed data to the FIFO buffer, process Data Transform module is unified into 24bpp RGB data layout with the RGB data of video data or different-format, if film source is bore hole 3D film source, then through bore hole 3D processing module the image interleaving treatment is become bore hole 3D pattern, deliver to OVERLAY multiple-layer stacked module after finishing dealing with, carrying out the COLOR_KEY chroma key processes, the ALPHA_BLENDING transparent processing, MIX mixes the overlap-add procedure operation, these processing are operating as prior art, no longer describe in detail.The output data of OVERLAY multiple-layer stacked module are delivered to DISP FIFO display buffer module, tfi module produces the required clock signal of LCD screen, deliver to together LCD screen interface with the pixel data signal of DISP FIFO display buffer module output, simultaneously, tfi module also is responsible for finishing automatic repair function, can suspend the LCD pixel clock signal until bandwidth continues normal the demonstration when enough when system bandwidth is not enough.
Accompanying drawing 2 is the Organization Chart of lcd controller, mainly contains following part and forms:
SLAVE slave module: ppu is by the SLAVE slave of ahb bus collocating LCD controller, and SLAVE slave output control signal is given other modules.
The DMA channel module: reasonable arrangement four tomographic image FIFO are by the order of bus reading out data; Produce the read data address; By AXI bus interface reading displayed data from DDR.
FIFO buffer module: the data transmission that is used for cushioning different rates.Buffer memory DMA reads the data of lcd controller from bus.
Data Transform module: according to the different images form, with its unified 24bpp rgb format view data that converts to.
The 3D processing module: bore hole 3D raw data is carried out interleaving treatment, and right and left eyes two two field pictures are interweaved is merged into piece image.
OVERLAY multiple-layer stacked module: the view data of difference figure layer is carried out transparent, color key combined treatment, form at last one deck demonstration image and deliver to demonstration FIFO.
DISP FIFO video memory cache module: the final demonstration data that the buffer memory lcd controller has been finished dealing with and shown for lcd screen.
Tfi module: produce corresponding LCD synchronizing signal according to different lcd screen sequential demands, deliver to together lcd screen in conjunction with display data signal and show.
The below describes respectively bore hole 3 D visible of the present invention, Multi-level display, automatically repairs implementation procedure:
1. bore hole 3 D visible
Lcd controller involved in the present invention is supported bore hole 3 D visible function.Bore hole 3 D visible function refers to that the user need not to wear anaglyph spectacles and can experience three-dimensional visual effect by watching lcd screen, and this need to meet the following conditions: film source a.3D; B.3D film source treatment facility; C. support the lcd screen of bore hole 3 D visible, wherein, 3D film source treatment facility is the lcd controller among the present invention.
Implementation method:
Two field picture in the tradition film source is divided into two two field pictures in the 3D film source, be respectively the image that right and left eyes is seen, lcd controller need to be the complete image of a frame with two frame right and left eyes image interleaving treatment among the display-memory DDR.Specific practice is: lcd controller reads first the left-eye frame picture material from display-memory DDR, right eye two field picture content among the reading displayed storer DDR again, then sequentially right and left eyes two field picture content is outputed to successively the processing module of back, i.e. OVERLAY multiple-layer stacked module.Fig. 3 has shown the difference of the front and back image that interweaves.
Processing procedure:
DMA channel module in the lcd controller reads in the 3D raw data in the 3D processing module by the AXI interface from outside display-memory DDR, sees accompanying drawing 1 and accompanying drawing 2.
The 3D raw data is externally deposited organizational form as shown in Figure 6 among the display-memory DDR: the picture frame that white expression left eye is seen, black represents the picture frame that right eye is seen, in storer, an original 3D rendering is put first delegation's left-eye frame view data, put continuously again delegation's right eye frame image data, put continuously again delegation's left-eye frame view data, put continuously again delegation's right eye frame image data, by this rule the original 3D rendering of one frame is stored in the storer.
Play the Method of Data Organization that 3D rendering needs, shown in the synthetic frame of Fig. 6 the right, first pixel is the pixel of left-eye frame, and then second pixel that pixel is the right eye frame, so circulation is deposited, and finally being presented on the screen is the image of right and left eyes pixel interleaving.
The work that the 3D processing module is done is the 3D raw data of depositing among the outside display-memory DDR, shown in Fig. 6 left side, processes changing into the 3D data layout that can interweave at the right and left eyes that screen shows, shown in Fig. 6 the right.
Hardware is realized:
As shown in Figure 7, the 3D processing module mainly contains 4 hardware subelements and forms: write control module, read control module, left-eye frame impact damper, right eye frame buffer.Write the raw data that control module is responsible for reading in and put into left-eye frame impact damper and right eye frame buffer by left-right frames successively, write first delegation's left-eye frame image to the left-eye frame impact damper, write again delegation's right eye two field picture to the right eye frame buffer, circulate successively.Left-eye frame impact damper and right eye frame buffer are deposited respectively left eye data and the right eye data of delegation; Read control module and be responsible for successively from left-eye frame impact damper and right eye frame buffer read pixel and interweave getting up to deliver to continuously screen display, read first the pixel data of a left-eye frame impact damper, read again the pixel data of a right eye frame buffer, successively circulation.As shown in Figure 6.
Annexation:
Such as Fig. 2 and shown in Figure 7: write control module as the Data Input Interface of 3D processing module, be connected to the Data Transform module, be connected to left-eye frame impact damper and right eye frame buffer, the right and left eyes frame buffer is connected to reads control module, read control module as the output interface of 3D processing module, be connected to OVERLAY multiple-layer stacked module.
2. Multi-level display
Lcd controller involved in the present invention is supported 4 tomographic image Overlapping displays, wherein, ground floor as a setting layer, the second layer as video layer, the 3rd layer as menu layer, the 4th layer as hardware mouse layer, the user only need place in the display buffer 4 tomographic image desired datas, after configuring lcd controller, the built-in DMA passage of lcd controller just can be output into a width of cloth composograph after also processing through the OVERLY multiple-layer stacked by AXI bus reading out data from display-memory DDR, delivers to output display in the DISP FIFO display buffer.
There are not the independent functions such as hardware handles Multi-level display in the prior art, can only do these operations with processor, and the present invention has designed special hardware: 3D processing module and OVERLAY multiple-layer stacked module realize the multiple-layer stacked operation, need not processor and participate in, therefore do not take processor system resources, like this, in the present invention, when doing the Multi-level display processing, ppu can be done other things simultaneously, has improved processor efficient.
Originally lcd controller that can only single-layer showing only has a DMA passage, once only read piece image, and lcd controller of the present invention is provided with at least 4 DMA passages, corresponding 4 tomographic images, first corresponding background layer, second corresponding video layer, the 3rd corresponding menu layer, the 4th corresponding mouse layer, adopt the AXI bus interface, can read simultaneously 4 sub-pictures, when reading 4 sub-pictures, 4 sub-pictures are carried out the multiple-layer stacked operation, improvement from an original DMA passage to 4 a DMA passage, the invention solves the reading speed problem, namely within a certain period of time from reading piece image to reading 4 sub-pictures.
Implementation method:
As shown in Figure 4, OVERLAY multiple-layer stacked module is responsible for exporting after each tomographic image mixing overlap-add procedure.With synthetic piece image after ground floor image and the stack of second layer image blend, mix being superimposed as piece image with the 3rd tomographic image first, the last mixing with the 4th tomographic image is superimposed as the image that finally will show again.Stacking method between whenever two-layer is identical, the pixel data of getting the ground floor image multiply by coefficient a, the pixel of second layer image multiply by coefficient b, wherein a and b sum are 1, the value of a and b is obtained by configuration SLAVE slave module by ppu, at last two results added that multiply each other is obtained final stack pixel.
Hardware is realized:
Mixing laminating module shown in the accompanying drawing 4 is realized by general purpose multipliers.
3. automatically repair
When the automatic repair function of lcd controller support involved in the present invention, this function are applied to LCD broadcast HD video, because the flower that the bandwidth deficiency causes shields, splits the phenomenons such as screen.
Implementation method:
Lcd controller judges that according to the demonstration data number in the DISP FIFO display buffer module current whether bandwidth is not enough, when showing the data number less than the value set, judge that current bandwidth is not enough, this moment flower occuring easily shields, splits the phenomenons such as screen, need to enable automatic repair function, lcd controller stops DISP FIFO display buffer module output display data, and the control tfi module, clock signal is set to disarmed state, and lcd screen stops displacement and refreshes pixel at this moment.When lcd controller judges that greater than setting value bandwidth is enough according to the number in the current DISP FIFO display buffer, output display data again again, and pixel clock signal recovered normal, the LCD screen will continue normally to be shifted to refresh pixel this moment.Suspend so that the data channel of lcd screen can discharge overstocked data, in this process, the time of time-out is very short, differentiates not the out so of short duration time and human eye is basic, and therefore the viewing experience for the people is can be not influential.
Fig. 5 has briefly described the whole process of automatic reparation.As shown in the figure: the Clock clock is the work reference clock of hardware, Pixle_Clock is the pixel clock of output, Hori_syn is that line synchronizing signal, the Data_Enable signal of output is the data enable signal of output, the FIFO_Read signal is inner FIFO read signal, and the Almost_Empty signal is that inner FIFO is with spacing wave; Pixle_Clock wherein, Hori_syn, Data_Enable, the FIFO_Read signal comes from tfi module, the Almost_Empty signal comes from DISP FIFO display buffer module, as shown in the figure, when Almost_Empty is effective with the spacing wave pulse (high level), Pixle_Clock output pixel signal can keep high level, stop to export the normal pixel clock signal, simultaneously, the FIFO_Read signal becomes the low level disarmed state, until the Almost_Empty signal is when becoming the low level disarmed state, Pixle_Clock continues normal clock signal, and the FIFO_Read read signal continues normal output read signal high level.

Claims (7)

1. a lcd controller is characterized in that lcd controller passes through the AXI interface and is connected with display-memory DDR, is connected with ppu by the AHB interface, is connected with the external LCD screen by rgb interface, and described external LCD screen is the 3D display screen; Lcd controller comprises SLAVE slave module, the DMA channel module, the FIFO buffer, the Data Transform module, the 3D processing module, OVERLY multiple-layer stacked module, DISP FIFO display buffer module and tfi module, the DMA channel module comprises at least 4 DMA passages, ppu is connected to SLAVE slave module by the output of AHB interface, SLAVE slave module is exported respectively and is connected to the DMA passage, the FIFO buffer, the Data Transform module, the 3D processing module, OVERLY multiple-layer stacked module and tfi module, display-memory DDR connects DMA channel module FIFO buffer successively by the output of AXI bus, the Data Transform module, the 3D processing module, OVERLY multiple-layer stacked module and DISP FIFO display buffer module, tfi module produces the lcd screen time sequence information, the output of tfi module and DISP FIFO display buffer module is connected to the external LCD screen, wherein, the 3D processing module interweaves by the right and left eyes image and realizes the bore hole 3 D visible, OVERLY multiple-layer stacked module realizes by general purpose multipliers, exports after each tomographic image that receives is successively mixed overlap-add procedure; Lcd controller is controlled the clock signal of tfi module output in real time by detecting the empty full state of FIFO buffer.
2. a kind of lcd controller according to claim 1 is characterized in that described external LCD screen is for adopting the bore hole 3D screen of disparity barrier technology or lens pillar technology.
3. the display control method of claim 1 or 2 described a kind of lcd controllers, it is characterized in that carrying out bore hole for the 3D film source shows, ppu is by ahb bus collocating LCD controller working method register, after enabling lcd controller, the DMA passage by the AXI bus from display-memory DDR the reading displayed data to the FIFO buffer, process Data Transform module is unified into 24bpp RGB data layout with the RGB data of video data or different-format, through the 3D processing module image interleaving treatment is become bore hole 3D pattern, deliver to OVERLAY multiple-layer stacked module after finishing dealing with, carrying out the COLOR_KEY chroma key processes, the ALPHA_BLENDING transparent processing, after MIX mixes the overlap-add procedure operation, the data that finally show are delivered to DISP FIFO display buffer module, tfi module produces the required clock signal of LCD screen, pixel data signal with the output of DISP FIFO display buffer module is delivered to the lcd screen interface together, it is rgb interface, the external LCD screen shows according to clock signal and pixel data, realizes that bore hole 3D shows.
4. the display control method of a kind of lcd controller according to claim 3, it is characterized in that interweaving by image and the 3D film source is carried out bore hole show, lcd controller reads first the left-eye frame picture material from display-memory DDR, right eye two field picture content among the reading displayed storer DDR again, then sequentially right and left eyes two field picture content being delivered to the 3D processing module successively processes, the 3D processing module comprises 4 hardware subelements: write control module, read control module, left-eye frame impact damper and right eye frame buffer, write control module as the Data Input Interface of 3D processing module, be connected to the Data Transform module, the output of writing control module is connected to left-eye frame impact damper and right eye frame buffer, the output of left-eye frame impact damper and right eye frame buffer is connected to reads control module, read control module as the output interface of 3D processing module, be connected to OVERLAY multiple-layer stacked module; Write control module the raw data of Data Transform module output is put into left-eye frame impact damper and right eye frame buffer by left-right frames successively, write first delegation's left-eye frame image to the left-eye frame impact damper, write again delegation's right eye two field picture to the right eye frame buffer, successively circulation; Left-eye frame impact damper and right eye frame buffer are deposited respectively left eye data and the right eye data of delegation; Read successively read pixel and interweave and get up to deliver to continuously OVERLAY multiple-layer stacked module from left-eye frame impact damper and right eye frame buffer of control module, read first the pixel data of a left-eye frame impact damper, read again the pixel data of a right eye frame buffer, successively circulation.
5. according to claim 3 or the display control method of 4 described a kind of lcd controllers, it is characterized in that image is carried out Overlapping display, ground floor is layer as a setting, the second layer is as video layer, the 3rd layer as menu layer, the 4th layer as hardware mouse layer, set 4 tomographic image desired datas at display-memory DDR, DMA passage in the lcd controller is by AXI bus reading out data from display-memory DDR, after processing output, the 3D processing module superposeed by OVERLY multiple-layer stacked module, be output into a width of cloth composograph, deliver to output display in the DISP FIFO display buffer: OVERLY multiple-layer stacked module is realized by general purpose multipliers, first with synthetic piece image after ground floor image and the stack of second layer image blend, mix with the 3rd tomographic image again and be superimposed as piece image, the last mixing with the 4th tomographic image is superimposed as the image that finally will show, stacking method between whenever two-layer is identical, the pixel data of getting the ground floor image multiply by coefficient a, the pixel of second layer image multiply by coefficient b, wherein a and b sum are 1, the value of a and b is obtained by configuration SLAVE slave module by ppu, at last two results added that multiply each other is obtained final stack pixel.
6. according to claim 3 or the display control method of 4 described a kind of lcd controllers, it is characterized in that lcd controller judges that according to the demonstration data number in the DISP FIFO display buffer current whether bandwidth is not enough, when showing the data number less than setting value, judge that current bandwidth is not enough, start automatic repair function, that is: lcd controller stops the output display data, and pixel clock signal is set to disarmed state, the LCD screen stops displacement and refreshes pixel at this moment, until lcd controller according to the number in the current DISP FIFO display buffer greater than setting value, thereby judge when bandwidth is enough, output display data again again, and pixel clock signal is recovered normal, and the LCD screen will continue normal displacement and refresh pixel at this moment.
7. the display control method of a kind of lcd controller according to claim 5, it is characterized in that lcd controller judges that according to the demonstration data number in the DISP FIFO display buffer current whether bandwidth is not enough, when showing the data number less than setting value, judge that current bandwidth is not enough, start automatic repair function, that is: lcd controller stops the output display data, and pixel clock signal is set to disarmed state, the LCD screen stops displacement and refreshes pixel at this moment, until lcd controller according to the number in the current DISP FIFO display buffer greater than setting value, thereby judge when bandwidth is enough, output display data again again, and pixel clock signal is recovered normal, and the LCD screen will continue normal displacement and refresh pixel at this moment.
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