CN102608874A - Method for increasing data transmission speed of digital micromirror array by photoetching machine under scanning work mode - Google Patents
Method for increasing data transmission speed of digital micromirror array by photoetching machine under scanning work mode Download PDFInfo
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- CN102608874A CN102608874A CN2012100289648A CN201210028964A CN102608874A CN 102608874 A CN102608874 A CN 102608874A CN 2012100289648 A CN2012100289648 A CN 2012100289648A CN 201210028964 A CN201210028964 A CN 201210028964A CN 102608874 A CN102608874 A CN 102608874A
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Abstract
The invention discloses a method for increasing the data transmission speed of a digital micromirror array by a photoetching machine under a scanning work mode. The method comprises the steps of: converting row data of a picture, that are not processed, by using two rams into data that are consistent with representation format of the digital micromirror array; storing the data in a DDR2, and then storing half of data of the picture in the DDR2 in a ram cache of an FPGA (field programmable gate array) and increasing the data transmission speed of the digital micromirror array by cached high speed data transmission. According to the method, the row data of a picture, that are not processed, are converted by using two rams into the data that are consistent with the representation format of the digital micromirror array, the resource utilization of FPGA is reduced, and the transmission speed of data by cached transmission data is increased, so that the requirement on data transmission speed of the photoetching machine under high capacity is met.
Description
Technical field
The invention belongs to technical field of lithography, be specifically related to a kind of litho machine improves digital micro-mirror array data transmission speed under the scanning work pattern method.
Background technology
Photoetching technique is to be used for the composition that printing has characteristic on substrate surface.Such substrate can comprise be used for producing the semiconductor devices, the substrate of multiple integrated circuit, flat-panel screens (for example LCD), circuit board, biochip, micromechanics electronic chip, photoelectron circuit chip etc.The substrate that often uses is semiconductor crystal wafer or glass substrate.
The digital micro-mirror array is as one of ingredient of litho machine most critical, and its image transmission speed is determining the production capacity height of whole litho machine.
Digital micro-mirror array data bus is four groups 16 a data bus; Wherein, the image of half screen before the corresponding DMD of the data of A, two groups of data buss of B, the image of half screen behind the corresponding digital micro-mirror array of the data of C, two groups of data buss of D; If therefore an auxiliary image data writes among the DDR2 according to normal order; Can't be presented at normally on the digital micro-mirror array, must be with correct being presented on the digital micro-mirror array of ability after the data processing, this patent uses the data of two ram with forward and backward half screen; Write among the DDR2 at the same time; Thereby the data the first half that guarantees to read the digital micro-mirror array is on A, B data bus, and the back is half the at C, D data bus, guarantees the correctness that image shows.
Digital micro-mirror array image transmission speed is as a requisite key technical index in the litho machine system; Raising decisive role to the overall throughput of litho machine; In order to improve the product competitiveness of litho machine, the image transmission speed of digital micro-mirror array must constantly improve.
Summary of the invention
The ram caching process that the present invention provides a kind of FPGA of utilization to carry makes litho machine under the scanning work pattern, realize improving the method for digital micro-mirror array data transmission speed.
The technical scheme that the present invention adopts is:
Litho machine improves the method for digital micro-mirror array data transmission speed under the scanning work pattern, it is characterized in that, may further comprise the steps:
1) pass through PCIE bus transfer view data to FPGA from host computer, the image transmitted data can be provided with the size of bag data, but the data that are provided with must be the integral multiples of a sub-picture data line;
2) the preceding hemistich with data line is stored among the ram1, and later half line data is stored among the ram2, in DDR2, writes fashionablely when the data among the ram, and reading of data from ram1, ram2 is merged into data and writes among the DDR2 simultaneously;
When 3) reading the DDR2 data, utilize the inner ram resource of FPGA, 3 ram pieces are set, 1 fifo; Earlier the data among the DDR2 are write fifo, after fifo writes completely, the data among the DDR2 are write delegation in ram3; Then write the data among the DDR2 among the fifo, after fifo writes completely, the data among the DDR2 are write delegation in ram4; Then write the data among the DDR2 among the fifo again, after fifo writes completely, the data among the DDR2 are write delegation in ram5; Then write the data among the DDR2 among the fifo, after fifo write completely, an auxiliary image data just transmission was accomplished; In ram piece and fifo write data, the data among ram piece and the fifo are read on the digital micro-mirror array according to the order that writes at DDR2.
Described litho machine improves the method for digital micro-mirror array data transmission speed under the scanning work pattern; It is characterized in that the data cached of the data line of the sub-picture among the described ram of writing piece and the fifo is converted into and the consistent data of digital micro-mirror array display format in ram piece and fifo.
Principle of work of the present invention is: the data clock of digital micro-mirror array is inconsistent with the clock of DDR2, if the data among the DDR2 are directly write in the digital micro-mirror array, message transmission rate will receive the restriction of DDR2.Because the data of two width of cloth figure have only the data difference of delegation before and after under the scan mode; If therefore a sub-picture buffer memory is got off; Then the data in the buffer memory are write the digital micro-mirror array, to the digital micro-mirror array, only need from DDR2, write data line in buffer memory at next sub-picture.But because the buffer memory of the FPGA that uses in this patent can only be deposited the half range image, therefore, this patent has been divided into 3 parts and a fifo with ram.Earlier to the fifo write data; Write data in ram again, as long as owing in ram, write data line, but read but will all read; Utilize the access time of ram poor; Data are read in the digital micro-mirror array in ram, the write data in fifo that DDR2 can be once more, thus realized the data in high speed transmission.
Main meaning of the present invention is: the present invention is under the prerequisite that does not influence the photo-etching machine exposal quality; The ram buffering high data transfer rates of utilizing FPGA to carry realizes the rapid data transmission of digital micro-mirror array; Thereby reduced the utilization of resources of FPGA, improved the overall throughput of litho machine.
Description of drawings
Fig. 1 is a reading and writing data sequential chart in the buffering of the present invention.
Fig. 2 is data transmission flow process figure of the present invention.
Embodiment
Like Fig. 1, shown in 2, litho machine improves the method for digital micro-mirror array data transmission speed under the scanning work pattern, it is characterized in that, may further comprise the steps:
1) pass through PCIE bus transfer view data to FPGA from host computer, the image transmitted data can be provided with the size of bag data, but the data that are provided with must be the integral multiples of a sub-picture data line;
2) the preceding hemistich with data line is stored among the ram1, and later half line data is stored among the ram2, in DDR2, writes fashionablely when the data among the ram, and reading of data from ram1, ram2 is merged into data and writes among the DDR2 simultaneously;
When 3) reading the DDR2 data, utilize the inner ram resource of FPGA, 3 ram pieces are set, 1 fifo; Earlier the data among the DDR2 are write fifo, after fifo writes completely, the data among the DDR2 are write delegation in ram3; Then write the data among the DDR2 among the fifo, after fifo writes completely, the data among the DDR2 are write delegation in ram4; Then write the data among the DDR2 among the fifo again, after fifo writes completely, the data among the DDR2 are write delegation in ram5; Then write the data among the DDR2 among the fifo, after fifo write completely, an auxiliary image data just transmission was accomplished; In ram piece and fifo write data, the data among ram piece and the fifo are read on the digital micro-mirror array according to the order that writes at DDR2.
The data cached of data line that writes the sub-picture among ram piece and the fifo is converted into and the consistent data of digital micro-mirror array display format in ram piece and fifo.
Claims (2)
1. a litho machine improves the method for digital micro-mirror array data transmission speed under the scanning work pattern, it is characterized in that, may further comprise the steps:
1) pass through PCIE bus transfer view data to FPGA from host computer, the image transmitted data can be provided with the size of bag data, but the data that are provided with must be the integral multiples of data line in the sub-picture;
2) the preceding hemistich with data line is stored among the ram1, and later half line data is stored among the ram2, in DDR2, writes fashionablely when the data among the ram, and reading of data from ram1, ram2 is merged into data and writes among the DDR2 simultaneously;
When 3) reading the DDR2 data, utilize the inner ram resource of FPGA, 3 ram pieces are set, 1 fifo; Earlier the data among the DDR2 are write fifo, after fifo writes completely, the data among the DDR2 are write delegation in ram3; Then write the data among the DDR2 among the fifo, after fifo writes completely, the data among the DDR2 are write delegation in ram4; Then write the data among the DDR2 among the fifo again, after fifo writes completely, the data among the DDR2 are write delegation in ram5; Then write the data among the DDR2 among the fifo, after fifo write completely, an auxiliary image data just transmission was accomplished; In ram piece and fifo write data, the data among ram piece and the fifo are read on the digital micro-mirror array according to the order that writes at DDR2.
2. under the scanning work pattern, improve the method for digital micro-mirror array data transmission speed according to claims 1 described litho machine; It is characterized in that the data cached of the line data of the sub-picture among the described ram of writing piece and the fifo is converted into and the consistent data of digital micro-mirror array display format in ram piece and fifo.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012100289648A CN102608874A (en) | 2012-02-09 | 2012-02-09 | Method for increasing data transmission speed of digital micromirror array by photoetching machine under scanning work mode |
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| CN2012100289648A CN102608874A (en) | 2012-02-09 | 2012-02-09 | Method for increasing data transmission speed of digital micromirror array by photoetching machine under scanning work mode |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102890427A (en) * | 2012-09-18 | 2013-01-23 | 天津芯硕精密机械有限公司 | Method for preparing skewed data in field programmable gate array (FPGA) of direct-writing type photoetching system |
| CN102890429A (en) * | 2012-09-18 | 2013-01-23 | 天津芯硕精密机械有限公司 | Method for increasing data transmission speed in photoetching system through skew scanning display |
| CN106647181A (en) * | 2016-12-19 | 2017-05-10 | 电子科技大学 | High-speed image exposure method for maskless lithography machine of DMD |
| US10552068B2 (en) | 2015-06-17 | 2020-02-04 | Sanechips Technology Co., Ltd. | Access method and device for random access memories, control chip and storage medium |
| WO2021184741A1 (en) * | 2020-03-19 | 2021-09-23 | 上海御渡半导体科技有限公司 | Apparatus and method for increasing communication rate of ddr controlled by means of pcie |
-
2012
- 2012-02-09 CN CN2012100289648A patent/CN102608874A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102890427A (en) * | 2012-09-18 | 2013-01-23 | 天津芯硕精密机械有限公司 | Method for preparing skewed data in field programmable gate array (FPGA) of direct-writing type photoetching system |
| CN102890429A (en) * | 2012-09-18 | 2013-01-23 | 天津芯硕精密机械有限公司 | Method for increasing data transmission speed in photoetching system through skew scanning display |
| CN102890427B (en) * | 2012-09-18 | 2014-10-01 | 天津津芯微电子科技有限公司 | Method for preparing skewed data in field programmable gate array (FPGA) of direct-writing type photoetching system |
| CN102890429B (en) * | 2012-09-18 | 2015-02-11 | 天津芯硕精密机械有限公司 | Method for increasing data transmission speed in photoetching system through skew scanning display |
| US10552068B2 (en) | 2015-06-17 | 2020-02-04 | Sanechips Technology Co., Ltd. | Access method and device for random access memories, control chip and storage medium |
| CN106647181A (en) * | 2016-12-19 | 2017-05-10 | 电子科技大学 | High-speed image exposure method for maskless lithography machine of DMD |
| CN106647181B (en) * | 2016-12-19 | 2018-03-09 | 电子科技大学 | A kind of high speed image exposure method for DMD maskless photoetching machines |
| WO2021184741A1 (en) * | 2020-03-19 | 2021-09-23 | 上海御渡半导体科技有限公司 | Apparatus and method for increasing communication rate of ddr controlled by means of pcie |
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Application publication date: 20120725 |