CN102594683B - Special network switching method and equipment with synchronous digital hierarchy (SDH) network accurate clock synchronization function - Google Patents

Special network switching method and equipment with synchronous digital hierarchy (SDH) network accurate clock synchronization function Download PDF

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CN102594683B
CN102594683B CN2012100357467A CN201210035746A CN102594683B CN 102594683 B CN102594683 B CN 102594683B CN 2012100357467 A CN2012100357467 A CN 2012100357467A CN 201210035746 A CN201210035746 A CN 201210035746A CN 102594683 B CN102594683 B CN 102594683B
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time
message
chip
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CN102594683A (en
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赵建中
刘更
邢智辉
吴杰
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HEILONGJIANG POWER CO Ltd
JINZHI SCIENCE AND TECHNOLOGY Co Ltd JIANGSU
State Grid Corp of China SGCC
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JINZHI SCIENCE AND TECHNOLOGY Co Ltd JIANGSU
HEILONGJIANG POWER CO Ltd
State Grid Corp of China SGCC
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Abstract

The invention discloses a special network switching method with a synchronous digital hierarchy (SDH) network accurate clock synchronization function. A master clock in a master substation of a power grid transmits a network clock synchronization message consistent with an institute of electrical and electronic engineers (IEEE)-1588 protocol, and the network clock synchronization message is transmitted to each satellite substation through an Ethernet over SDH (EOS) switch. In each satellite substation, an SDH over Ethernet switch converts the network clock synchronization message into a transmission message consistent with an Ethernet protocol, wherein the switch comprises an internal central processing unit (CPU) and a layer-3 network switching chip, and realizes the data exchange of the Ethernet, and the configuration (selection of adoption of an EOS chip) of each data exchange interface of the Ethernet realizes EOS switching. A data interface of the network switching chip is a reduced gigabit media independent interface (RGMII), and an output interface of the EOS chip is a serializer/deserializer (Serees) interface. A field programmable gate array (FPGA) receives data from the RGMII and the Serdes interface to realize the 1-microsecond accurate clock synchronization.

Description

The dedicated network switching method and the equipment that possess the accurate time adjustment function of SDH (Synchronous Digital Hierarchy) SDH network
Technical field
The invention belongs to field of data exchange, relate to the dedicated network switching method and the equipment that possess the accurate time adjustment function of SDH network, the present invention the power system network precise synchronization to the time in be applied.
Background technology
Along with the development of mechanics of communication, and the demand of intelligent grid development, wide area protection grows up gradually, but the problem that wide area protection must solve is exactly real-time Data Transmission and exact time synchronization between each transformer station disperseed.SDH network during data link passage between current most transformer station, for transfer of data such as the scheduler routine transfer of data of electric power system, picture control transmission, operation maintenance managements.Due to distance between each transformer station, distribute wide, so be difficult to again lay in a short time the real-time data channel that is specifically designed to wide area protection, even existing SDH network upgrade is become to possess, the accurate time adjustment function of network also needs to expend time in and huge fund.How on existing SDH network, to realize the synchronous acquisition of the real time data of each transformer station, the key technology that transmission just becomes the wide area protection system.The merge cells of current each transformer station inside, what intelligent terminal and wide area protection device data transmission channel all adopted is the real-time ethernet technology, this technical realization based on Ethernet accurately to the time ripe, but the Ethernet in how standing accurately to the time and SDH network (Synchronous Digital Hierarchy, synchronous digital system network, by multiple connection, circuit transmission and function of exchange combine together, and transmit network by the integrated information of united net management system operation) combine, become realize the wide area protection system accurately to the time one of difficult point.The real time data collection of each transformer station is needed to a data switching equipment to wide area protection equipment; and for realize network accurately to the time; this network switching equipment must possess the auxiliary clocking capability of hardware of IEEE-1588; this function for accurate record to the time " residence time " and the communication delay of message by switch the time to the time calculate in by these times deductions.The switch comparative maturity that possesses at present the auxiliary clocking capability of hardware of IEEE-1588.The conversion equipment (ethernet over SDH is called for short EOS, the ethernet ring network based on SDH) that simultaneously Ethernet data is converted to the SDH data is also more commonly used.Namely Ethernet data is converted to the SDH channel data can realize from the angle of transmission, but the delay brought in this transfer process and delay jitter all do not calculate at all EOS equipment, though calculate simultaneously also be difficult to join network accurately to the time message in.In view of current technology status and actual wide area protection system requirements; the present invention is integrated in EOS in switch; and by FPGA will to the time message time of being transformed into the SDH message from Ethernet record, and pass to CPU, so as network accurately to the time calculate in deduction.
Summary of the invention
The objective of the invention is, proposition possesses dedicated network switching method and the equipment of the accurate time adjustment function of SDH (Synchronous Digital Hierarchy) SDH network, propose one and there is the network interface with SDH, and can realize utilizing on the SDH network IEEE-1588 agreement realize network between transformer station accurately to the time private branch exchange system.This switch possesses the network interface of 24 Gbit, and these interfaces can be realized Ethernet interface, also can realize the interface of SDH.Not only realize the exchange of network data in switch inside, and record transmission delay, processing delay and the Ethernet EOS transfer lag based on SDH of accurate network data.By accurately recording these delays, we can be according to IEEE-1588 agreement (the precision interval clock synchronous protocol standard of network measure and control system), the network between each transformer station that realizes disperseing by the SDH network accurately to the time.To the time precision reach 1us.Thereby meet the demand of wide area protection system to each transformer substation synchronous sampling.
The present invention is achieved through the following technical solutions: the dedicated network switching method that possesses the accurate time adjustment function of SDH (Synchronous Digital Hierarchy) SDH network, master clock in the power transformation main website of electrical network, the network that transmission meets the IEEE-1588 agreement to the time message, then by realizing the switch (transducer) of Ethernet to the SDH network switch, by network to the time message send to each sub-transformer station; In each sub-transformer station, the switch that is Ethernet by the SDH network switch by network to the time message be converted to the transmission message of Ethernet protocol, performing step of the present invention is as follows:
Switch comprises that innernal CPU and three-layer network exchange chip (Broadcom56520) realize the exchanges data of Ethernet, the simultaneously data exchange interface of each Ethernet configuration (selecting whether to adopt the EOS chip) realizes the EOS conversion, and the conversion of EOS is that the Gbit that realizes of the DS33M30 by MAXIMM is to the OC-3/STM-1 data transaction, the data-interface of layer network exchange chip is the RGMII interface (media interface between ethernet mac and PHY, single work, a common high-speed serial signals), the latter is the general programmable serial line interface, differential input and output), the EOS conversion chip is output as the Serdes interface, FPGA is by the data of reception RGMII interface and the data of Serdes interface, judge whether be IEEE-1588 to the time message, and record the reception precise time, calculate the consolidated network message and be input to the time delay of Serdes output from the RGMII interface, and give innernal CPU by data bus interface, CPU records this delay, the method of the employing IEEE-1588 agreement by subsequently sends the follow-up message by network, thereby this time of deduction in calculating subsequently, complete network accurately to the time,
(1) during the exchanges data of Ethernet receive to the time master clock SYNC to the time message after, time of reception stamp tl by switch innernal CPU recorded message, then according to configuration and Interface status, the SYNC message repeating is arrived to each interface, the three-layer network exchange chip is recorded the timestamp t2 of the SYNC message of forwarding from each network interface output simultaneously;
(2) according to interface configuration, part Ethernet message is converted to the OC-3/STM-I interface by the EOS chip while exchanging, FPGA records timestamp t3 and the t4 of message simultaneously by the Serdes interface packets that receives network interface message and EOS simultaneously; Then output on the SDH network;
(3) innernal CPU of switch is recorded by the timestamp that reads exchange chip and record and FPGA time of reception stamp t3 and t4; By calculate (t2-tl)+(t4-t3) as network to the time message SYNC at the residence time of switch inside.Fill in follow-up message subsequently, send on network;
(4) after the FPGA of switch listens to the pdelay message request of other network interface directly be connected with exchange interface at the Serdes interface, the method for writing time is consistent with the SYNC message.
The present invention is integrated into industrial ethernet switch inside by EOS conversion, and can accurately calculate the delay of EOS conversion, thus guaranteed network based on SDH accurately to the time precision.The conventional way relative with the present invention is that EOS equipment is hung over outward outside switch, and switch can't obtain the transfer lag of EOS like this, and this postpones according to the difference of equipment and the difference of scheme, and the degree of shake is also different.Minimum also reaches Microsecond grade.Network accurately to the time calculating in, if can not this delay of Measurement accuracy and record, network accurately to the time calculate in deduction, can not realize lus to the time precision, to the time precision will be divergent state, and can not restrain, to the time precision generally all in the millisecond rank.Millisecond to the time precision can not meet the requirement of the synchronized sampling of wide area protection system.
Realize the described dedicated network switching equipment that possesses the dedicated network switching method of the accurate time adjustment function of SDH (Synchronous Digital Hierarchy) SDH network, comprise innernal CPU, ethernet PHY chip and three-layer network exchange chip (Broadcom56520) are realized the chip of the network data exchange of Ethernet, realize the EOS conversion chip of EOS conversion, the data-interface of network data exchange chip is the RGMII interface, the EOS conversion chip is output as the Serdes interface, FPGA is set by the data of reception RGMII interface and the data of Serdes interface, calculate the consolidated network message and be input to the time delay of Serdes output from the RGMII interface, and give innernal CPU by data bus interface, CPU records this delay, the method of the employing IEEE-1588 agreement by subsequently sends the follow-up message by network, thereby this time of deduction in calculating subsequently, complete network accurately to the time, CPU is connected by pci bus with FPGA, exchange chip, the EOS conversion chip is realized being connected by RGMII interface and exchange chip with the ethernet PHY chip, and the EOS conversion chip is connected with interface circuit by the Serdes interface with the ethernet PHY chip.
Adopt three-layer network exchange chip (Broadcom56520) to realize the exchanges data of maximum 24 Gbit Ethernets, simultaneously each interface can a configuration select whether realize the EOS conversion, and the conversion of EOS is that the Gbit that realizes of the DS33M30 by MAXIMM is to the OC-3/STM-1 data transaction.The interface of exchange chip data is the RGMII interface, the EOS conversion chip is output as the Serdes interface, FPGA is by the data of reception RGMII interface and the data of Serdes interface, judge whether be IEEE-1588 to the time message, and record the reception precise time, calculate the consolidated network message and be input to the time delay of Serdes output from the RGMII interface, and give the switch innernal CPU by data bus interface, CPU records this delay, the follow-up message of IEEE-1588 by subsequently sends by network, thereby this time of deduction in calculating subsequently, complete network accurately to the time.
Beneficial effect of the present invention is: the invention provides and a kind ofly can on the SDH network, realize that each transformer station realizes the private branch exchange system of exact time synchronization, with the demand of the real-time synchronization sampling that meets the wide area protection system.The advantage of this private branch exchange system is exactly can realize just can realizing the precision net time synchronized not needing to transform under the prerequisite of existing SDH network, meets the requirement of the continuous operation of wide area protection system.
The accompanying drawing explanation
Fig. 1 possesses the dedicated network switch of the accurate time adjustment function of SDH network and realizes block diagram.
Embodiment
Below by specific embodiment, the invention will be further described, and following examples are descriptive, is not determinate, can not limit protection scope of the present invention with this.
Enforcement of the present invention comprises the following steps:
(1). switch receive to the time master clock SYNC to the time message after, time of reception stamp tl by the CPU recorded message in switch, then according to configuration and Interface status, the SYNC message repeating is arrived to each interface, exchange chip is recorded the timestamp t2 of the sync message of forwarding from each network interface output simultaneously.
(2). switch, according to configuration, is converted to the OC-3/STM-I interface by part Ethernet message by the EOS chip, and FPGA records timestamp t3 and the t4 of message simultaneously by the Serdes interface packets that receives network interface message and EOS simultaneously.Then output on the SDH network.
(3) CPU of switch records by the timestamp that reads exchange chip and record and FPGA time of reception stamp t3 and t4.By calculate (t2-tl)+(t4-t3) as network to the time message SYNC at the residence time of switch inside.(why adopting exchange chip and the FPGA time separately of recording respectively to be because the time different crystal of the employing of two chips).Fill in follow-up message subsequently, send on network.
(4) after the FPGA of switch listens to the pdelay message request of other network interface directly be connected with exchange interface at the Serdes interface, the method for writing time is consistent with the SYNC message.
(5) maximum feature of the present invention is that EOS conversion is integrated into to industrial ethernet switch inside, and can accurately calculate the delay of EOS conversion, thus guaranteed network based on SDH accurately to the time precision.The conventional way relative with the present invention is that EOS equipment is hung over outward outside switch, and switch can't obtain the transfer lag of EOS like this, and this postpones according to the difference of equipment and the difference of scheme, and the degree of shake is also different.Minimum also reaches delicate level.Network accurately to the time calculating in, if can not this delay of Measurement accuracy and record, network accurately to the time calculate in deduction, can not realize lus to the time precision, to the time precision will be divergent state, and can not restrain, to the time precision generally all in the millisecond rank.Millisecond to the time precision can not meet the requirement of the synchronized sampling of wide area protection system.

Claims (3)

1. the dedicated network switching method that possesses the accurate time adjustment function of SDH (Synchronous Digital Hierarchy) SDH network, it is characterized in that the master clock in the power transformation main website of electrical network, the network that transmission meets the IEEE-1588 agreement to the time message, then by realizing the switch of Ethernet to the SDH network switch, by network to the time message send to each sub-transformer station, in each sub-transformer station, the switch that is Ethernet by the SDH network switch by network to the time message be converted to the transmission message of Ethernet protocol: described switch comprises that innernal CPU and three-layer network exchange chip realize the exchanges data of Ethernet, whether the simultaneously data exchange interface of each Ethernet configuration selects to adopt the Ethernet EOS chip based on SDH to realize the EOS conversion, and the conversion of EOS is that the Gbit that realizes of the DS33M30 by MAXIMM is to the OC-3/STM-1 data transaction, the data-interface of network exchanging chip is the RGMII interface, the EOS conversion chip is output as the Serdes interface, FPGA is by the data of reception RGMII interface and the data of Serdes interface, judge whether be IEEE-1588 to the time message, and record the reception precise time, calculate the consolidated network message and be input to the time delay of Serdes output from the RGMII interface, and give innernal CPU by data bus interface, CPU records this delay, the method of the employing IEEE-1588 agreement by subsequently sends the follow-up message by network, thereby this time of deduction in calculating subsequently, complete network accurately to the time,
(1) during the exchanges data of Ethernet receive to the time master clock SYNC to the time message after, time of reception stamp tl by switch innernal CPU recorded message, then according to configuration and Interface status, the SYNC message repeating is arrived to each interface, the three-layer network exchange chip is recorded the timestamp t2 of the SYNC message of forwarding from each network interface output simultaneously;
(2) during exchanges data according to configuration, part Ethernet message is converted to the OC-3/STM-1 interface by the EOS chip, FPGA records timestamp t3 and the t4 of message simultaneously by the Serdes interface packets that receives network interface message and EOS simultaneously; Then output on the SDH network;
(3) innernal CPU of switch is recorded by the timestamp that reads exchange chip and record and FPGA time of reception stamp t3 and t4; By calculate (t2-tl)+(t4-t3) as network to the time message SYNC at the residence time of switch inside; Fill in follow-up message subsequently, send on network.
2. the dedicated network switching method that possesses the accurate time adjustment function of SDH (Synchronous Digital Hierarchy) SDH network according to claim 1, after the FPGA that it is characterized in that switch listens to the pdelay message request of other network interface directly be connected with exchange interface at the Serdes interface, the method for writing time is consistent with the SYNC message.
3. realize the dedicated network switching equipment that possesses the dedicated network switching method of the accurate time adjustment function of SDH (Synchronous Digital Hierarchy) SDH network claimed in claim 1, it is characterized in that comprising innernal CPU, ethernet PHY chip and three-layer network exchange chip are realized the chip of the network data exchange of Ethernet, realize the EOS conversion chip of EOS conversion, FPGA, the data-interface of network data exchange chip is the RGMII interface, the EOS conversion chip is output as the Serdes interface, FPGA is set by the data of reception RGMII interface and the data of Serdes interface, calculate the consolidated network message and be input to the time delay of Serdes output from the RGMII interface, and give innernal CPU by data bus interface, CPU records this delay, the method of the employing IEEE-1588 agreement by subsequently sends the follow-up message by network, thereby this time of deduction in calculating subsequently, complete network accurately to the time, CPU is connected by pci bus with FPGA, exchange chip, the EOS conversion chip is realized being connected by RGMII interface and exchange chip with the ethernet PHY chip, and the EOS conversion chip is connected with interface circuit by the Serdes interface with the ethernet PHY chip.
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CN103986601B (en) * 2014-05-16 2017-10-10 北京东土科技股份有限公司 A kind of message transmissions time delay acquisition methods and device
CN104378257A (en) * 2014-11-07 2015-02-25 国家电网公司 Implementation system and method for delay informing during intelligent substation process level network switching
CN104660360B (en) * 2015-02-03 2017-05-03 电信科学技术第五研究所 Ethernet data and multi-channel E1 data processing method and system
CN106160226B (en) * 2016-07-28 2022-04-29 全球能源互联网研究院 Method for improving PTP time synchronization precision of intelligent substation
CN107612650B (en) * 2017-08-10 2019-04-09 国家电网公司 Message processing method and system
CN110311746B (en) * 2019-06-19 2020-11-27 北京恒光信息技术股份有限公司 Low-order virtual cascade alignment method and device
CN114070386B (en) * 2022-01-17 2022-04-26 成都国星宇航科技有限公司 Satellite-borne Ethernet communication system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101299749A (en) * 2007-04-30 2008-11-05 华为技术有限公司 Method and apparatus for transferring clock between networks
CN101557258A (en) * 2009-02-27 2009-10-14 工业和信息化部通信计量中心 Method for using synchronous digital hierarchy (SDH) to realize high-accuracy time synchronization, system and time delay measuring device
CN101582733A (en) * 2009-06-18 2009-11-18 中兴通讯股份有限公司 Method and system for realizing high precision time synchronization among SDH equipment

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101299749A (en) * 2007-04-30 2008-11-05 华为技术有限公司 Method and apparatus for transferring clock between networks
CN101557258A (en) * 2009-02-27 2009-10-14 工业和信息化部通信计量中心 Method for using synchronous digital hierarchy (SDH) to realize high-accuracy time synchronization, system and time delay measuring device
CN101582733A (en) * 2009-06-18 2009-11-18 中兴通讯股份有限公司 Method and system for realizing high precision time synchronization among SDH equipment

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