CN102594135A - Boost PFC controller - Google Patents

Boost PFC controller Download PDF

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CN102594135A
CN102594135A CN2012100489894A CN201210048989A CN102594135A CN 102594135 A CN102594135 A CN 102594135A CN 2012100489894 A CN2012100489894 A CN 2012100489894A CN 201210048989 A CN201210048989 A CN 201210048989A CN 102594135 A CN102594135 A CN 102594135A
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CN102594135B (en
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赵晨
姚杰
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Hangzhou Silergy Semiconductor Technology Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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Abstract

According to a boost PFC controller of the present invention, through turning on a signal generation circuit and turning off the signal generation circuit, turn-on and turn-off of a power switch tube are controlled, the PFC controller can control switch frequency of the power switch tube without an internal clock signal, and constant frequency working or variable frequency working can be realized according to an actual need. Design difficulty of an EMI filter is reduced. Further, according to the invention, through an input voltage feedforward circuit, that an output voltage feedback variable is related to input power and is not related to input voltage is realized, and a global electrical network voltage input design requirement is facilitated.

Description

Boost PFC controller
Technical Field
The invention relates to the field of power factor correction, in particular to a boost PFC controller.
Background
In order to reduce harmonic pollution of the power electronics to the grid, Power Factor Correction (PFC) circuits are often added at their input side. At present, an active power factor correction circuit is usually adopted to convert an input current of a power electronic device into a sine wave having the same phase with an input voltage so as to improve the power factor of the power electronic device and reduce harmonic pollution. A Continuous Conduction Mode (CCM) boost PFC circuit is more attractive in high power applications, and a typical CCM boost PFC circuit is described below with reference to fig. 1.
Referring to fig. 1, a diagram of a typical CCM boost PFC circuit is shown, which includes a power stage circuit and a control circuit. The power stage circuit comprises an inductor L and a power switch tube SMDiode D and input capacitor CinAnd an output capacitor CoutIt constitutes a boost circuit topology. The control circuit adopts an average current control mode of a current loop and a voltage loop. The inductive current sampling circuit detects the inductive current and obtains a sampling voltage signal V representing the average value of the inductive current by averagingsenThe sampled voltage signal VsenIs transmitted to the inverting input terminal of an error amplifier W1, and the non-inverting input terminal of an error amplifier W1 receives a reference signal V output by the multiplierrTwo input ends of the multiplier respectively receive an output voltage feedback variable VcAnd a rectified input voltage Vg. The error amplifier W1 samples the received voltage signal VsenAnd a reference signal VrAfter comparison and amplification, an error signal V is generatede. The PWM control circuit converts the error signal VeComparing with a sawtooth wave signal to generate a control power switch tube SMIs turned onAnd a signal for switching off to adjust the waveform of the input current to follow the waveform change of the input voltage, thereby achieving the purpose of power factor correction.
In the PWM control circuit of the conventional CCM boost PFC circuit, an oscillator is required to generate a sawtooth wave signal with a fixed clock frequency, so that the power switch S is providedMThe constant switching frequency is determined by a built-in clock signal; to facilitate EMI testing, a general clock signal generation circuit needs to adopt a frequency jittering design to isolate noise in a wider frequency range.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a novel boost PFC controller, which can control the switching frequency of the power switching tube without an internal clock signal, and can implement constant frequency operation or variable frequency operation according to actual needs.
A boost PFC controller according to an embodiment of the present invention is applied to an ac/dc converter, and includes: the switching-off signal generating circuit, the switching-on signal generating circuit and the logic control circuit are connected; wherein,
the conducting signal generating circuit receives a first sampling signal representing inductive current, compares the first sampling signal with a first reference voltage, continuously drops the first sampling signal within the turn-off time of a power switch tube in the alternating current/direct current converter, and generates a conducting signal when the first sampling signal drops to the first reference voltage;
the turn-off signal generating circuit compares the first sampling signal with a second reference voltage, the first sampling signal continuously rises within the on time of the power switch tube, and when the first sampling signal rises to the second reference voltage, a turn-off signal is generated;
the first reference voltage is a difference value of a first control signal and a second control signal, and the second reference signal is a sum value of the first control signal and the second control signal; the first control signal is controlled by the direct current input voltage and the output voltage feedback variable after rectification by the alternating current/direct current converter; the second control signal is in a direct proportional relation with the product of the duty ratio of the power switch tube and the direct current input voltage, and the proportionality coefficient is a first proportionality coefficient;
the logic control circuit is respectively connected with the conducting signal generating circuit and the turn-off signal generating circuit, and controls the power switch tube to be conducted when the conducting signal is effective; and when the turn-off signal is effective, controlling the power switch tube to be turned off.
Preferably, the first scaling factor is constant, so as to ensure that the switching period of the power switching tube is constant.
Preferably, the first scaling factor is adjustable, so that the switching period of the power switch tube is variable.
Further, an output voltage feedback loop is included, which receives the output voltage of the ac/dc converter to obtain the output voltage feedback variable, and the output voltage feedback variable controls the first control signal, so as to ensure that the output voltage is kept constant.
The device further comprises an inductor current sampling circuit which is used for sampling the current flowing through an inductor in the AC/DC converter and generating the first sampling signal.
Further, a power feed-forward circuit is included that receives the rectified dc input voltage and performs peak detection to generate a peak voltage signal; and after the direct current input voltage is multiplied by the output voltage feedback variable, the ratio of the direct current input voltage to the square of the peak voltage signal is used as the first control signal so as to ensure that the output voltage feedback variable and the input power of the alternating current/direct current converter are in a direct proportion relation.
The power switch further comprises a second control signal generating circuit, wherein the second control signal generating circuit comprises an average value circuit which receives the on signal and the off signal of the first voltage source and the power switch tube respectively to generate the second control signal, and the ratio of the first voltage source to the direct current input voltage is the first proportionality coefficient.
Preferably, the logic control circuit comprises an RS trigger, a reset end of the RS trigger is connected to the on signal generating circuit, a set end of the RS trigger is connected to the off signal generating circuit, and a switch control signal output by an output end of the RS trigger is used to control the switching action of the power switching tube.
According to the boost PFC controller, the power switch tube can work at a fixed frequency or at a jittering frequency through the internal control circuit without a built-in clock signal, so that the design difficulty of an EMI filter is reduced. In addition, the invention realizes that the output voltage feedback variable is related to the input power and unrelated to the input voltage through the input voltage feedforward circuit, thereby being beneficial to the voltage input design requirement of the global power grid.
Drawings
Fig. 1 is a diagram of a conventional CCM boost PFC circuit;
fig. 2 is a schematic block diagram of a first embodiment of a boost PFC controller according to the present invention;
fig. 3 is a schematic block diagram of a second embodiment of a boost PFC controller according to the present invention;
fig. 4 is a waveform diagram illustrating the operation of the PFC controller shown in fig. 3;
fig. 5 is a schematic block diagram of a third embodiment of a boost PFC controller according to the present invention.
Detailed Description
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, but the present invention is not limited to only these embodiments. The invention is intended to cover alternatives, modifications, equivalents, and alternatives that may be included within the spirit and scope of the invention. In the following description of the preferred embodiments of the present invention, specific details are set forth in order to provide a thorough understanding of the present invention, and it will be apparent to those skilled in the art that the present invention may be practiced without these specific details.
The boost PFC controller of the present invention is applied to an ac/dc converter, which further includes a power stage circuit, which is described in the background of the invention, and the components of the power stage circuit in the following embodiments are the same as those in the background of the invention.
Referring to fig. 2, there is shown a schematic block diagram of a first embodiment of a boost PFC controller according to the present invention, the boost PFC controller comprising an on signal generating circuit 201, an off signal generating circuit 202 and a logic control circuit 203; the power switch tube SMComprises a conduction time TONAnd off time TOFF(ii) a Wherein,
the on-signal generating circuit 201 receives a characterization inductor current ILAnd comparing the first sampled signal with a first reference voltage, power switching tube S in the ac/dc converterMThe first sampling signal continuously falls during the turn-off time, and when the first sampling signal falls to the first reference voltage, a turn-ON signal ON is generated;
the turn-off signal generating circuit 202 compares the first sampling signal with a second reference voltage, and the power switch tube S is connected to the first sampling signalMThe first sampling signal continuously rises during the on-time, and when the first sampling signal rises to the second reference voltage, an OFF signal OFF is generated;
wherein the first reference voltageThe difference value of the first control signal and the second control signal is obtained, and the second reference signal is the sum value of the first control signal and the second control signal; the first control signal is a direct current input voltage V rectified by the alternating current/direct current convertergAnd an output voltage feedback variable VcControlling; the second control signal and the power switch tube SMAnd the DC input voltage VgThe product of (A) is in a direct proportional relation, and the proportionality coefficient is a first proportionality coefficient K1
The logic control circuit 203 is respectively connected to the ON signal generating circuit 201 and the off signal generating circuit 202, and controls the power switch tube S when the ON signal is activeMConducting; when the OFF signal is effective, controlling the power switch tube SMAnd (6) turning off.
As can be seen from the above description, the on signal generating circuit is mainly used for controlling the off duration of the power switching tube, the off signal generating circuit is mainly used for controlling the on duration of the power switching tube, and in this process, if the first scaling factor is constant, the switching period of the power switching tube is kept constant; if the first scaling factor is adjustable, the switching period of the power switch tube is changed.
As can be seen from the embodiment shown in fig. 2, with the boost PFC controller according to the present invention, the power switching tube can perform fixed frequency operation or frequency jittering operation without a built-in clock signal through an internal control circuit, thereby reducing the design difficulty of the EMI filter.
Referring to fig. 3, a schematic block diagram of a second embodiment of a boost PFC controller according to the present invention is shown. On the basis of the embodiment shown in fig. 2, this embodiment specifically describes an implementation method of the on-signal generating circuit 201, the off-signal generating circuit 202, and the logic control circuit 203, and further includes an output voltage feedback loop 301, an inductor current sampling circuit 302, and a second control signal generating circuit 303.
The output voltage feedback loop 301 receives the output voltage V of the ac/dc converteroutTo obtain the output voltage feedback variable VcSaid DC input voltage VgAnd an output voltage feedback variable VcPerforming a multiplication operation, the output signal of which is taken as the first control signal Vctr1I.e. Vctr1=VgVc(ii) a The output voltage feedback variable VcControlling the first control signal Vctr1Thereby ensuring the output voltage VoutAnd is maintained constant.
The inductor current sampling circuit 302 is used for sampling the current I flowing through the inductor in the AC/DC converterLAnd generating said first sampling signal Vsen(ii) a In a specific application, the inductor current sampling circuit 302 may average the sampled current signal through a sampling resistor to form a first sampling signal V representing an average value of the inductor currentsen
The second control signal generating circuit 303 comprises an averaging circuit which respectively receives the first voltage source Vs1The on signal and the off signal of the power switch tube are used for generating the second control signal Vctr2Wherein the first voltage source Vs1And the DC input voltage VgIs the first proportionality coefficient K1I.e. Vs1=K1*Vg. In this embodiment, the averaging circuit includes a first switch S connected in series1And a second switch S2And by the first resistance R1And a first capacitor C1The RC filter circuit is formed; wherein,
the first switch S1Receives the first voltage source Vs1Said second switch S2The second terminal of (1) is grounded; the first resistor R1Is connected to the first switch S1And a second switch S2And the other end of the common connection point is connected with the first capacitor C1And after being connected in series, the power is grounded. Wherein, theFirst switch S1And the power switch tube SMIs in the same state, the second switch S2And the power switch tube SMThe switch states of (2) are opposite. The first capacitor C1As said second control signal Vctr2. The first voltage source Vs1Via the first switch S1And a second switch S2After chopping, averaging the chopped wave by an RC filter circuit to obtain the second control signal Vctr2Then the second control signal Vctr2Is determined by the following formula:
V ctr 2 = V s T ON T s = K 1 V g T ON T s - - - ( 1 )
the on-signal generating circuit comprises a comparator 304 having an inverting input receiving the first sampling signal VsenA non-inverting input terminal thereof receiving a first reference voltage Vref1To output the ON signal ON, wherein the first reference voltage Vref1Is said first control signal Vctr1And a second control signal Vctr2A difference of (i.e. V)ref1=Vctr1-Vctr2
The shutdown signal generation circuit includes a comparator 305,the non-inverting input end of which receives the first sampling signal VsenWhose inverting input receives a second reference voltage Vref2To output the OFF signal OFF, wherein the second reference voltage Vref2Is said first control signal Vctr1And a second control signal Vctr2A sum of, i.e. Vref2=Vctr1+Vctr2
The logic control circuit comprises an RS trigger 306, wherein the R end of the reset end of the RS trigger is connected with the conducting signal generating circuit to receive the conducting signal ON, the S end of the reset end of the RS trigger is connected with the turn-OFF signal generating circuit to receive the turn-OFF signal OFF, and the inverted output end of the RS trigger is the inverted output end of the RS trigger
Figure BDA0000139274740000062
Terminal and the power switch tube SMIs connected with the control end, and the output signal of the control end is used for controlling the power switch tube SMThe opening and closing of (2).
The following describes the operation process and operation principle of the PFC controller in detail by combining the functions of the circuits in this embodiment and the operation waveform diagram shown in fig. 4:
as can be seen from fig. 4, when the power switch tube SMIn the off state, the first sampling signal VsenContinuously falling when the first sampling signal VsenDown to the first reference voltage Vref1When the comparator 304 generates the ON signal, the RS flip-flop 308 receives the ON signal and performs a reset operation, which is a logic operationEnd output high level control controls the power switch tube SMConducting;
when the power switch tube SMWhen in the conducting state, the first sampling signal VsenContinuously rising when the first sampling signal VsenUp to the second reference voltage Vref2Then, the comparator 305 outputs the OFF signal OFF.The RS flip-flop 306 receives the OFF signal OFF to perform a set operation, which
Figure BDA0000139274740000064
The end outputs low level to control the power switch tube SMAnd (6) turning off.
Due to the high switching frequency, the difference between the second reference voltage and the first reference voltage is approximately equal to the power switch tube SMWhen the current is conducted, the rising value of the inductance current sampling signal is as follows:
V ref 2 - V ref 1 = V g T ON L R s = 2 V ctr 2 - - - ( 2 )
wherein R issFor the equivalent resistance value of the sampling resistor in the inductive current sampling circuit 302, the power switch tube S is obtained by driving the formula (1) into the formula (2)MOn-off period T ofsThe expression of (a) is:
T s = 2 K 1 L R S - - - ( 3 )
the conclusion can be drawn from equation (3) that the power switch S isMOn-off period T ofsWhen the equivalent resistance values of the main circuit inductor and the sampling resistor are constant values, the equivalent resistance values are only equal to the first proportionality coefficient K1The correlation can be obtained by adjusting the first scaling factor K1The value of (A) is constant or variable, so as to ensure that the switching period of the power switching tube is constant or variable.
The following discusses the process of implementing power factor correction in an embodiment in accordance with the invention: the first sampling signal VsenMay be expressed as an average of the first and second reference voltages, i.e.:
V sen = V ref 1 + V ref 2 2 = V ctrl 1 - - - ( 4 )
the first sampling signal VsenCan also be represented as IL*Rs,ILFor inductive current, Vsen=IL*RsAndVctr1=Vg*Vcthe inductive current I is obtained by the belt-in type (4)LAs shown in the following formula:
I L = V g V c R s - - - ( 5 )
when the boost PFC circuit is in CCM mode, its input impedance ZinIs composed of
Figure BDA0000139274740000075
The substitution of equation (5) can be deduced:
Z in = R s V c - - - ( 6 )
since the output voltage feedback circuit has a slow transient response, the output voltage feedback variable V can be considered as the output voltage feedback variable VcThe input impedance Z is kept constant in a network period, so that the input impedance Z can be obtainedinThe constant is constant, so that the input current and the input voltage have the same waveform and the same phase, and the power factor correction process is completed.
It should be noted that, in the embodiment of the present invention, the implementation forms of the on signal generating circuit, the off signal generating circuit, and the logic control circuit are not limited to the circuit structure diagram shown in fig. 3, and circuit structures capable of implementing corresponding control functions to the power switching tube all fall within the protection scope of the present invention.
The average input power P of the AC/DC converter in the embodiment of FIG. 3 can be obtained from equation (6)inComprises the following steps:
P in = V g 2 Z in = V g 2 V c R s - - - ( 7 )
as can be seen from equation (7), at this time, although the entire PFC control circuit implements the power factor correction function, the output voltage feedback variable VcInput power P to the AC/DC converterinAnd the DC input voltage VgAre all correlated. For feeding back the variable V to the output voltagecOnly with input power PinDepending on the variation, and regardless of the circuit input voltage, a power feed forward circuit may be added to the embodiment shown in fig. 3, which is a schematic block diagram shown in fig. 5.
The boost PFC controller further includes a power feed-forward circuit that receives a rectified DC input voltage VgAnd performing peak detection to generate a peak voltage signal Vgpk(ii) a The DC input voltage VgAnd said output voltage feedback variable VcAfter multiplication, it is multiplied by the peak voltage signal VgpkThe squared ratio is used as the first control signal Vctr1I.e. by
Figure BDA0000139274740000082
From this the following relationship can be derived:
I L = V g V c V gpk 2 R s - - - ( 8 )
the input impedance Z of the boost PFC circuit at this timeinComprises the following steps:
Z in = V g I L = V gpk 2 R s V c - - - ( 9 )
the peak voltage signal V in the formula (9)gpkA constant value under the given power grid voltage condition, and an output voltage feedback variable VcThe input impedance Z is kept constant in a network period, so that the input impedance Z can be obtainedinThe constant is constant, so that the input current and the input voltage have the same waveform and the same phase, and the power factor correction process is completed.
The average input power of the circuit obtained from equation (9) is:
P in = V g 2 Z in = V g 2 V c V gpk 2 R s - - - ( 10 )
in the formula (10) (V)g)2And (V)pk)2Is constant for a given grid voltage condition, so that the input power of the ac/dc converter and the output voltage feedback variable VcIs in a direct proportional relationship, and, as can also be seen from equation (10), the output voltage feedback variable VcOnly with input power PinChange is related toThe input voltage is independent.
In summary, the PFC controller according to the present invention does not need a built-in oscillator to generate a clock signal, and can control the switching frequency of the power switching tube through an internal control circuit, thereby achieving the purpose of power factor correction. When an electromagnetic interference test needs to be performed on the AC/DC converter, the switching frequency of the power switching tube is expected to drift within a small range, so that harmonic interference energy is relatively dispersed, namely, frequency jitter is realized. Compared with the existing switching frequency jitter control technology, the scheme of the invention can adjust the numerical values of the first voltage source and the first current source according to specific conditions, thereby conveniently realizing the jitter frequency, reducing the design difficulty of the input EMI filter and meeting the requirement of the converter on the electromagnetic interference test. In addition, the invention realizes that the output voltage feedback variable is related to the input power and unrelated to the input voltage through the input voltage feedforward circuit, thereby being beneficial to the voltage input design requirement of the global power grid.
While embodiments in accordance with the invention have been described above, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The invention is limited only by the claims and their full scope and equivalents.

Claims (8)

1. A boost PFC controller applied to an AC/DC converter comprises: the switching-off signal generating circuit, the switching-on signal generating circuit and the logic control circuit are connected; wherein,
the conducting signal generating circuit receives a first sampling signal representing inductive current, compares the first sampling signal with a first reference voltage, continuously drops the first sampling signal within the turn-off time of a power switch tube in the alternating current/direct current converter, and generates a conducting signal when the first sampling signal drops to the first reference voltage;
the turn-off signal generating circuit compares the first sampling signal with a second reference voltage, the first sampling signal continuously rises within the on time of the power switch tube, and when the first sampling signal rises to the second reference voltage, a turn-off signal is generated;
the first reference voltage is a difference value of a first control signal and a second control signal, and the second reference signal is a sum value of the first control signal and the second control signal; the first control signal is controlled by the direct current input voltage and the output voltage feedback variable after rectification by the alternating current/direct current converter; the second control signal is in a direct proportional relation with the product of the duty ratio of the power switch tube and the direct current input voltage, and the proportionality coefficient is a first proportionality coefficient;
the logic control circuit is respectively connected with the conducting signal generating circuit and the turn-off signal generating circuit, and controls the power switch tube to be conducted when the conducting signal is effective; and when the turn-off signal is effective, controlling the power switch tube to be turned off.
2. The boost PFC controller of claim 1, wherein the first scaling factor is constant to ensure a constant switching period of the power switching transistor.
3. The boost PFC controller of claim 1, wherein the first scaling factor is adjustable such that a switching period of the power switching transistor is varied.
4. A boost PFC controller according to claim 1, further comprising an output voltage feedback loop receiving an output voltage of the ac/dc converter to obtain the output voltage feedback variable, the output voltage feedback variable controlling the first control signal to ensure that the output voltage is maintained constant.
5. The boost PFC controller of claim 1, further comprising an inductor current sampling circuit to sample current through an inductor of the ac/dc converter and generate the first sampled signal.
6. A boost PFC controller according to claim 1, further comprising a power feed forward circuit that receives the rectified dc input voltage and performs peak detection to generate a peak voltage signal; and after the direct current input voltage is multiplied by the output voltage feedback variable, the ratio of the direct current input voltage to the square of the peak voltage signal is used as the first control signal so as to ensure that the output voltage feedback variable and the input power of the alternating current/direct current converter are in a direct proportion relation.
7. A boost PFC controller according to claim 1, further comprising a second control signal generating circuit, the second control signal generating circuit comprising an averaging circuit for respectively receiving a first voltage source, an on signal and an off signal of the power switch transistor to generate the second control signal, wherein a ratio of the first voltage source to the dc input voltage is the first scaling factor.
8. A boost PFC controller according to claim 1, wherein the logic control circuit comprises an RS flip-flop, a reset terminal of the RS flip-flop is connected to the on signal generating circuit, a set terminal of the RS flip-flop is connected to the off signal generating circuit, and a switching control signal outputted from an output terminal of the RS flip-flop is used to control a switching operation of the power switching tube.
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CN103943086A (en) * 2014-04-02 2014-07-23 合肥鑫晟光电科技有限公司 Analog voltage source circuit and display device
CN104638723A (en) * 2015-02-02 2015-05-20 成都芯源系统有限公司 Battery charging circuit and method thereof
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CN102931838A (en) * 2012-11-15 2013-02-13 常州大学 Slope compensation method for voltage-type hysteresis loop control switching converter and device thereof
CN103943086A (en) * 2014-04-02 2014-07-23 合肥鑫晟光电科技有限公司 Analog voltage source circuit and display device
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