CN102592023A - Register designing method and register designing device in integrated circuit designing process - Google Patents
Register designing method and register designing device in integrated circuit designing process Download PDFInfo
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Abstract
The invention discloses a register designing method in an integrated circuit designing process. The register designing method comprises the steps of generating an XML (Xtensible Markup Language) file including register configuration information by an XML editor; according to the type of a register interface included in the register configuration information, obtaining an RTL (Register Transfer Level) template in an RTL template base; according to the obtained RTL template and the register configuration information, generating an RTL file header including the register interface information and the parameter declaration; traversing all the register configuration information included in the XML file to generate RTL information of all the registers; and obtaining an RTL designing file including the RTL file header and the RTL information. According to the register designing method of the invention, the IC (Integrated Circuit) designing defects are reduced, and the designing success rate is increased.
Description
Technical field
The invention belongs to technical field of semiconductors, relate in particular to a kind of integrated circuit (Integrated Circuit, IC) register method for designing and the device in the design process.
Background technology
Fast development along with integrated circuit (IC); Chip-scale is increasing, and its register (or being called system register) also is on the increase, usually on the integrated circuit number of register often reach hundreds and thousands of each; (System-On-a-Chip is SoC) even up to ten of thousands for the SOC(system on a chip) that has.
A large amount of register designs is easy to occur owing to the register design incorrect chip defect that causes (bug).According to statistics, it is register incorrect causing of design up to 40～50% chip defect (bug).The defective that is caused mainly comprises: 1) default value and document standard are inconsistent, 2) access limit is incorrect, 3) address assignment mistake, 4) bit wide and document standard are inconsistent, and 5) configurable value configuration error etc.
And the design specifications of register also is constantly to change and revise in design process, even is also still constantly revising the design information of register in the IC proof procedure.In case in design process, increase or reduce register; Perhaps revise the design information such as length, position, attribute, initial value of register field; The document of register, register transfer level (Register Transfer Level; RTL) (testbench TB) need carry out corresponding modification for design and test platform.And these modifications also are easy to cause the register design incorrect, thereby cause chip defect.
It is thus clear that in the prior art, how to guarantee the consistance that register design and document standard and later stage are verified, be a problem demanding prompt solution; Especially be directed against the design of a large amount of registers; Its concrete design and the checking in design later stage safeguard it all is ten minutes difficulty and loaded down with trivial details, this very loaded down with trivial details maintenance work, and length consuming time and error rate are high; Also cause chip defect to increase, it is low to be designed to power.
Summary of the invention
In view of this; An object of the present invention is to provide register method for designing and device in a kind of IC design process; The design maintenance difficulty that is used for solving a large amount of registers that prior art exists is loaded down with trivial details; Maintenance work length consuming time, error rate height cause chip defect to increase, be designed to the low problem of power.For there is a basic understanding some aspects to the embodiment that discloses, provided simple summary below.This summary part is not to comment general, neither confirm the key/critical component or describe the protection domain of these embodiment.Its sole purpose is to present some notions with simple form, with this preamble as the detailed description of back.
The embodiment of the invention provides the register method for designing in a kind of IC design process, comprising:
Generate the XML file that comprises register configuration information through the expandable mark language XML editing machine;
According to the register interface type that comprises in the said register configuration information, obtain the RTL template in the register transfer level design RTL ATL;
According to RTL template of obtaining and said register configuration information, generate the RTL file header that comprises register interface information and parameter statement; And the RTL information that travels through each each register of register configuration information generation that comprises in the said XML file;
Obtain comprising the RTL design document of RTL file header and RTL information.
In some optional embodiment, said register configuration information comprises one of following message or combination: register title, register address, default value, field configuration, access rights and register interface information.
In some optional embodiment, said register interface type comprises at least a in the following type:
Advanced peripheral bus APB, Advanced High-performance Bus AHB, serial peripheral equipment interface SPI and built-in integrated circuit I
2The C bus.
In some optional embodiment, said method also comprises:
Said XML file is converted into corresponding RALF file;
According to storage RAL base class in said RALF file and the register level of abstraction RAL storehouse, generate the RAL test platform;
The RAL test platform of generation and the RTL design document of register are compiled emulation, and the RAL test platform after will compiling the RTL design document of the register after the emulation and compiling emulation compares coupling;
Whether the RTL design document of judging register according to matching result is correct.
In some optional embodiment, saidly judge according to matching result whether the RTL design document of register is correct, specifically comprises:
Whether the simulation result that relatively compiles test case in the RTL design document of simulation result and register of test case in the RAL test platform after the emulation is consistent, and when unanimity, the RTL that confirms register is correct; Or
RTL design document according to the register after RAL test platform after the compiling emulation and the compiling emulation; Whether the function coverage of judging the register that the RTL design document of said register is designed is greater than the coverage rate threshold value of setting; When function coverage during, confirm that the RTL design document of register is correct greater than the coverage rate threshold value set; Or
Whether the simulation result that relatively compiles test case in the RTL design document of simulation result and register of test case in the RAL test platform after the emulation is consistent; And according to the RTL design document of the register after the RAL test platform of compiling after the emulation and the compiling; Whether the function coverage of judging the register that the RTL design document of said register is designed is greater than the coverage rate threshold value of setting; When all being judged as when being, confirm that the RTL design document of register is correct.
In some optional embodiment, also comprise the feature documentation type information in the said XML file;
Said method also comprises:
Said feature documentation type information according to from said XML file, parsing obtains the feature documentation template in the document template storehouse;
According to the feature documentation template of obtaining, generate the whole address mapping table of the register that comprises register and register address mapping relations; And generation comprises the menu of each register functions information;
Obtain comprising the feature documentation of said whole address mapping table and menu.
In some optional embodiment, said feature documentation type comprises at least a in the following type:
Word document, html document, Excel document and TXT document.
The embodiment of the invention also provides the register design apparatus in a kind of IC design process, it is characterized in that, comprising:
The XML file generating module is used for generating the XML file that comprises register configuration information through the expandable mark language XML editing machine;
RTL template calling module is used for the register interface type that comprises according to said register configuration information, obtains the RTL template in the register transfer level design RTL ATL;
The design generation module is used for according to RTL template and the said register configuration information obtained, generates the RTL file header that comprises register interface information and parameter statement; And the RTL information that travels through each each register of register configuration information generation that comprises in the said XML file; Obtain comprising the RTL design document of RTL file header and RTL information.
In some optional embodiment, said device also comprises:
Said model generation module is used for said XML file is converted into corresponding RALF file; According to storage RAL base class in said RALF file and the register level of abstraction RAL storehouse, generate the RAL test platform;
Said coupling authentication module is used for the RAL test platform of generation and the RTL design document of register are compiled emulation, and the RAL test platform after will compiling the RTL design document of the register after the emulation and compiling emulation compares coupling; Whether the RTL design document of judging register according to matching result is correct.
In some optional embodiment, said coupling authentication module specifically is used for:
Whether the simulation result that relatively compiles test case in the RTL design document of simulation result and register of test case in the RAL test platform after the emulation is consistent, and the RTL that when unanimity, confirms register is correct; Or
RTL design document according to the register after RAL test platform after the compiling emulation and the compiling emulation; Whether the function coverage of judging the register that the RTL design document of said register is designed is greater than the coverage rate threshold value of setting; When function coverage during, confirm that the RTL design document of register is correct greater than the coverage rate threshold value set; Or
Whether the simulation result that relatively compiles test case in the RTL design document of simulation result and register of test case in the RAL test platform after the emulation is consistent; And according to the RTL design document of the register after the RAL test platform of compiling after the emulation and the compiling; Whether the function coverage of judging the register that the RTL design document of said register is designed is greater than the coverage rate threshold value of setting; When all being judged as when being, confirm that the RTL design document of register is correct.
In some optional embodiment, said device also comprises: document template calling module and feature documentation generation module;
Said XML file generating module also is used to generate the XML file that also comprises the feature documentation type information;
Said document template calling module is used for basis from the said feature documentation type information that said XML file parses, and obtains the feature documentation template in the document template storehouse;
Said feature documentation generation module is used for according to the feature documentation template of obtaining, and generates the whole address mapping table of the register that comprises register and register address mapping relations; And generation comprises the menu of each register functions information; Obtain comprising the feature documentation of said whole address mapping table and menu.
Register method for designing and device in the IC design process that the embodiment of the invention provides generate the XML file that comprises register configuration information through xml editor; According to the register interface type that comprises in the register configuration information, obtain the RTL template in the register transfer level design RTL ATL; According to RTL template of obtaining and said register configuration information, generate the RTL file header that comprises register interface information and parameter statement; And each the register configuration information that comprises in the traversal XML file generates the RTL information of each register; Obtain comprising the RTL design document of RTL file header and RTL information.Thereby the The Automation Design of a large amount of registers in the realization integrated circuit; Automatically generate the RTL design documentation of register; Problem when having avoided a large amount of registers to design, the problem includes: the loaded down with trivial details problem of design maintenance difficulty; Reduced and safeguarded and consuming time and error rate to have reduced IC or chip design defective, improved and be designed to power; What help designing reuses, thereby helps quickening the integrated of IC or chip.
For above-mentioned and relevant purpose, one or more embodiment comprise the characteristic that the back will specify and in claim, particularly point out.Below explanation and accompanying drawing specify some illustrative aspects, and its indication only is some modes in the utilizable variety of way of principle of each embodiment.Other benefit and novel features will consider and become obviously along with following detailed description combine accompanying drawing, and the disclosed embodiments are to comprise being equal to of all these aspects and they.
Figure of description
Fig. 1 is the whole principle schematic of register method for designing in the embodiment of the invention;
Fig. 2 is the process flow diagram of register method for designing in the embodiment of the invention one;
Fig. 3 is the process flow diagram of register method for designing in the embodiment of the invention two;
Fig. 4 is the process flow diagram of register method for designing in the embodiment of the invention three;
Fig. 5 is the structural representation of register design apparatus in the embodiment of the invention;
Fig. 6 is a concrete structure synoptic diagram of realizing the module of RAL checking in the embodiment of the invention.
Embodiment
Below description and accompanying drawing illustrate specific embodiments of the present invention fully, to enable those skilled in the art to put into practice them.Other embodiments can comprise structure, logic, electric, process and other change.Embodiment only represents possible variation.Only if explicitly call for, otherwise independent assembly and function are optional, and the order of operation can change.The part of some embodiments and characteristic can be included in or replace the part and the characteristic of other embodiments.The scope of embodiment of the present invention comprises the gamut of claims, and all obtainable equivalents of claims.In this article; These embodiments of the present invention can be represented with term " invention " individually or always; This only is for ease, and if in fact disclose and surpass one invention, not that the scope that will automatically limit this application is any single invention or inventive concept.
The embodiment of the invention provides the register method for designing in a kind of IC design process, and the integral body of this method realizes that principle is as shown in Figure 1, mainly comprises the RTL design process of register, and this process generates the RTL design document; Preferably, comprise that also (Register Abstraction Layer, the RAL) generative process of test platform are used for the RTL design document that generates is verified the register level of abstraction; Preferably, also comprise the generation of the feature documentation of register, be convenient to check and understand the various configuration informations of the register that is designed.
As shown in Figure 1, (Extensible Markup Language, XML) editing machine is described register, and will save as the XML file to the description of register to adopt extend markup language.
Then, call XML 2RTL instrument produces the described RTL design document of this XML file; And call XML 2TB instrument, (testbench TB), and verifies the RTL design document through the test platform that produces to produce the described test platform of this XML file.For example: this test platform can (Verification Methodology Manual VMM) realizes, compiles emulation through emulation tool (like VCS) again based on VMM-RAL.
In addition, can also call XML 2SPEC instrument, produce the feature documentation of the described register of this XML file.
Specify above-mentioned each realization process flow process through specific embodiment below.
Embodiment one
Register method for designing in the IC design process that the embodiment of the invention one provides realizes that the RTL design document of each register generates, so that realize the design of register, this method flow is as shown in Figure 2, comprises the steps:
S11: generate the XML file through xml editor.
Specifically be to generate the XML file that comprises register configuration information through the expandable mark language XML editing machine.
Adopt xml editor to describe register; And generate corresponding XML file; The register configuration information that comprises in the XML file that generates can comprise register interface information such as register interface type etc., and the register configuration information that comprises in the XML file also comprises one of following message or combination: register title, register address, default value, field configuration and access rights.
The register interface type comprises at least a in the following type: advanced peripheral bus (Advanced Peripheral Bus; APB), Advanced High-performance Bus (Advanced High-performance Bus; AHB), Serial Peripheral Interface (SPI) (Serial Peripheral Interface; SPI) and built-in integrated circuit (Inter-Integrated Circuit, I2C) bus.
Can also comprise feature documentation type information etc. in the XML file that generates.
S12:, obtain the RTL template in the register transfer level design RTL ATL according to the register interface type that comprises in the XML file.Specifically be to obtain according to the register interface type that comprises in the register configuration information in the XML file.
Pre-configured and stored RTL template in the RTL ATL to each interface type, during the interface type that in getting access to register configuration information, comprises, can obtain different RTL templates according to different interface types.
S13:, generate the RTL file header that comprises register interface information and parameter statement according to RTL template of obtaining and register configuration information.
The RTL file generally comprises a RTL file header part, states the interface message of the register that is designed and the parameter of configuration in this part.For example the XML2RTL tool implementation can be passed through, other similar tool implementation can certainly be passed through.
S14: each the register configuration information that comprises in the traversal XML file generates the RTL information of each register.
For example can be through the register configuration information array in the XML2RTL instrument traversal XML file; Obtain the configuration information of each register; Generate the RTL information of each register in the RTL design document; This partial information constitutes the main part of RTL design document, can certainly pass through other these processes of similar tool implementation.
After the generation of the RTL information of accomplishing each register, can also generate a RTL end-of-file, come the RTL end of message (EOM) of flag register.
S15: the RTL design document that obtains comprising RTL file header and RTL information.
RTL information by each register that constitutes the RTK main part that generates among RTL file header that generates among the step S13 and the step S14 constitutes the RTL design document jointly.
When the spanned file tail, corresponding, the RTL design document that obtains comprises RTL file header, RTL information and RTL end-of-file.
Be an example of the XML file that relates among the step S11 below, specifically can comprise following content:
In the above-mentioned XML document, the name that has indicated register is called " SYS_MODE_REG ", and register address is " 0x7c ", and access rights are " RW " etc.
Be an example of the RTL design document that relates among the step S15 below, specifically can comprise following content:
In the above-mentioned RTL design document, be the RTL file header from the file beginning to " logic start ", for example: APB Interface partly is register interface information; It is the document body part that comprises the RTL information of each register that RTL file header back is located to " end "; " endmodule " is the RTL end-of-file, this RTL end of file of mark.
Embodiment two
Register method for designing in the IC design process that the embodiment of the invention two provides; On the basis of the method for embodiment one, realize the generation of RAL test platform; So that the RTL design document to each register is verified; The accuracy of checking RTL design document, the proof procedure of generation of RAL test platform and RTL design document is as shown in Figure 3, comprises the steps:
S21: the XML file is converted into corresponding RALF file.
The XML file conversion that generates among the step S11 is the RALF file, transforms in the RALF file that obtains to comprise register configuration information etc., and when generating the RAL test platform, the information analysis with needs from the RALF file comes out.
RALF is a kind of register description form; Different RALF corresponding different RALF files; Can write the RALF file according to the register design specifications; Therefore, comprise the design specifications of register in the RALF file, can generate the RAL test platform verified of register that is used for design according to these design specificationss.
S22:, generate the RAL test platform according to the RAL base class of storing in RALF file and the RAL storehouse.
Though the RAL storehouse provides a series of base class (Class) of encapsulation register description information, the design specifications of the register relevant with specific IC to be measured or chip must be added on each RAL base class by the user and expand in the subclass that obtains.The user must be to each register field in IC to be measured or the chip, each register; And the set that constitutes by register; Define new class through expanding corresponding base class, thereby encapsulate their design specifications information, this process is more loaded down with trivial details and consuming time.
In order to save slip-stick artist's workload to greatest extent, in the application's checking solution, RAL test platform (RAL Model) need do not realized by the user, but by generating RAL Model with RAL model generator (being called for short ralgen) instrument.
Automatically generate according to the RALF file that generates (adopting .ralf is the suffix name, so claim the RALF file) by the ralgen instrument.The user only need write register design specifications file according to simple and clear RAL form, gives the ralgen instrument again, just can generate the required all expansion classes of RAL Model automatically.
Certainly, said process also can expand in the design and proof procedure of storer.
S23: the RAL test platform of generation and the RTL design document of register are compiled emulation.
RAL design document and RAL test platform all are some source code file; Therefore need compile emulation to it; So that can use the RAL test platform that the RAL design document that generates is verified, thereby realize the accuracy and the reliability of the register that checking is designed.
S24: the RAL test platform after the RTL design document that will compile the register after the emulation and the compiling emulation compares coupling.
When mating, different matched rules can be set as required, for example, can adopt one of following matched rule:
Whether (a1) relatively compile the simulation result of test case in the RTL design document of simulation result and register of test case in the RAL test platform after the emulation consistent.
(a2) according to the RTL design document of the register after the RAL test platform of compiling after the emulation and the compiling emulation, whether the function coverage of judging the register that the RTL design document of register is designed is greater than the coverage rate threshold value of setting.
Whether (a3) relatively compile the simulation result of test case in the RTL design document of simulation result and register of test case in the RAL test platform after the emulation consistent; Simultaneously, according to the RTL design document of the register after the RAL test platform of compiling after the emulation and the compiling emulation, whether the function coverage of judging the register that the RTL design document of register is designed is greater than the coverage rate threshold value of setting.
Certainly, above-mentionedly only enumerated two kinds of matching ways and combination thereof, in practical application,, other matching way and matching parameter can also be set, enumerated no longer one by one here according to the checking demand of RAL design document.
S25: whether the RTL design document of judging register according to matching result is correct.
To the different matching process or the mode that adopt among the step S25; Judge according to matching result whether correct process also is different for the RTL design document of register; For example to above-mentioned three kinds of modes enumerating, also can judge the whether correct respectively corresponding following three kinds of modes of process of RTL design document of register according to matching result:
(b1) to the whether consistent mode of the simulation result of test case in the RTL design document of the simulation result of test case in the RAL test platform that relatively compiles after the emulation and register; When unanimity; The RTL design document of confirming register is correct, otherwise is incorrect.
(b2) to RTL design document according to the register after RAL test platform after the compiling emulation and the compiling emulation; Whether the function coverage of judging the register that the RTL design document of said register is designed is greater than the situation of the coverage rate threshold value of setting; When function coverage during greater than the coverage rate threshold value set; The RTL design document of confirming register is correct, otherwise is incorrect.
(b3) whether consistent to the simulation result of test case in the RTL design document of the simulation result of test case in the RAL test platform that relatively compiles after the emulation and register; Simultaneously according to the RTL design document of the register after the RAL test platform after the compiling emulation and the compiling; Whether the function coverage of judging the register that the RTL design document of said register is designed is greater than the situation of the coverage rate threshold value of setting; When all being judged as when being; The RTL design document of confirming register is correct, as long as a judgement is arranged not when being, then thinks incorrect.
Above-mentioned proof procedure is based on the exploitation of OOP method; Through the RAL storehouse provide a series of type; Encapsulate register relevant general data structure and method to greatest extent; Save the user thus and develop the workload of register/memory verification environment, and the user only need define own required class through the base class in the expansion RAL storehouse, the customizing messages that adds the register in IC to be measured or the chip gets final product.
Embodiment three
Register method for designing in the IC design process that the embodiment of the invention three provides; On the basis of the method for embodiment one or embodiment two; The generation of the function file of the register that further realization is designed; So that the technician can be known the configuration information of the register that is designed easily, the generative process of feature documentation is as shown in Figure 3, comprises the steps:
S31: parse the feature documentation type information in the XML file.
Also comprise the feature documentation type information in the XML file, call XML 2SPEC instrument parses this information.
S32:, obtain the feature documentation template in the document template storehouse according to the feature documentation type information that parses.
Pre-configured and stored feature documentation template in the document template storehouse to each feature documentation type, can call the function corresponding document template according to the feature documentation type information that parses through the XML2SPEC instrument.
S33:, generate the whole address mapping table of register according to the feature documentation template of obtaining.
From the XML file, obtain the address information of each register; Generation comprises the whole address mapping table of the register of register and register address mapping relations; This mapping table associates the physical address of identification informations such as the title of register and register; Set up corresponding relation, be convenient to check the physical address of each register.
S34: generate the menu that comprises each register functions information.
From the XML file, obtain the address information of each register; Generation comprises the menu of the function information of each register; This menu is noted the configuration information of identification informations such as the title of register and register, functional parameter etc., is convenient to check the function information of each register.
S35: the feature documentation that obtains comprising whole address mapping table and menu.An example of the register functions document that generates can be as shown in table 1 below:
Table 1
In the above-mentioned table 1, " SYS_MODE_REG " is the title of register, and " Address Offset " is the address of register, is 0x007c such as the address.The function information that remaining all belongs to register for example comprises: default value (Default Value), descriptor configuration informations such as (Description), and each field and corresponding functional parameters such as access rights thereof.
Based on same inventive concept, the embodiment of the invention also provides the register design apparatus in a kind of IC design process, and the structure of this device is as shown in Figure 5, comprising: XML file generating module 10, RTL template calling module 20 and design generation module 30.
XML file generating module 10 is used for generating the XML file that comprises register configuration information through the expandable mark language XML editing machine.
RTL template calling module 20, the register interface type that comprises in the register configuration information that is used for comprising according to the XML file is obtained the RTL template in the register transfer level design RTL ATL.
Design generation module 30 is used for the register configuration information that comprises according to the RTL template obtained and XML file, generates the RTL file header that comprises that register interface information and parameter are stated; And each the register configuration information that comprises in the traversal XML file generates the RTL information of each register; Obtain comprising the RTL design document of RTL file header and RTL information.
Preferably, above-mentioned register design apparatus also comprises: model generation module 40 and coupling authentication module 50.
Model generation module 40 is used for said XML file is converted into corresponding RALF file; According to storage RAL base class in RALF file and the RAL storehouse, generate the RAL test platform.
Coupling authentication module 50 is used for the RAL test platform of generation and the RTL design document of register are compiled emulation, and the RAL test platform after will compiling the RTL design document of the register after the emulation and compiling emulation compares coupling; Whether the RTL design document of judging register according to matching result is correct.
Preferably, above-mentioned coupling authentication module 50 specifically is used for:
Whether the simulation result that relatively compiles test case in the RTL design document of simulation result and register of test case in the RAL test platform after the emulation is consistent, and the RTL that when unanimity, confirms register is correct; Or
RTL design document according to the register after RAL test platform after the compiling emulation and the compiling emulation; Whether the function coverage of judging the register that the RTL design document of register is designed is greater than the coverage rate threshold value of setting; When function coverage during, confirm that the RTL design document of register is correct greater than the coverage rate threshold value set; Or
Whether the simulation result that relatively compiles test case in the RTL design document of simulation result and register of test case in the RAL test platform after the emulation is consistent; And according to the RTL design document of the register after the RAL test platform of compiling after the emulation and the compiling; Whether the function coverage of judging the register that the RTL design document of register is designed is greater than the coverage rate threshold value of setting; When all being judged as when being, confirm that the RTL design document of register is correct.
Preferably, above-mentioned register design apparatus also comprises: document template calling module 60 and feature documentation generation module 70.
Above-mentioned XML file generating module 10 also is used to generate the XML file that also comprises the feature documentation type information.
Document template calling module 60 is used for basis from the feature documentation type information that the XML file parses, and obtains the feature documentation template in the document template storehouse.
Feature documentation generation module 70 is used for according to the feature documentation template of obtaining, and generates the whole address mapping table of the register that comprises register and register address mapping relations; And generation comprises the menu of each register functions information; Obtain comprising the feature documentation of whole address mapping table and menu.
Realization is to the proof procedure of the RAL design document of the register of design in the foregoing description; In practical application; With the VMM verification environment is example; The VMM verification environment is the verification environment of stratification, be divided into instruction level (Command Layer), functional layer (Functional Layer), scene layer (Scenario Layer) etc., and RAL is under the jurisdiction of Functional Layer.
As shown in Figure 6, the basic structure of RAL comprises three parts, is respectively RAL model (RAL Model), RAL processor (RAL Transactor) and RAL access manager (RAL Access).The RAL functional module of Functional Layer is through bus functional model (the Bus Function Model of RAI processor realization with Command Layer; BFM) mutual; And through BFM and design to be verified (Design Under Test, DUT) alternately, BFM does not belong to the category of RAL; It is the module of Command Layer in the VMM test environment, is responsible for Command Layer information transmitted is driven the high-low level logical signal for reality on the DUT interface.Realize the function of above-mentioned model generation module 40 and coupling authentication module 50 through RAL model (RAL Model), RAL processor (RAL Transactor) and RAL access manager (RAL Access).
Register method for designing in the said integrated circuit IC design process that the embodiment of the invention provides is described the specifying information of register through the XML file, again based on this XML file; Call relevant instrument respectively and give birth to the RTL design document, and then produce the RTL test platform, quickened Time To Market (the Time to Market of integrated circuit or chip from movable property; TTM); Realize the The Automation Design of a large amount of registers in the integrated circuit, generate the RTL design documentation of register automatically, and automatically the correctness of the RTL design documentation that generates is verified; Problem when having avoided a large amount of registers to design, the problem includes: design maintenance and the loaded down with trivial details problem of later stage checking difficulty; Reduced and safeguarded and consuming time and error rate to have reduced IC or chip design defective, improved and be designed to power.Can verify the correctness of design automatically through the RTL test platform that generates, be convenient to very much safeguard.
When change and modification take place in the design of register, can adapt to automatically easily and revise RTL design document and RTL test platform, avoided revising to safeguard it is the troublesome operation that exists, greatly improved design and verification efficiency.Said method is particularly advantageous in reusing of design, thereby helps the integrated of speed-up chip.
Only if specifically statement in addition, term is such as handling, confirm, show or the like the action and/or the process that can refer to one or more processing or computing system or similar devices.Should be understood that the particular order of the step in the disclosed process or the instance that level is illustrative methods.Based on design preference, should be appreciated that the particular order of the step in the process or level can be rearranged under the situation that does not break away from protection domain of the present disclosure.Appended claim to a method has provided the key element of various steps with exemplary order, and is not to be limited to described particular order or level.
In above-mentioned detailed description, various characteristics are combined in the single embodiment together, to simplify the disclosure.Should this open method be interpreted as and reflect such intention, that is, the embodiment of theme required for protection need be than the more characteristic of clearly in each claim, being stated of characteristic.On the contrary, that kind of liking enclosed that claims reflected, the present invention is in the state that lacks than whole characteristics of disclosed single embodiment.Therefore, appending claims clearly is merged in the detailed description hereby, and wherein every claim is alone as the independent preferred embodiment of the present invention.
Those skilled in the art it is also understood that various illustrative box, module, circuit and the algorithm steps of the embodiment description that combines this paper all can be embodied as electronic hardware, computer software or its combination.For the interchangeability between the hardware and software clearly is described, above various illustrative parts, frame, module, circuit and step have all been carried out usually describing around its function.Be embodied as hardware or be embodied as software as for this function, depend on certain applications and design constraint that total system applied.Those skilled in the art can be directed against each application-specific, realize described function with the mode of accommodation, and still, this realization decision-making should not be construed as and deviates from protection domain of the present disclosure.
For making any technician in this area can realize or use the present invention, above disclosed embodiment is described.To those skilled in the art; The various alter modes of these embodiment all are conspicuous, and the General Principle of this paper definition also can be applicable to other embodiment on the basis that does not break away from spirit of the present disclosure and protection domain.Therefore, the disclosure is not limited to the embodiment that this paper provides, but consistent with the widest scope of disclosed principle of the application and novel features.
Realize that for software the module (for example, process, function etc.) of the said function of describing among the application of technological available execution the application realizes.These software codes can be stored in memory cell and carried out by processor.Memory cell can be implemented in the processor, also can be implemented in outside the processor, and under latter event, it is coupled to processor via various means with communication mode, and these all are well known in the art.
And various aspects as herein described or characteristic can be used as the program design of use standard and/or method, device or the goods of engineering are realized.The description of preceding text comprises giving an example of one or more embodiment.Certainly, all possible combination of describing parts or method in order to describe the foregoing description is impossible, but those of ordinary skills should be realized that each embodiment can do further combination and arrangement.Therefore, the embodiment that describes among this paper is intended to contain all such changes, modification and the modification in the protection domain that falls into appended claims.In addition, " comprise " with regard to the term that uses in instructions or claims, the mode that contains of this speech is similar to term and " comprises ", just in claim, is used as that kind that link word is explained as " comprising, ".In addition, using any one term " perhaps " in the instructions of claims is to represent " non-exclusionism perhaps ".
Claims (11)
1. the register method for designing in the IC design process is characterized in that, comprising:
Generate the XML file that comprises register configuration information through the expandable mark language XML editing machine;
According to the register interface type that comprises in the said register configuration information, obtain the RTL template in the register transfer level design RTL ATL;
According to RTL template of obtaining and said register configuration information, generate the RTL file header that comprises register interface information and parameter statement; And the RTL information that travels through each each register of register configuration information generation that comprises in the said XML file;
Obtain comprising the RTL design document of RTL file header and RTL information.
2. the method for claim 1 is characterized in that, said register configuration information comprises one of following message or combination: register title, register address, default value, field configuration, access rights and register interface information.
3. the method for claim 1 is characterized in that, said register interface type comprises at least a in the following type:
Advanced peripheral bus APB, Advanced High-performance Bus AHB, serial peripheral equipment interface SPI and built-in integrated circuit I
2The C bus.
4. the method for claim 1 is characterized in that, also comprises:
Said XML file is converted into corresponding RALF file;
According to storage RAL base class in said RALF file and the register level of abstraction RAL storehouse, generate the RAL test platform;
The RAL test platform of generation and the RTL design document of register are compiled emulation, and the RAL test platform after will compiling the RTL design document of the register after the emulation and compiling emulation compares coupling;
Whether the RTL design document of judging register according to matching result is correct.
5. method as claimed in claim 4 is characterized in that, saidly judges according to matching result whether the RTL design document of register is correct, specifically comprises:
Whether the simulation result that relatively compiles test case in the RTL design document of simulation result and register of test case in the RAL test platform after the emulation is consistent, and when unanimity, the RTL that confirms register is correct; Or
RTL design document according to the register after RAL test platform after the compiling emulation and the compiling emulation; Whether the function coverage of judging the register that the RTL design document of said register is designed is greater than the coverage rate threshold value of setting; When function coverage during, confirm that the RTL design document of register is correct greater than the coverage rate threshold value set; Or
Whether the simulation result that relatively compiles test case in the RTL design document of simulation result and register of test case in the RAL test platform after the emulation is consistent; And according to the RTL design document of the register after the RAL test platform of compiling after the emulation and the compiling; Whether the function coverage of judging the register that the RTL design document of said register is designed is greater than the coverage rate threshold value of setting; When all being judged as when being, confirm that the RTL design document of register is correct.
6. like the arbitrary described method of claim 1-5, it is characterized in that, also comprise the feature documentation type information in the said XML file;
Said method also comprises:
Said feature documentation type information according to from said XML file, parsing obtains the feature documentation template in the document template storehouse;
According to the feature documentation template of obtaining, generate the whole address mapping table of the register that comprises register and register address mapping relations; And generation comprises the menu of each register functions information;
Obtain comprising the feature documentation of said whole address mapping table and menu.
7. method as claimed in claim 6 is characterized in that, said feature documentation type comprises at least a in the following type:
Word document, html document, Excel document and TXT document.
8. the register design apparatus in the IC design process is characterized in that, comprising:
The XML file generating module is used for generating the XML file that comprises register configuration information through the expandable mark language XML editing machine;
RTL template calling module is used for the register interface type that comprises according to said register configuration information, obtains the RTL template in the register transfer level design RTL ATL;
The design generation module is used for according to RTL template and the said register configuration information obtained, generates the RTL file header that comprises register interface information and parameter statement; And the RTL information that travels through each each register of register configuration information generation that comprises in the said XML file; Obtain comprising the RTL design document of RTL file header and RTL information.
9. device as claimed in claim 8 is characterized in that, also comprises:
Said model generation module is used for said XML file is converted into corresponding RALF file; According to storage RAL base class in said RALF file and the register level of abstraction RAL storehouse, generate the RAL test platform;
Said coupling authentication module is used for the RAL test platform of generation and the RTL design document of register are compiled emulation, and the RAL test platform after will compiling the RTL design document of the register after the emulation and compiling emulation compares coupling; Whether the RTL design document of judging register according to matching result is correct.
10. device as claimed in claim 9 is characterized in that, said coupling authentication module specifically is used for:
Whether the simulation result that relatively compiles test case in the RTL design document of simulation result and register of test case in the RAL test platform after the emulation is consistent, and the RTL that when unanimity, confirms register is correct; Or
RTL design document according to the register after RAL test platform after the compiling emulation and the compiling emulation; Whether the function coverage of judging the register that the RTL design document of said register is designed is greater than the coverage rate threshold value of setting; When function coverage during, confirm that the RTL design document of register is correct greater than the coverage rate threshold value set; Or
Whether the simulation result that relatively compiles test case in the RTL design document of simulation result and register of test case in the RAL test platform after the emulation is consistent; And according to the RTL design document of the register after the RAL test platform of compiling after the emulation and the compiling; Whether the function coverage of judging the register that the RTL design document of said register is designed is greater than the coverage rate threshold value of setting; When all being judged as when being, confirm that the RTL design document of register is correct.
11. like the arbitrary described device of claim 8-10, it is characterized in that, also comprise: document template calling module and feature documentation generation module;
Said XML file generating module also is used to generate the XML file that also comprises the feature documentation type information;
Said document template calling module is used for basis from the said feature documentation type information that said XML file parses, and obtains the feature documentation template in the document template storehouse;
Said feature documentation generation module is used for according to the feature documentation template of obtaining, and generates the whole address mapping table of the register that comprises register and register address mapping relations; And generation comprises the menu of each register functions information; Obtain comprising the feature documentation of said whole address mapping table and menu.
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| CN103838653A (en) * | 2012-11-27 | 2014-06-04 | 上海华虹集成电路有限责任公司 | Register automatic authentication method based on VMM RAL |
| CN104898991A (en) * | 2015-06-10 | 2015-09-09 | 烽火通信科技股份有限公司 | Automatic-RAL-based register access method and system |
| CN105447212A (en) * | 2014-08-25 | 2016-03-30 | 联发科技（新加坡）私人有限公司 | Method for generating verification platform file of integrated circuit and compiling system |
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| CN105447212A (en) * | 2014-08-25 | 2016-03-30 | 联发科技（新加坡）私人有限公司 | Method for generating verification platform file of integrated circuit and compiling system |
| CN104898991B (en) * | 2015-06-10 | 2018-07-27 | 烽火通信科技股份有限公司 | A kind of register access methods and system based on automation RAL |
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