CN102591825A - Transmitting device and method between SATA (Serial Advanced Technology Attachment) controller and flash controller based on SYNC mechanism - Google Patents
Transmitting device and method between SATA (Serial Advanced Technology Attachment) controller and flash controller based on SYNC mechanism Download PDFInfo
- Publication number
- CN102591825A CN102591825A CN2011104555621A CN201110455562A CN102591825A CN 102591825 A CN102591825 A CN 102591825A CN 2011104555621 A CN2011104555621 A CN 2011104555621A CN 201110455562 A CN201110455562 A CN 201110455562A CN 102591825 A CN102591825 A CN 102591825A
- Authority
- CN
- China
- Prior art keywords
- controller
- trigger module
- reading
- sata
- flash
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
The invention discloses a transmitting device and a method between a SATA controller and a flash controller based on a SYNC mechanism, which are applied in data transmission between the SATA controller and the flash controller in a solid-state hard disk, wherein the device comprises a first Trigger module arranged on the SATA controller, and a second Trigger module arranged on the flash controller; the first Trigger module and the second Trigger module use a PRD (product requirement document) format to achieve data transmission between the SATA controller and the flash controller. The device adds a Trigger hardware structure based on the SYNC mechanism, so that the data transmission between the SATA controller and the flash controller is achieved by the SYNC mechanism; the query state participated by the software is not interrupted, thus, improving data transmission rate of the SATA interface solid-state hard disk.
Description
Technical field
The present invention relates to the transmission technology between SATA controller and flash controller, particularly relate to a kind of based on the SATA controller of SYNC mechanism and transmitting device and the method between flash controller.
Background technology
In the transmission method in the current solid state hard disc between SATA controller and the flash controller, Host main frame read-write requests each time, SATA controller and flash controller all have interruption generating; This method weak point is that the interruption generating number of times is too many; This makes the delay of system increase, and therefore, is badly in need of proposing a kind of transmission method; Solve interruption delay, thereby improve the transmission speed of SATA interface solid hard disk greatly.
Summary of the invention
The object of the present invention is to provide a kind of based on the SATA controller of SYNC mechanism and transmitting device and the method between flash controller; It is too many to be used for solving prior art interruption generating number of times; Cause the delay of system to increase, to such an extent as to can't improve the problem of the transmission speed of SATA interface solid hard disk.
To achieve these goals; It is a kind of based on the SATA controller of SYNC mechanism and the transmitting device between flash controller that the present invention provides; Be applied to the data transmission between the SATA controller and flash controller in the solid state hard disc; It is characterized in that, comprising: be arranged at a Trigger module on the said SATA controller, the 2nd Trigger module on the said flash controller is set;
A said Trigger module, said the 2nd Trigger module adopt the PRD form to realize the data transmission between said SATA controller and the said flash controller.
Described transmitting device wherein, also comprises: a data block is the reading and writing data buffer zone between said SATA controller and the said flash controller.
Described transmitting device, wherein, said SATA controller receives the write order that main frame sends, and resolves this write order, obtains the first address of said reading and writing data buffer zone; The DMA of said SATA controller is from host receiving data, and is written to said reading and writing data buffer zone; After writing completion, a said Trigger module is sent the said flash controller of signalisation; Said the 2nd Trigger module is obtained the first address of said reading and writing data buffer zone, and is sent to the DMA of said flash controller; The DMA of said flash controller is from said reading and writing data buffer zone reading of data, and is written in the flash memory; After the DMA of said flash controller write completion, said the 2nd Trigger module was sent the said SATA controller of signalisation write order and is accomplished; A said Trigger module is sent completion status to main frame.
Described transmitting device, wherein, said SATA controller receives the read command that main frame sends, and resolves this read command, obtains the first address of said reading and writing data buffer zone; A said Trigger module is sent the said flash controller of signalisation; Said the 2nd Trigger module is obtained the first address of said reading and writing data buffer zone, and is sent to the DMA of said flash controller; The DMA of said flash controller reading of data from flash memory, and be written in the said reading and writing data buffer zone; After accomplishing reading of data, said the 2nd Trigger module is sent the read command of the said SATA controller of signalisation and is accomplished; A said Trigger module starts the DMA of said SATA controller, reading of data from said reading and writing data buffer zone, and send to main frame.
Described transmitting device, wherein, said flash controller is the NFC flash controller.
To achieve these goals, it is a kind of based on the SATA controller of SYNC mechanism and the transmission method between flash controller that the present invention provides, and is applied to the data transmission between the SATA controller and flash controller in the solid state hard disc, it is characterized in that, comprising:
Step 1 is provided with a Trigger module on said SATA controller, the 2nd Trigger module is set on said flash controller;
Step 2, a said Trigger module, said the 2nd Trigger module adopt the PRD form to realize the data transmission between said SATA controller and the said flash controller.
Described transmission method wherein, in the said step 1, also comprises:
One data block is the reading and writing data buffer zone between said SATA controller and the said flash controller.
Described transmission method wherein, in the said step 2, also comprises: the process of writing of main frame, specifically:
Said SATA controller receives the write order that main frame sends, and resolves this write order, obtains the first address of said reading and writing data buffer zone;
The DMA of said SATA controller is from host receiving data, and is written to said reading and writing data buffer zone;
After writing completion, a said Trigger module is sent the said flash controller of signalisation;
Said the 2nd Trigger module is obtained the first address of said reading and writing data buffer zone, and is sent to the DMA of said flash controller;
The DMA of said flash controller is from said reading and writing data buffer zone reading of data, and is written in the flash memory;
After the DMA of said flash controller write completion, said the 2nd Trigger module was sent the said SATA controller of signalisation write order and is accomplished;
A said Trigger module is sent completion status to main frame.
Described transmission method wherein, in the said step 2, also comprises: the read procedure of main frame, specifically:
Said SATA controller receives the read command that main frame sends, and resolves this read command, obtains the first address of said reading and writing data buffer zone;
A said Trigger module is sent the said flash controller of signalisation;
Said the 2nd Trigger module is obtained the first address of said reading and writing data buffer zone, and is sent to the DMA of said flash controller;
The DMA of said flash controller reading of data from flash memory, and be written in the said reading and writing data buffer zone;
After accomplishing reading of data, said the 2nd Trigger module is sent the read command of the said SATA controller of signalisation and is accomplished;
A said Trigger module starts the DMA of said SATA controller, reading of data from said reading and writing data buffer zone, and send to main frame.
Described transmission method, wherein, in the said step 2, said flash controller is the NFC flash controller.
Compared with prior art, useful technique effect of the present invention is:
The present invention is based on SYNC (Synchronous; Synchronous) mechanism; Added the Trigger hardware configuration; Make and pass through SYNC mechanism mutual data transmission between SATA controller and the flash controller, need not interruption generating and software and participate in query State, thereby improve the data transmission rate of SATA interface solid hard disk.
Description of drawings
Fig. 1 is the transmission mode synoptic diagram between existing SATA controller and flash controller;
Fig. 2 the present invention is based on the SATA controller of SYNC mechanism and the transmitting device structural drawing between flash controller;
Fig. 3 is the hardware structure diagram of Trigger module of the present invention;
Fig. 4 is the process flow diagram flow chart of writing that the present invention is based between machine-processed SATA controller of SYNC and flash controller;
Fig. 5 the present invention is based on the SATA controller of SYNC mechanism and the read procedure process flow diagram between flash controller.
Embodiment
Describe the present invention below in conjunction with accompanying drawing and specific embodiment, but not as to qualification of the present invention.
As shown in Figure 2, be to the present invention is based on the SATA controller of SYNC mechanism and the transmitting device structural drawing between flash controller.
This transmitting device is applied to the data transmission between the SATA controller and flash controller in the solid state hard disc; Be used to make between SATA controller 20 and the flash controller 30 through SYNC mechanism mutual data transmission, comprise: a Trigger module 201, the 2nd Trigger module 301.
Further, flash controller 30 can be the NFC flash controller.
The one Trigger module 201 is arranged on the SATA controller 20, is used for realizing the data transmission between SATA controller 20 and the NFC flash controller 30 based on SYNC mechanism.
The 2nd Trigger module 301 is arranged on the NFC flash controller 30, is used for realizing the data transmission between NFC flash controller 30 and the SATA controller 20 based on SYNC mechanism.
Further, SATA controller 20 also comprises dma module 202 (abbreviating DMA 202 as); NFC flash controller 30 also comprises dma module 302 (abbreviating DMA 302 as).Wherein, DMA is direct memory access (Direct Memory Access).
The one Trigger module 201, the 2nd Trigger module 301 realize transmitting The data PRD form between SATA controllers 20 and the NFC flash controller 30.
Further, the PRD form sees the following form shown in 1:
Table 1
| Sync?Flag |
| Data?Block?Address |
Further, the Sync Flags in the PRD form sees the following form shown in 2:
Table 2
| Bits | Description |
| 31∶7 | Resv |
| 6∶4 | Flash?Channel |
| 3 | NFC?Rd?Done |
| 2 | NFC?Wr?Done |
| 1 | SATA?Rx?Request |
| 0 | SATA?Tx?Done |
Wherein:
Flash Channel: the sheet choosing that corresponds to 32 NAND Flash (flash memory) 40;
After NFC Rd Done:DMA 302 accomplished read data, the 2nd Trigger module 301 can be with this mark position 1;
After NFC Wr Done:DMA 302 accomplished write data, the 2nd Trigger module 301 can be with this mark position 1;
SATA Rx Reques:SATA controller 20 is behind the write order that receives Host main frame 10, and a Trigger module 201 is with this mark position 1;
After SATA Tx Done:DMA 202 received the data that Host main frame 10 sends over fully, a Trigger module 201 was with this mark position 1.
Further; Data Block Address in the PRD form; Be the buffer zone first address that reads and writes data, a Trigger module 201, the 2nd Trigger module 301 are resolved these addresses, and are sent to corresponding D MA 202, DMA 302 respectively; To this address read/write data, this address is 32 bit lengths by DMA 202, DMA 302.
The form of this Data Block Address sees the following form shown in 3:
Table 3
Wherein
Data Block (data block):
Be the reading and writing data buffer zone between SATA controller 20 and the NFC flash controller 30, its first address is provided by PRD Data Block Address.
As shown in Figure 3, be the hardware structure diagram of Trigger module of the present invention.
The Signal In signal triggering of 1, the one Trigger module 201 is hardware detection, need not to produce to interrupt;
2; When the Signal In signal of the one Trigger module 201 is triggered; The one Trigger module 201 is resolved PRD Sync Flags and Data Block Address; The 2nd Trigger module 301 is resolved SATA Tx Done and SATA Rx Request among the SyncFlags, and a Trigger module 201 is resolved NFC Rx Done and NFC Wr Done among the SyncFlags:
2.1 if SATA Tx Done is bit 1, expression NFC flash controller 30 need be written to the data among the Data Block among the Nand Flash (flash memory) 40;
2.2 if NFC Wr Done is bit 1, expression SATA controller 20 needs to accomplish to host main frame 10 transmit statuss;
2.3 if SATA Rx Request is bit 1, expression NFC flash controller 30 need be from Nand Flash (flash memory) 40 reading of data to Data Block;
2.4 if NFC Rd Done is bit 1, expression SATA controller 20 need send to Host main frame 10 with data among the DataBlock.
As shown in Figure 4, be the process flow diagram flow chart of writing that the present invention is based between machine-processed SATA controller of SYNC and flash controller.
In conjunction with Fig. 1,2, describe the process of writing of Host main frame 10 in detail:
Step 401, Host main frame 10 sends write order;
Step 402, SATA controller 20 are received write order and resolve this order that SATA controller 20 is filled in corresponding Flash Channel, Data Block Address in PRD then;
Step 403; DMA 202 receives the Host data, and is written in the buffer zone of Data Block, after the completion; The SATA TX Done of Sync Flags among the one Trigger module 201 set PRD, the Signal Out signal of a Trigger module 201 NFC flash controller 30 of giving notice;
Step 404; The Signal In of the 2nd Trigger module 301 is triggered; The 2nd Trigger module 301 is resolved Flash Channel, SATA Tx Done and the DATA BlockAddress of Sync Flags among the PRD; Form one and write Nand Flash command description symbol, give corresponding DMA 302;
Step 405, DMA 302 is reading of data from Data Block, and is written among the Nand Flash (flash memory) 40;
Step 406, DMA 302 completion data are write fashionable, the NFC Wr Done of Sync Flags among the 2nd Trigger module 301 set PRD, the Signal Out signal of the 2nd Trigger module 301 sends, and notice SATA controller 20 write orders are accomplished;
Step 407, the Signal In of a Trigger module 201 is triggered, and a Trigger module 201 is resolved the NFC Wr Done of Sync Flags among the PRD;
Step 408 is accomplished to Host main frame 10 and is sent completion status.
As shown in Figure 5, be to the present invention is based on the SATA controller of SYNC mechanism and the read procedure process flow diagram between flash controller.
In conjunction with Fig. 1,2, describe the read procedure of Host main frame 10 in detail:
Step 501, Host main frame 10 sends read command;
Step 502; SATA controller 20 is received read command and resolve command; SATA controller 20 is filled in corresponding Flash Channel in PRD then; Data Block Address, and the SATA Rx Request of Sync Flags among the set PRD, the Signal Out signal of a Trigger module 201 NFC flash controller 30 of giving notice;
Step 503; The Signal In of the 2nd Trigger module 301 is triggered; The 2nd Trigger module 301 is resolved Flash Channel, SATA Rx Done and the DATA BlockAddress of Sync Flags among the PRD; Form one and read Nand Flash command description symbol, give corresponding DMA 302;
Step 504, DMA 302 is from Nand Flash (flash memory) 40 sense datas, and is written among the Data Block;
Step 505, when DMA 302 completion data are read, the NFC Rd Done of Sync Flags among the 2nd Trigger module 301 set PRD, the Signal Out signal of the 2nd Trigger module 301 sends, and 20 read commands of notice SATA controller are accomplished;
Step 506, the Signal In of a Trigger module 201 is triggered, and a Trigger module 201 is resolved the NFC Rd Done of Sync Flags among the PRD;
This programme need not interruption generating and software participant status and inquires about through the read-write operation of the automatic SYNC SATA of hardware Trigger and flash controller, has realized that data transmit between SATA and NFC, thereby has improved the data transmission rate of SATA interface solid hard disk.
Certainly; The present invention also can have other various embodiments; Under the situation that does not deviate from spirit of the present invention and essence thereof; Those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (10)
1. one kind based on the SATA controller of SYNC mechanism and the transmitting device between flash controller; Be applied to the data transmission between the SATA controller and flash controller in the solid state hard disc; It is characterized in that, comprising: be arranged at a Trigger module on the said SATA controller, the 2nd Trigger module on the said flash controller is set;
A said Trigger module, said the 2nd Trigger module adopt the PRD form to realize the data transmission between said SATA controller and the said flash controller.
2. transmitting device according to claim 1 is characterized in that, also comprises: a data block is the reading and writing data buffer zone between said SATA controller and the said flash controller.
3. transmitting device according to claim 2 is characterized in that, said SATA controller receives the write order that main frame sends, and resolves this write order, obtains the first address of said reading and writing data buffer zone; The DMA of said SATA controller is from host receiving data, and is written to said reading and writing data buffer zone; After writing completion, a said Trigger module is sent the said flash controller of signalisation; Said the 2nd Trigger module is obtained the first address of said reading and writing data buffer zone, and is sent to the DMA of said flash controller; The DMA of said flash controller is from said reading and writing data buffer zone reading of data, and is written in the flash memory; After the DMA of said flash controller write completion, said the 2nd Trigger module was sent the said SATA controller of signalisation write order and is accomplished; A said Trigger module is sent completion status to main frame.
4. according to claim 2 or 3 described transmitting devices, it is characterized in that said SATA controller receives the read command that main frame sends, and resolves this read command, obtains the first address of said reading and writing data buffer zone; A said Trigger module is sent the said flash controller of signalisation; Said the 2nd Trigger module is obtained the first address of said reading and writing data buffer zone, and is sent to the DMA of said flash controller; The DMA of said flash controller reading of data from flash memory, and be written in the said reading and writing data buffer zone; After accomplishing reading of data, said the 2nd Trigger module is sent the read command of the said SATA controller of signalisation and is accomplished; A said Trigger module starts the DMA of said SATA controller, reading of data from said reading and writing data buffer zone, and send to main frame.
5. according to claim 1,2 or 3 described transmitting devices, it is characterized in that said flash controller is the NFC flash controller.
6. one kind based on the SATA controller of SYNC mechanism and the transmission method between flash controller, is applied to the data transmission between the SATA controller and flash controller in the solid state hard disc, it is characterized in that, comprising:
Step 1 is provided with a Trigger module on said SATA controller, the 2nd Trigger module is set on said flash controller;
Step 2, a said Trigger module, said the 2nd Trigger module adopt the PRD form to realize the data transmission between said SATA controller and the said flash controller.
7. transmission method according to claim 6 is characterized in that, in the said step 1, also comprises:
One data block is the reading and writing data buffer zone between said SATA controller and the said flash controller.
8. transmission method according to claim 7 is characterized in that, in the said step 2, also comprises: the process of writing of main frame, specifically:
Said SATA controller receives the write order that main frame sends, and resolves this write order, obtains the first address of said reading and writing data buffer zone;
The DMA of said SATA controller is from host receiving data, and is written to said reading and writing data buffer zone;
After writing completion, a said Trigger module is sent the said flash controller of signalisation;
Said the 2nd Trigger module is obtained the first address of said reading and writing data buffer zone, and is sent to the DMA of said flash controller;
The DMA of said flash controller is from said reading and writing data buffer zone reading of data, and is written in the flash memory;
After the DMA of said flash controller write completion, said the 2nd Trigger module was sent the said SATA controller of signalisation write order and is accomplished;
A said Trigger module is sent completion status to main frame.
9. according to claim 7 or 8 described transmission methods, it is characterized in that, in the said step 2, also comprise: the read procedure of main frame, specifically:
Said SATA controller receives the read command that main frame sends, and resolves this read command, obtains the first address of said reading and writing data buffer zone;
A said Trigger module is sent the said flash controller of signalisation;
Said the 2nd Trigger module is obtained the first address of said reading and writing data buffer zone, and is sent to the DMA of said flash controller;
The DMA of said flash controller reading of data from flash memory, and be written in the said reading and writing data buffer zone;
After accomplishing reading of data, said the 2nd Trigger module is sent the read command of the said SATA controller of signalisation and is accomplished;
A said Trigger module starts the DMA of said SATA controller, reading of data from said reading and writing data buffer zone, and send to main frame.
10. according to claim 6,7 or 8 described transmission methods, it is characterized in that in the said step 2, said flash controller is the NFC flash controller.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110455562.1A CN102591825B (en) | 2011-12-30 | 2011-12-30 | Transmitting device and method between SATA (Serial Advanced Technology Attachment) controller and flash controller based on SYNC mechanism |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110455562.1A CN102591825B (en) | 2011-12-30 | 2011-12-30 | Transmitting device and method between SATA (Serial Advanced Technology Attachment) controller and flash controller based on SYNC mechanism |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102591825A true CN102591825A (en) | 2012-07-18 |
| CN102591825B CN102591825B (en) | 2014-12-03 |
Family
ID=46480507
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110455562.1A Active CN102591825B (en) | 2011-12-30 | 2011-12-30 | Transmitting device and method between SATA (Serial Advanced Technology Attachment) controller and flash controller based on SYNC mechanism |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102591825B (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108549610A (en) * | 2018-03-27 | 2018-09-18 | 深圳忆联信息系统有限公司 | A kind of implementation method and solid state disk of NVMe extensions |
| CN109375870A (en) * | 2018-09-18 | 2019-02-22 | 深圳忆联信息系统有限公司 | A kind of method and its system for accelerating SSD main control chip D2H to read without mapping |
| CN109508149A (en) * | 2018-11-10 | 2019-03-22 | 苏州韦科韬信息技术有限公司 | Data transmission method and solid-state hard disk controller |
| CN109766295A (en) * | 2018-12-30 | 2019-05-17 | 中孚信息股份有限公司 | A kind of high-speed data unidirectional transmission method and device |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070263649A1 (en) * | 2006-05-12 | 2007-11-15 | Genti Cuni | Network diagnostic systems and methods for capturing network messages |
| CN201498216U (en) * | 2009-09-25 | 2010-06-02 | 浪潮电子信息产业股份有限公司 | Eight-channel SOC control chip for solid state disk |
| US20100228899A1 (en) * | 2005-07-04 | 2010-09-09 | Po-Ching Lu | Channel activating method and peripheral device performing the same |
| CN102096559A (en) * | 2011-01-26 | 2011-06-15 | 浪潮电子信息产业股份有限公司 | Method for improving data transmission efficiency of SATA interface solid state disk |
-
2011
- 2011-12-30 CN CN201110455562.1A patent/CN102591825B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100228899A1 (en) * | 2005-07-04 | 2010-09-09 | Po-Ching Lu | Channel activating method and peripheral device performing the same |
| US20070263649A1 (en) * | 2006-05-12 | 2007-11-15 | Genti Cuni | Network diagnostic systems and methods for capturing network messages |
| CN201498216U (en) * | 2009-09-25 | 2010-06-02 | 浪潮电子信息产业股份有限公司 | Eight-channel SOC control chip for solid state disk |
| CN102096559A (en) * | 2011-01-26 | 2011-06-15 | 浪潮电子信息产业股份有限公司 | Method for improving data transmission efficiency of SATA interface solid state disk |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108549610A (en) * | 2018-03-27 | 2018-09-18 | 深圳忆联信息系统有限公司 | A kind of implementation method and solid state disk of NVMe extensions |
| CN109375870A (en) * | 2018-09-18 | 2019-02-22 | 深圳忆联信息系统有限公司 | A kind of method and its system for accelerating SSD main control chip D2H to read without mapping |
| CN109508149A (en) * | 2018-11-10 | 2019-03-22 | 苏州韦科韬信息技术有限公司 | Data transmission method and solid-state hard disk controller |
| CN109766295A (en) * | 2018-12-30 | 2019-05-17 | 中孚信息股份有限公司 | A kind of high-speed data unidirectional transmission method and device |
| CN109766295B (en) * | 2018-12-30 | 2023-03-14 | 中孚信息股份有限公司 | High-speed data unidirectional transmission method and device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102591825B (en) | 2014-12-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2019053725A5 (en) | ||
| CN107092835B (en) | Computer data encryption device and method for virtual storage disk | |
| US20150058701A1 (en) | Flash memory controller and method of data transmission between flash memories | |
| WO2014086085A1 (en) | Control apparatus and control method for multi-channel flash memory card | |
| CN102298508B (en) | Stream-based method and device for prereading solid state disk | |
| US20160330283A1 (en) | Data Storage Method and Network Interface Card | |
| CN102591825B (en) | Transmitting device and method between SATA (Serial Advanced Technology Attachment) controller and flash controller based on SYNC mechanism | |
| JP2015525398A5 (en) | ||
| US20170235689A1 (en) | Method, apparatus, communication equipment and storage media for determining link delay | |
| US20150100745A1 (en) | Method and apparatus for efficiently processing storage commands | |
| CN104252420A (en) | Data writing method and memory system | |
| CN103530236A (en) | Method and device for obtaining hybrid hard disk | |
| US10976960B2 (en) | Methods of synchronizing memory operations and memory systems employing the same | |
| CN103501353A (en) | Data relay transmission method, device and system | |
| JP2011509443A5 (en) | ||
| US20150242160A1 (en) | Memory system, control method of memory system, and controller | |
| KR20130009536A (en) | Memory control device and method | |
| US9965183B2 (en) | Method for processing data in storage device and storage device | |
| KR20180084518A (en) | Memory device, memory system including the same, and repair operation thereof | |
| EP3822797A3 (en) | Operation method of system-on-chip configured to control memory device | |
| CN100570589C (en) | HDD and SDRAM Data Transmission Control Unit and data transmission method | |
| US20080104307A1 (en) | Multi-sector to single-sector request mapping | |
| CN102063269B (en) | Method and system for realizing communication of double controllers of disk array | |
| CN104317750B (en) | A kind of storage medium structure that can independently stack connection | |
| CN103744613A (en) | I/O writing delay reducing system and method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |