CN102591404A - Switching method of SoC (system on chip) system dynamic clock - Google Patents
Switching method of SoC (system on chip) system dynamic clock Download PDFInfo
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- CN102591404A CN102591404A CN2011100095046A CN201110009504A CN102591404A CN 102591404 A CN102591404 A CN 102591404A CN 2011100095046 A CN2011100095046 A CN 2011100095046A CN 201110009504 A CN201110009504 A CN 201110009504A CN 102591404 A CN102591404 A CN 102591404A
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Abstract
The invention provides a switching method of an SoC (system on chip) system dynamic clock. By using the interrupt service routines and the mode of software and hardware combination, the method completes the dynamic switching of the clock in the process of the stable operation of the SoC system. The hardware part uses three function registers, including a clock enabling register, a clock switching register and a clock stably interrupting register. At the same time, each clock source is provided with a corresponding counter to count and ensure stable time of a newly started clock in the system. The method provided by the invention can complete the dynamic clock switching with high reliability while meeting requirements of the SoC system in low-power consumption, high reliability and dynamic execution.
Description
Technical field
The present invention relates to a kind of clock-switching method, relate in particular to a kind of changing method of SoC system dynamics clock.
Background technology
Along with development of semiconductor, arriving widely of SoC (System on a Chip system level chip) technology used.Increasing SoC on-chip system chip adopts two or more clock source in the current application, and clock source blocked operation can often occur.The clock source switches in need take into account low-power consumption, high reliability in the system applies, can dynamically carry out three aspect problems.
Low power dissipation design is the basic demand of SoC design, and in clock origin system for a long time, except that the clock source of working, other clock source all should be in standby (awaiting orders) state.Before clock switches, should earlier the clock source of preparing to switch be opened and await orders.Simultaneously, high reliability also is the basic demand of SoC system, after open in a clock source, needs certain hour can export stable clock.Before clock stable, be not allow the system that offers to use.When clock switched, it was basic performance requirement that the clock switching can dynamically be carried out.When system carries out other operation, can intert and accomplish the clock switching.Can alleviate the difficulty of software development like this, reduce the complicacy of chip design.
Based on low-power consumption in the above-mentioned SoC system, high reliability and the three part demands that can dynamically carry out, the present invention provides a kind of SoC system dynamics clock-switching method of novelty, when ensureing that above-mentioned three parts require, satisfies the demand that clock switches.
Summary of the invention
The object of the invention provides a kind of SoC system dynamics clock-switching method, utilizes interrupt service routine, and the mode that adopts software and hardware to combine is accomplished the dynamic switching of clock in SoC system stable operation process.
Hardware components adopts three special function registers, is respectively clock enable register, clock switching register and clock stable interrupt register.Simultaneously, each clock source is provided with a corresponding clock source and stablizes counter in the system, is used for counting the stabilization time of the clock that assurance newly opens.
Its realization flow is:
(1) the clock enable register is set, and its clock is set enables significance bit;
(2) system internal clock source is set and stablizes counter, the self-clock source begins counting when opening, and the full back of counting clock stable interrupt register puts 1;
(3) after the clock stable interrupt register puts 1, send look-at-me, get into interrupt service routine;
(4) switch the register setting according to clock, close the clock source before switching;
(5) withdraw from interrupt service routine, the stable operation of present clock source.
Can satisfy the SoC system under low-power consumption, high reliability and the demand that can dynamically carry out through content provided by the invention, the dynamic clock of accomplishing high reliability switches.
Description of drawings
Fig. 1 SoC system dynamics provided by the invention clock-switching method basic flow sheet
Specific embodiments
Below in conjunction with accompanying drawing scheme provided by the invention is carried out detailed description.Suppose that current SoC system has A, two sheet internal clocks of B source:
The clock enable register is set:
Bit0 is an A clock source enable bit, and is effectively high; Bit1 is a B clock source enable bit, and is effectively high.
Clock source A is set stablizes counter: when self-clock source A opens, begin counting, after counting was full, clock stable interrupt register bit0 put 1.
Clock source B is set stablizes counter: when self-clock source B opens, begin counting, after counting was full, clock stable interrupt register bit1 put 1.
The clock stable interrupt register is set:
Bit0 is that 1 expression clock source A is stable; Bit1 is that 1 expression clock source B is stable.
Clock is set, and to switch register: bit0 be that to select clock source A, bit0 for use be that clock source B is selected in 1 expression for use in 0 expression.When clock switches register from 0 when 1 changes, perhaps clock switches register from 1 when 0 changes, and clock switches and produces.
Supposing current is clock source A in work, switch to clock source B, with reference to basic flow sheet:
At first open the enable bit of clock source B, wait for the stable interruption of clock source B.Get into the stable service routine that interrupts of clock source B.
Putting clock switching register bit0 is 1, switches to clock source B, closes the enable bit of clock source A, and successfully A switches to clock source B to system clock from the clock source,
Clear clock stable interrupt register with the stable interrupt bit zero clearing of clock source B, withdraws from interrupt service routine.
Claims (4)
1. SoC system dynamics clock-switching method is characterized in that adopting being provided with that each clock source is provided with the implementation that counter is stablized in a corresponding clock source in three function registers and the system, and implementation step is:
(1) the clock enable register is set, and its clock is set enables significance bit;
(2) system internal clock source is set and stablizes counter, the self-clock source begins counting when opening, and the full back of counting clock stable interrupt register puts 1;
(3) after the clock stable interrupt register puts 1, send look-at-me, get into interrupt service routine;
(4) switch the register setting according to clock, close the clock source before switching;
(5) withdraw from interrupt service routine, the stable operation of present clock source.
2. a kind of SoC system dynamics clock-switching method as claimed in claim 1 is characterized in that said three function registers are respectively: clock enable register, clock switch register and clock stable interrupt register.
3. a kind of SoC system dynamics clock-switching method as claimed in claim 1, it is corresponding one by one with system clock source to it is characterized in that counter is stablized in the clock source.
4. a kind of SoC system dynamics clock-switching method as claimed in claim 1 is characterized in that said clock switches register and when the level saltus step, produces the clock switching.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011100095046A CN102591404A (en) | 2011-01-17 | 2011-01-17 | Switching method of SoC (system on chip) system dynamic clock |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011100095046A CN102591404A (en) | 2011-01-17 | 2011-01-17 | Switching method of SoC (system on chip) system dynamic clock |
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| CN102591404A true CN102591404A (en) | 2012-07-18 |
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| CN2011100095046A Pending CN102591404A (en) | 2011-01-17 | 2011-01-17 | Switching method of SoC (system on chip) system dynamic clock |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105607687A (en) * | 2015-12-22 | 2016-05-25 | 上海爱信诺航芯电子科技有限公司 | Anti-bypass attack clock crosstalk realization method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020104032A1 (en) * | 2001-01-30 | 2002-08-01 | Mazin Khurshid | Method for reducing power consumption using variable frequency clocks |
| CN1661576A (en) * | 2004-02-25 | 2005-08-31 | 中国科学院计算技术研究所 | Dynamic frequency conversion device of bus in high speed and kermel interface of processor under SOC architecture |
| CN101902321A (en) * | 2010-08-13 | 2010-12-01 | 中兴通讯股份有限公司 | Clock management method and system |
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2011
- 2011-01-17 CN CN2011100095046A patent/CN102591404A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020104032A1 (en) * | 2001-01-30 | 2002-08-01 | Mazin Khurshid | Method for reducing power consumption using variable frequency clocks |
| CN1661576A (en) * | 2004-02-25 | 2005-08-31 | 中国科学院计算技术研究所 | Dynamic frequency conversion device of bus in high speed and kermel interface of processor under SOC architecture |
| CN101902321A (en) * | 2010-08-13 | 2010-12-01 | 中兴通讯股份有限公司 | Clock management method and system |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105607687A (en) * | 2015-12-22 | 2016-05-25 | 上海爱信诺航芯电子科技有限公司 | Anti-bypass attack clock crosstalk realization method |
| CN105607687B (en) * | 2015-12-22 | 2018-06-19 | 上海爱信诺航芯电子科技有限公司 | A kind of clock crosstalk implementation method of anti-bypass attack |
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Application publication date: 20120718 |