CN100365543C - Frequency energy-saving method of kernel dynamic adjusting processor - Google Patents
Frequency energy-saving method of kernel dynamic adjusting processor Download PDFInfo
- Publication number
- CN100365543C CN100365543C CNB2006100497683A CN200610049768A CN100365543C CN 100365543 C CN100365543 C CN 100365543C CN B2006100497683 A CNB2006100497683 A CN B2006100497683A CN 200610049768 A CN200610049768 A CN 200610049768A CN 100365543 C CN100365543 C CN 100365543C
- Authority
- CN
- China
- Prior art keywords
- frequency
- kernel
- processor
- time period
- energy
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Abstract
The present invention discloses an energy saving method for dynamically adjusting processor frequency by using a kernel of an operating system. The energy saving method sets corresponding running frequency through a dynamic frequency management technique to save energy after adopting the step that the kernel collects system information in running time; the energy saving method saves energy through the control capability of the kernel of an operating system to the whole system and the instant awareness of a performance monitor to the performance of the operating system. According to the collection of the operating system performance by the performance monitor in a time period in running time, the operating system carries out corresponding configuration on the processor by using the dynamic frequency management technique and sets the running frequency which is more favorable for the energy saving of the system. The present invention provides a method for dynamically adjusting processor frequency by using the kernel, which is an improvement to the original method for saving energy. The frequency adjustment of the processor by the kernel is more flexible and more efficient, and consumed energy can be reduced when the system runs.
Description
Technical Field
The present invention relates to a method for saving power for a kernel of an operating system, and more particularly, to a method for saving power for a kernel to dynamically adjust a processor frequency.
Background
The continuous and steady growth of the world semiconductor industry in 2005 will drive the further development of the global electronic information product market, and the fields of communication, consumer electronics and automotive electronics will become the lead. Various new applications such as video multimedia for 3G handsets have placed higher demands and more severe challenges on traditional battery life and power management techniques. Moreover, with the rapid development of the automobile industry in China, the technical problem of power supply in automobile electronics is also forcing engineers to find better solutions. High working frequency, high efficiency, high power density, high reliability, small volume, low cost and the like are development directions of module power supplies and portable power supply management products in the future. Meanwhile, the industry is expecting further breakthroughs in various advanced technologies, including high frequency switching technology, soft switching technology, power factor correction technology, synchronous rectification technology, intelligent technology and surface mounting technology. Therefore, any device has placed higher demands on power supply technology based on its own unique nature and the higher demand for it by the market.
With the continuous improvement of the living standard of people, the development of portable equipment will be faster and faster. The portable consumer electronic device market has grown in recent years, and particularly, the mobile phone market has been rapidly developed, so that many manufacturers are more and more interested. With the increasing demand of users, the newly added functions of audio and video, data input, wireless connection and the like in smart phones and portable devices form new demands on power management. The increasing abundance of functionality in portable products presents increasing challenges to power management ICs. In the future, power management will be developed towards high integration level, switch and SOC, the development of power management IC is a comprehensive development system integrating design, process and packaging, and various factors need to be considered. It is difficult to have a complete solution. For example, in a wireless portable product, the relationship between the improvement of the switching frequency and the efficiency is balanced, and the interference of the power noise to the radio frequency is also considered.
In the field of power management of portable embedded devices, the current difficulty is to meet the requirements of a portable terminal on power supply, and to achieve small occupied space, light weight and longer power supply time. Nowadays, the functions of embedded devices become more and more powerful, and the functions are more and more abundant. With the increasing functions of embedded devices, the energy demand of users on batteries of embedded devices is also increasing, and the existing lithium ion batteries are becoming more difficult to meet the requirements of consumers on normal use time. In contrast, two approaches are mainly adopted in the industry, one is to develop a novel battery technology with higher energy density, such as a fuel cell, and the battery technology cannot be greatly broken through within the foreseeable 5 years; secondly, the energy conversion efficiency and the energy saving of the battery are improved. With the current state of the art in which new high-power battery technologies (e.g., fuel cells) are still immature, power management in next-generation handheld devices can only begin with both increased power utilization and reduced power consumption. How to prolong the service life of the battery and minimize the consumption of battery energy has become a hot research point in the embedded field.
In the field of operating systems, the main power management method at present is to dynamically adjust the frequency of a system processor and a bus by using an operating system kernel, so as to reduce the overall energy consumption of the system. And the system can change the system state through the dynamic frequency instruction, and is in a low power consumption state, so that the aim of saving energy is fulfilled.
The operating system can well manage the energy consumption of the whole system, but is not aware of specific applications, cannot adopt a proper method for energy conservation aiming at the specific applications, can make better system resource scheduling in a specific running time period, and lacks of quick response to the running system.
Disclosure of Invention
The invention aims to provide an energy-saving method for dynamically adjusting processor frequency by a kernel.
The technical scheme adopted by the invention for solving the technical problems is as follows:
1) Collecting system information in different time periods to obtain the target frequency:
when a system runs, a kernel collects system original data in different time periods through a performance monitoring unit PMU in the system, wherein the system original data comprises the number of system execution instructions, the clock period in the time period and the cache miss frequency in the time period to obtain the efficiency of the performance of a processor;
2) Interoperate directly with the registers:
the kernel obtains whether dynamic frequency modulation is needed or not by comparing the existing frequency with the target frequency, the kernel adjusts the frequency by directly carrying out interactive operation with a frequency register of a control processor, and the frequency modulation result can be seen after the frequency is adjusted without calling an intermediate process;
3) And (3) dynamic frequency modulation management:
in the step, the kernel dynamically adjusts the running frequency of the system processor according to the fast cache failure number, and the frequency change is realized by directly carrying out interactive operation with the frequency register of the control processor in the step 2), so that the data processing capacity and the data transmission capacity of the processor are matched;
in the running process of a program, the kernel dynamically adjusts the frequency of the system by utilizing a dynamic frequency modulation technology according to the efficiency of the performance of the processor, the average number of executing instructions when each cache miss occurs in a time period, the average number of executing instructions per microsecond in the time period, the reduction ratio which can be tolerated by the system and reference data according to the partition defined by the kernel, so that the idle time of the processor is reduced, and the energy consumption wasted by the processor is reduced;
after the dynamic frequency modulation, the system continues to operate, and the operation of the step 1) is continued in the next time period, so that the real-time adjustment is realized, and the process is a cyclic process.
The partitions are divided by the exponential growth of the kernel and are divided into 29 partitions.
Compared with the background technology, the invention has the beneficial effects that:
the present invention utilizes the control capability of the whole system and the performance monitor to immediately know the performance of the operating system by utilizing the operating system kernel to save energy. The kernel of the operating system collects the performance of the operating system according to the performance monitor in a certain time period during the operation, then carries out corresponding configuration on the processor through a dynamic frequency management technology, sets the operation frequency which is more beneficial to the energy saving of the system, and then the kernel of the operating system continues the process according to the information collected by the performance monitor in the next adjacent time period.
(1) And (4) dynamic property. When the system runs, the kernel of the operating system analyzes the information according to the system performance information collected in a time period, and then dynamically and immediately adjusts the frequency of the system.
(2) And (5) effectiveness. The operating system kernel modifies the processor frequency by directly interacting with the operating system register without calling an intermediate process, and the method is more direct and more effective, and the frequency modulation result can be seen immediately after the frequency is adjusted.
(3) And (4) instantaneity. Within a definable time period, the system kernel can make frequency modulation reaction to the processor according to the information collected by the performance monitoring unit, and the frequency modulation result can be immediately embodied. After repeated authentication, the method can well achieve the result of dynamic frequency modulation, and the aim of energy conservation is achieved.
Drawings
FIG. 1 is a level division of the number of fast cache misses;
FIG. 2 is a system implementation of the present invention;
fig. 3 is a flow chart of the present invention.
Detailed Description
In a specific implementation mode, in a time period, a performance monitor obtains required information by monitoring system performance, obtains a target frequency meeting system operation and achieving a better energy-saving effect by calculation and judgment, and enables a processor to operate on the target frequency by setting a processor register. The complete operation process of the whole system after the invention is added is shown in fig. 2, the process of the flow chart of the invention is shown in fig. 3, the invention is an improvement of the energy-saving method of the kernel, and the process is explained in more detail below.
In the first step, the kernel acquires the target frequency by collecting system information. Two performance monitoring counters PMN0 and PMN1 are arranged in an operating system and used for counting certain type of events of the system, the monitored events are set in a register PMNC, when the PMN0 and the PMN1 overflow, the system generates an interrupt, the PMNC is a 32-bit register and can carry out zeroing operation on all the counters and also can set the events to be monitored by the PMN0 and the PMN1, the two counters can monitor instruction missing, instruction cache TLB missing, data cache TLB missing and execution finger instruction missing of an external access finger, instruction cache TLB missing and execution finger missingMake a number ofThe processor comprises 16 events including data cache access of cache operation, data cache missing of the cache operation and the like, and in addition, a clock counter CCNT is arranged in the processor and used for calculating the number of clocks in a certain period of time. Now, the system kernel can obtain system information such as the number of instructions executed by the system in a certain period of time, the total clock ticks in the period of time, the cache miss times in the period of time, and the like, so that the kernel can obtain the required target frequency according to the values. From the values obtained, it is possible to calculate
Where instructions represent the number of instructions executed by the system during a time period, ticks represents the total number of clocks during the time period,efficiency, which represents processor performance, may also be obtainedWhere cachemisses denotes the number of cache misses in a time period,
the degree of memory bound for a given processor is indicated. So every time, the kernel will read the values of the following three events: the number of processor clocks, the number of instructions executed, and the number of times a cache miss occurs. From these three values, the kernel can calculate the elapsed time during this time,
andwhere cycle represents the number of cycles in a time period and microsecond represents the number of microseconds in a time period, then calculated according to the following equations, respectively:
wherein avgsnspercachemss on the left of the equal sign indicates a value used for comparison in the next step as an average number of executed instructions per cache miss occurring in the current time period, avgsnspercachemss on the right of the equal sign indicates an average number of executed instructions per cache miss occurring in the previous n time periods, currentinstnscercachemss indicates an average number of executed instructions per microsecond in the current time period actually obtained in the current time period, avgsnspersec on the left of the equal sign indicates a value used for comparison by the kernel as an average number of executed instructions per microsecond in the next time period, avgsnspercachemss on the right of the equal sign indicates an average number of executed instructions per microsecond in the previous n time periods actually obtained in the current time period, currentinstnscachemmis represents an average number of executed instructions per microsecond in the current time period, and the kernel sets n to 8. The algorithm for selecting the target frequency can be described as f: (maxSlowdown, avgsnpercachemiss) α frequency.f. expression functionNumber, maxSlowdown indicates the maximum allowed deceleration of the system, frequency indicates the system frequency, that is to say the value of the reduction from the maximum tolerable speed and
to obtain the minimum frequency. The calculation is based on the performance deceleration theory, and a new value, performance, is obtained according to the current system frequency (f，c) = lastlnsipperseverpiece, where f denotes processor frequency, c denotes efficiency of data caching, lastlnsipperspiece denotes last time periodNumber of instructions executed per microsecond. For performance (f0，c0) And performance (f1，c1) If c0= c1, the deceleration result of the frequency change to f0 at the time of the cache efficiency c0 can be approximately evaluated. Whether the values of the two cache efficiencies are approximately equal, by
The value of (A) is obtained in correspondence with the partition growing exponentially if twice
Is in the same partition, then the kernel considers the two caching efficiencies to be approximately equal. The kernel divides it into 29 partitions, as shown in fig. 1, and there is no particular reason to choose this number, but it is sufficient to differentiate the cache efficiency of program behavior. The partition to the left may be considered a processor that has many memory accesses due to a data cache miss, and the partition to the right may be considered a processor that has little to no data cache misses. The kernel needs to set a tolerable deceleration value, and the convention is only that
tolerable _ slowdown represents the deceleration value that the system can tolerate, f represents the frequency that can be used as the target frequency, f now Representing the current frequency, the generic kernel sets tolerable _ slowdown to 8%. Through these calculations, the system kernel can obtain the desired destination frequency. To summarize, only the minimum frequencies with approximately equal buffering efficiency can be used to replace the current frequencies. This process corresponds to the first three steps in fig. 3.
And secondly, setting the target frequency. And the kernel directly configures a register CCCR for controlling the frequency in the system according to the obtained target frequency, and configures an FCS bit of the register CCLKCFG after modification so as to enable the frequency setting of the kernel to be effective. The kernel directly modifies the register through the address, so when the register is operated through the address, the translation of the real address and the virtual address needs to be noticed, and different translation modes can be provided according to the kernel version and the difference of the processor. This process corresponds to the frequency modulation process in fig. 3.
And thirdly, the system continues to operate, the operation is continued in the next time period, real-time adjustment is realized, and the kernel obtains different target frequencies according to the change of the system information in each time period and dynamically changes the target frequencies so as to achieve the aim of saving energy. That is, the system continuously and circularly executes the process, and continuously corrects the frequency of the current processor, so that the energy-saving purpose is achieved. This process corresponds to the last process in fig. 3, i.e. the loop execution.
For example: suppose the system kernel now has six sets of data in the format of (frequency _ per _ cache _ miss, instructions _ per _ micro sec ond).
E 1 ＝(400MHZ，117，26.1)E 2 ＝(300MHZ，141，24.5)E 3 ＝(200MHZ，123，22.2)
E 4 ＝(300MHZ，270，45.8)E 5 ＝(200MHZ，254，40.3)E 6 = (400mhz, 318, 63.2) assume 400MHZ as maximum frequency, and currently
140 in partition 2, due to E 4 ，E 5 ，E 6 Is/are as follows
270, 254, 318 are not in partition 2, and E 2 ，E 3 Is/are as follows
141, 123 are both in partition 2, and as previously described, the kernel considers E 1 And E 2 ，E 3 The buffer efficiency is the same, so the buffer efficiency is within the consideration range of the destination frequency. The kernel then estimates the slowdown according to the following calculation:
300MHZ：slowdown＝26.1/24.5-1＝0.065(6.5％)
200MHZ：slowdown＝26.1/22.2-1＝0.176(17.6％).
the core then obtains the target frequency for satisfying the condition, i.e. 300M, by comparing this value with 8%. Then the kernel directly sets the processor register to obtain the purpose of frequency modulation, and then the process is continued in the next time period, so that the dynamic frequency modulation is realized.
Claims (2)
1. An energy-saving method for dynamically adjusting processor frequency by a kernel is characterized in that:
1) Collecting system information in different time periods to obtain the target frequency:
when a system runs, a kernel collects system original data in different time periods through a performance monitoring unit PMU in the system, wherein the system original data comprises the number of system execution instructions, the clock period in the time period and the cache miss frequency in the time period to obtain the efficiency of the performance of a processor;
2) Interoperate directly with the registers:
the kernel obtains whether dynamic frequency modulation is needed or not by comparing the existing frequency with the target frequency, the kernel adjusts the frequency by directly carrying out interactive operation with a frequency register of a control processor, and the frequency modulation result can be seen after the frequency is adjusted without calling an intermediate process;
3) And (3) dynamic frequency modulation management:
in the step, the kernel dynamically adjusts the running frequency of the system processor according to the fast cache failure number, and the frequency change is realized by directly carrying out interactive operation with the frequency register of the control processor in the step 2), so that the data processing capacity and the data transmission capacity of the processor are matched;
in the running process of a program, the kernel dynamically adjusts the frequency of the system by utilizing a dynamic frequency modulation technology according to the efficiency of the performance of the processor, the average execution instruction number when each cache miss occurs in a time period, the average execution instruction number every microsecond in the time period, the separation defined by the kernel, the reduction ratio which can be tolerated by the system and reference data, so that the idle time of the processor is reduced, and the energy consumption wasted by the processor is reduced;
after the dynamic frequency modulation, the system continues to operate, and the operation of the step 1) is continued in the next time period, so that the real-time adjustment is realized, and the process is a cyclic process.
2. The power saving method for dynamically adjusting processor frequency according to claim 1, wherein: the partitions are divided by the exponential growth of the kernel and are divided into 29 partitions.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100497683A CN100365543C (en) | 2006-03-10 | 2006-03-10 | Frequency energy-saving method of kernel dynamic adjusting processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100497683A CN100365543C (en) | 2006-03-10 | 2006-03-10 | Frequency energy-saving method of kernel dynamic adjusting processor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1818829A CN1818829A (en) | 2006-08-16 |
| CN100365543C true CN100365543C (en) | 2008-01-30 |
Family
ID=36918872
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006100497683A Expired - Fee Related CN100365543C (en) | 2006-03-10 | 2006-03-10 | Frequency energy-saving method of kernel dynamic adjusting processor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100365543C (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2008073597A1 (en) * | 2006-12-14 | 2008-06-19 | Intel Corporation | Method and apparatus of power management of processor |
| CN101866213B (en) * | 2010-07-23 | 2012-05-23 | 上海交通大学 | Energy-saving method of embedded system with SPM-DMA (Sequential Processing Machine-Direct Memory Access) structure |
| US10551901B2 (en) * | 2017-07-01 | 2020-02-04 | Microsoft Technology Licensing, Llc | Core frequency management using effective utilization for power-efficient performance |
| CN112558507B (en) * | 2019-09-25 | 2022-03-01 | 北京比特大陆科技有限公司 | Frequency adaptation method and apparatus, data processing device, medium, and product |
| CN114816033A (en) * | 2019-10-17 | 2022-07-29 | 华为技术有限公司 | Frequency modulation method and device of processor and computing equipment |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5630148A (en) * | 1994-06-17 | 1997-05-13 | Intel Corporation | Dynamic processor performance and power management in a computer system |
| JP2002099432A (en) * | 2000-09-22 | 2002-04-05 | Sony Corp | System of computing processing, control method thereof, system for task control, method therefor and record medium |
| WO2004019194A2 (en) * | 2002-08-22 | 2004-03-04 | Nvidia Corporation | Method and apparatus for adaptive power consumption |
| CN1567180A (en) * | 2003-06-18 | 2005-01-19 | 微星科技股份有限公司 | Method for adjusting working frequency of CPU |
| CN1629773A (en) * | 2003-12-15 | 2005-06-22 | 仁宝电脑工业股份有限公司 | Method for dynamically adjusting CPU frequency |
-
2006
- 2006-03-10 CN CNB2006100497683A patent/CN100365543C/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5630148A (en) * | 1994-06-17 | 1997-05-13 | Intel Corporation | Dynamic processor performance and power management in a computer system |
| JP2002099432A (en) * | 2000-09-22 | 2002-04-05 | Sony Corp | System of computing processing, control method thereof, system for task control, method therefor and record medium |
| WO2004019194A2 (en) * | 2002-08-22 | 2004-03-04 | Nvidia Corporation | Method and apparatus for adaptive power consumption |
| CN1567180A (en) * | 2003-06-18 | 2005-01-19 | 微星科技股份有限公司 | Method for adjusting working frequency of CPU |
| CN1629773A (en) * | 2003-12-15 | 2005-06-22 | 仁宝电脑工业股份有限公司 | Method for dynamically adjusting CPU frequency |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1818829A (en) | 2006-08-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101714021B (en) | Computer of hybrid system | |
| US8479028B2 (en) | Techniques for communications based power management | |
| US7272730B1 (en) | Application-driven method and apparatus for limiting power consumption in a processor-controlled hardware platform | |
| US9411390B2 (en) | Integrated circuit device having power domains and partitions based on use case power optimization | |
| Viredaz et al. | Energy Management on Handheld Devices: Whatever their origin, all handheld devices share the same Achilles heel: the battery. | |
| CN100365543C (en) | Frequency energy-saving method of kernel dynamic adjusting processor | |
| US20090031156A1 (en) | Electronic Apparatus and Method of Conserving Energy | |
| CN100547520C (en) | The method for managing power supply of computer system and computer system | |
| CN103092701A (en) | Communication method, communication device and electronic device | |
| CN1599320A (en) | Device and method for realizing remote control dormancy and wake-up in radio network | |
| CN100377042C (en) | Method for saving energy by optimizing running frequency through combination of static compiler and dynamic frequency modulation techniques | |
| CN101634886A (en) | Electronic device | |
| Stangaciu et al. | Energy efficiency in real-time systems: A brief overview | |
| Xiang et al. | Run-time management for multicore embedded systems with energy harvesting | |
| CN101661304B (en) | Computer and input equipment sharing method thereof | |
| CN101604198B (en) | Method for reducing power consumption of embedded system | |
| CN107318154A (en) | Low power consumption method based on Lora communicators | |
| CN111542102A (en) | ZigBee-WiFi cooperative wireless local area network terminal equipment energy-saving system and using method thereof | |
| Wu et al. | Revisiting the System Energy Footprint and Power Efficiency on the Way to Sustainable 6G Systems | |
| CN202009430U (en) | Low-power consumption mobile phone | |
| Ljung | Opportunities for energy savings in mobile devices | |
| Sravan et al. | Low power sensor node for a wireless sensor network | |
| CN104503408A (en) | 24-hour intelligent housing system based on ZigBee technology | |
| Guo et al. | Energy-efficient co-scheduling of receiving packets and decoding tasks on mobile video streaming terminals | |
| CN201053870Y (en) | Beidou user receiver low efficacy device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080130 Termination date: 20120310 |