CN102571000B - amplifier and amplifier control method - Google Patents
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- CN102571000B CN102571000B CN201110391581.2A CN201110391581A CN102571000B CN 102571000 B CN102571000 B CN 102571000B CN 201110391581 A CN201110391581 A CN 201110391581A CN 102571000 B CN102571000 B CN 102571000B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
- H03F3/2178—Class D power amplifiers; Switching amplifiers using more than one switch or switching amplifier in parallel or in series
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Abstract
Disclose a kind of class-D amplifier (300), described class-D amplifier (300) comprises modulating stage (110), multiple power stage (130) and power level control circuit (340); Described modulating stage (110) has input (112) for receiving input signal (212) and for providing the output (116) of the input signal (216) of modulation; Each power stage reacts to described modulating stage, and be included in the first switch (132) and the second switch (134) of series coupled between the first voltage source (140) and the second voltage source (150), each power stage is included in the output node (136) between the first switch and second switch; And described power level control circuit (340) is for measuring incoming signal level, and carry out the power stage of enable selected number according to the incoming signal level measured.Also disclose a kind of method controlling this class-D amplifier.
Description
Technical field
The present invention relates to amplifier, relate to class-D amplifier particularly, the power stage that described class-D amplifier comprises modulating stage and reacts for described modulating stage, described modulating stage has the first input for receiving input signal and the output of input signal for generation of modulation; Described power stage is included in the first transistor and the transistor seconds of series coupled between the first voltage source and the second voltage source, and described power stage is included in the output of the Nodes between the first transistor and transistor seconds.
The invention still further relates to the method controlling this amplifier.
Background technology
Sometimes the class-D amplifier being referred to as switching amplifier typically uses two power transistors be connected in series, and make the first power transistor to be outputted to positive voltage source, and the second power transistor will be outputted to negative voltage source.Power transistor is typically controlled by the audio input signal of pulse-width modulation.Class-D amplifier is interested device in low power applications, and reason is the high efficiency compared with the linear class ab ammplifier that class-D amplifier and tradition use.
Shortcoming before class-D amplifier is: in order to extract output signal from the modulation signal amplified, and need the lowpass output filter of relatively high capacity, thus such as in compact design, limit the scope of application of class-D amplifier.But, the people such as P.Muggler are at Proc.Int.Symp.CircuitsandSystems, Vol.1, May2004, disclose in 1036-1039 page: by using bridge-type support structures in conjunction with 3 grades of pulse-width modulation (PWM) schemes and by being used as the low-pass filtering behavior of the magnetic speaker of filter, this filter can being saved in the design of class-D amplifier.
Therefore, in the application of such as mobile communication, class-D amplifier is quite interested in the driver of low-power speaker, and reason is that the class ab ammplifier that class-D amplifier uses than tradition has better power efficiency.
But, still must overcome design challenge, to guarantee that class-D amplifier works as far as possible efficiently.Amplify to optimize signal, the conducting resistance (R of necessary minimum power transistor
on).This can be realized by the size of increasing power transistor.But the result that this size increases but adds the idle losses of power transistor stage, thus reduces the efficiency of class-D amplifier, and if amplifier is battery powered, reduces the life-span of battery.The charging current of power crystal tube grid and discharging current define the overwhelming majority of this loss, and its size with power transistor forms proportional zoom.Therefore, one of main in class-D amplifier design design challenge finds balance suitable between maximal audio power output and maximum idle losses.
Summary of the invention
The present invention attempts to provide a kind of class-D amplifier, wherein automatically can control the balance found between maximal audio power output and maximum idle losses.
The present invention also attempts to be provided for a kind of method automatically controlling to balance between maximal audio power output and maximum idle losses for class-D amplifier.
According to aspects of the present invention, provide a kind of amplifier, described amplifier comprises: modulating stage, and described modulating stage has input for receiving input signal and for providing the output of the modulating input signal of input signal; Multiple power stage, each power stage in response to described modulating stage, and is included in the first switch and the second switch of series coupled between the first voltage source and the second voltage source, and each power stage is included in the output node between the first switch and second switch; And power level control circuit, described power level control circuit for measuring incoming signal level, and carrys out the power stage of enable selected number according to the incoming signal level measured.
Therefore, according to the present invention, the size of amplifying stage is mated with the dynamic changes of strength of input signal, makes signal amplification factor always as much as possible close to optimum value.Therefore because the size of power stage never (in fact) be greater than the essential value for input signal strength, minimize the amount of idle losses.
In an embodiment, modulating stage comprises comparator, and described comparator also comprises the second input for receiving brewed reference signal.
In a preferred embodiment, power level control circuit comprises the signal level generator of the maximum for keeping the incoming signal level measured, described signal level generator is arranged as generation decaying output signal, and described decaying output signal has the predetermined decay when incoming signal level drops to below measured maximum based on the maximum of the input signal measured.The advantage that this structure has is: for rapid deterioration input signal (such as, the signal turned off), introduce when forbidding power stage and postpone, make the phase mismatch between the output current of described power stage and output voltage can not cause such as still flowing through in the moment larger current forbidding power stage the problem of power stage and so on.
In another embodiment, power level control circuit also comprises multiple comparative degree, each comparative degree has the first input for the output signal of Received signal strength holding element and the second input for the different piece that receives another reference signal, and each described comparative degree produces the output signal for controlling the unique sub-set in multiple power stage.This is a kind of directly implementation method; Such as, for 2N power stage, N number of reference fractional signal level (1/N, 2/N can be limited ... 1) each reference fractional signal level, is made to be used to activate when the output signal of signal holding element exceedes associated reference signal level the subset of power stage.
Alternatively, for good and all one of enable power level.This is the simplification in first embodiment, described in first example based on following understanding: for particular design, always need independent amplifying stage.
Amplifier can also comprise the loud speaker be connected to the corresponding output of power stage.The low-frequency filter characteristics of loud speaker may be used for removing low pass filter in the design of amplifier.
Amplifier can be integrated in any suitable electronic equipment.Electronic equipment suitable is especially battery powered mobile communication equipment, because the dynamic power level of amplifier of the present invention links the power of battery that size (dimensioning) structure guarantees to improve mobile communication equipment, thus improves the marketability of mobile communication equipment.The example of this mobile communication equipment comprises mobile phone, PDA, handheld computer, notebook, kneetop computer etc.
According to a further aspect in the invention, provide the method for control amplifier, described amplifier comprises: modulating stage, and described modulating stage has input for receiving input signal and for providing the output of the modulating input signal of input signal; And multiple power stage, each power stage is in response to described modulating stage, and each power stage is included in the first switch and the second switch of series coupled between the first voltage source and the second voltage source, and each power stage is included in the output node between the first switch and second switch; Described method comprises: measure incoming signal level; And the power stage of enable selected number is carried out according to the incoming signal level measured.
Because minimize idle losses, this method allows with more energy-conservation mode operational amplifier, class-D amplifier specifically.
In an embodiment, described method also comprises generation signal intensity indication signal, and described generating step comprises: the input signal increased for intensity, produces the input signal as signal intensity indication signal; Keep the maximum of described increase incoming signal level; And producing decaying signal strength index signal for the incoming signal level that intensity reduces, described decaying signal strength index signal has the predetermined decay of the maximum based on the incoming signal level measured.As previously mentioned, which avoid and forbid power stage prematurely.
In another embodiment, described method also comprises by signal intensity indication signal compared with multiple different pieces of reference signal, and each comparative result provides for the enable signal of power stage with subset.The advantage done like this is that easily realizing this power stage selects step.
Accompanying drawing explanation
In further detail the embodiment of the present invention is described with reference to accompanying drawing in the mode of non-limiting example, wherein:
Fig. 1 schematically depict the class-D amplifier of prior art;
Fig. 2 schematically depict the operation principle of class-D amplifier;
Fig. 3 schematically depict the embodiment of class-D amplifier of the present invention;
Fig. 4 schematically depict an aspect of the class-D amplifier according to the embodiment of the present invention;
Fig. 5 schematically depict the another aspect of the class-D amplifier according to the embodiment of the present invention;
Fig. 6 schematically depict the control signal for the class-D amplifier according to the embodiment of the present invention; And
Fig. 7 still schematically depict the another aspect of the class-D amplifier according to the embodiment of the present invention.
Embodiment
It should be understood that accompanying drawing is only schematic, and be not drawn to scale.It should also be understood that: run through accompanying drawing, identical reference number is used to indicate same or similar parts.
Fig. 1 schematically depict the known architectures structure of class-D amplifier 100.Amplifier 100 comprises: comparator 110, and described comparator 110 has the input 112 for receiving analog input signal 212, and receives with reference to modulation signal 214 in the input 114 of comparator 110.Comparator 110 exports on 116 at it and provides the pulse-width modulation input signal 216 obtained.Illustrate in greater detail the operation of comparator 110 in fig. 2; Comparator 110 continuously by analog input signal 212 compared with periodic reference signal 214, thus generate the pulse-width modulation input signal 216 of input signal 212.
Pulse-width modulation input signal 216 is forwarded to driving stage 120, and described driving stage 120 is for providing control signal to the mains switch 132 and 134 in power stage 130.Mains switch can be the type be applicable to arbitrarily, such as, and CMOS or bipolar transistor (such as, BiCMOS transistor).As shown in Figure 1, each switch in mains switch 132 and 134 includes the backgate diode between its source electrode and drain electrode.Mains switch 132 and 134 (such as, between the supply voltage and ground) between positive voltage source 140 and negative voltage source 150 is connected in series.In the current path of node 136 between mains switch 132 and 134, described node 136 produces the output signal of power stage 130.The output signal of power stage 130 is the pulse-width modulation input signals 216 amplified.
The output signal of power stage 130 is forwarded to loud speaker 160.The low-pass characteristic of loud speaker 160 ensure that the pulse-width modulation input signal 216 by amplification is converted to the analog input signal 212 of amplification.The signal shaping parts of such as transistor 162 and capacitor 164 and so on can also be comprised to the signal path of loud speaker 160 from output 136, described capacitor 164 can make one of its plate be connected with aforementioned signal path, and another block plate in its plate is connected with ground 166.
Other structure multiple that it should be understood that class-D amplifier 100 is also feasible.Such as, amplifier can have such as bridge-type support structures (being also referred to as H bridge export structure) disclosed in the paper of the people such as previously mentioned Muggler, and described bridge-type support structures avoids the demand to independent low pass filter.What should reaffirm is for not having the class-D amplifier of filter to design, and preferably uses 3 grades of modulation signals 214.The characteristic of this modulation signal is disclose in detail in the paper of the people such as previously mentioned Muggler.Alternatively, low pass filter can be comprised between output 136 and loud speaker 160, to extract the input signal 212 amplified from the pulse-width modulation input signal 216 amplified.
In addition, the modulation of the input signal in class-D amplifier is not limited to analog input signal.Pulse-width modulation similarly can be applied in digital signal (such as, bit stream).In addition, the modulation of other type can be used; Such as, can also pulse density modulated (PDM) be applied on input signal, to produce the drive singal for switch drive level 120.
The problem of the architecture of the class-D amplifier such as shown in Fig. 1 is to design based on maximum amplification demand the amplifying stage provided by power stage 130.The result done like this is: if need the signal being less than spiking output, then power stage 130 is excessive in fact.The shortcoming done like this is: in idle period of time, negatively have impact on the idle losses of power stage 130, is namely greater than desired loss.
The present invention solves this problem as follows.As shown in Figure 3, the class-D amplifier 300 according to the embodiment of the present invention comprises digital to analog converter 310, and described digital to analog converter 310 is for being converted to the analog version of input signal 212 by the digital version of the input signal received in input 112 212.Obviously, can be that analog form or digital input signals will save digital to analog converter 310 modulated at input signal 212.Amplifier 300 also comprises modulating stage 110, and described modulating stage 110 can realize the modulation of any suitable type.In an embodiment, modulating stage 110 comprises comparator, wherein uses reference signal 214 (not shown) to modulate analog input signal 212, to provide the pulse-width modulation input signal 216 of input signal 212 as shown in Figure 2.
Modulating input signal 216 (such as PWM input signal) is forwarded to the improvement power stage 330 comprising switch driver 120 and multiple power switch level 130 (not shown).This will be schematically depicted in more detail after a while.Class-D amplifier 300 also comprises power stage enable circuits 340, and described power stage enable circuits 340 produces one or more control signal 342 according to the signal strength signal intensity of audio input signal 112.Described one or more control signal 342 is used as the enable signal for the respective subset of power switch level 130.
This structure is illustrated in greater detail by means of Fig. 4.Power level control circuit 340 comprises rectification circuit 410, and described rectification circuit 410 produces the rectification audio input signal 412 of audio input signal 212.Rectified input signal 412 is forwarded to the signal level generator 420 that will be hereafter described in more detail.The output of signal strength signal intensity generator 420 is forwarded to multiple comparison circuit 442-444, and each comparison circuit is arranged as the enable signal produced for the different subsets of power switch level 130.
Power level control circuit 340 also comprises reference signal generator 430, and described reference signal generator 430 is arranged as the reference signal producing predetermined signal strength.The different piece of this reference signal strength is provided to corresponding comparative degree 442-444.In the diagram, the full strength (fullstrength) of this reference signal is provided to comparative degree 444, provides 2/3 of this reference signal full strength to comparative degree 443, and provide 1/3 of this reference signal full strength to comparative degree 444.Such as, this can by realizing comprising corresponding signal distributor 431 and 432 (such as, resistor) from the reference signal generator 430 points signal path be clipped in comparative degree 443 and 442.
In the diagram, power level control circuit 340 is configured to provide enable signal to eight different power switch levels 130.The power switch level that constant enable signal generator 441 is labeled as [0] in Fig. 4 provides permanent enable signal.Comparative degree 442 provides enable signal to the single power switch level being labeled as [1].Comparative degree 443 provides enable signal to a pair power switch level being labeled as [2-3].Comparative degree 444 provides enable signal to four the power switch levels being labeled as [4-7].
In operation, one of power switch level 130 (namely, be labeled as the power switch level of [0]) always connect, and, when the signal strength signal intensity that signal strength signal intensity generator 420 produces exceedes the partial intensities of the reference signal received for the comparative degree of the enable signal of corresponding power switching stage by responsible generation, only all the other power switch levels 130 enable.
It should be understood that the realization just showing the power level control circuit 340 in Fig. 4 as non-restrictive example.In the diagram, via formula 2
ncarry out the number of selection and comparison level, wherein 2
nbe the number of power switch level 130, and N is the positive integer representing comparative degree number, the n-th comparative degree is 2
nindividual power switch level 130 provides enable signal, wherein 0≤n < N (n is integer).As non-restrictive example, N=3 in the diagram.It should be understood that class-D amplifier 300 can have the power switch level 130 of any proper number, and there is the comparative degree of any proper number in power level control circuit 340.Similarly, there is no need the power that design power level control circuit equals 2 to the number of the enable signal making each comparative degree generation in comparative degree 442-444.
Fig. 5 describes the example embodiment of signal level generator 420 in more detail in a schematic manner.In operation, signal level generator 420 is arranged as when the intensity of rectified input signal 412 does not reduce, and follows the intensity of rectified input signal 412.For the input signal 412 reducing intensity, the output signal of signal level generator 420 (such as, reduces but not follows rectified input signal 412) decay preferably in a predefined manner in the mode of negative exponential function.When output current and its output voltage out-phase of power stage 330, predetermined attenuation function is particularly advantageous.In this scene, the attenuation function of such as negative exponential function and so on prevents power switch level 130 shutoff suddenly and big current still flows through described level 130.Therefore, the use of this attenuation function prevents the deterioration of the quality of the output signal produced by power stage 330 caused by undesired switch events.
In order to realize suitable attenuation function, signal level generator 420 can comprise comparator stage 510, and described comparator stage 510 is suitable for compared with the rectified input signal 412 of input and the inner correction signal 532 produced.Peak signal in two input signals is forwarded to the output of 510.The signal 422 obtained is forwarded to foregoing comparative degree 442-444.In addition, obtained signal 422 is periodically stored in the memory component 520 of the latch or trigger and so on such as controlled by clock signal.The decay generator of such as blender 530 and so on is configured for the signal 522 to provide according to memory component 520 and produces coherent signal 532 from the control signal that multiplexer 540 receives, and described multiplexer 540 comprises four input 541-544 and control terminal 545 with unrestriced way of example.Blender 530 is arranged as and the output signal 512 obtained from memory component 520 is less than 1 but the zoom factor being greater than the value of 0 is multiplied with having.
Different zoom factors can be limited, to realize different attenuation characteristics in the different inputs of multiplexer 540.Therefore, the loop formed by memory component 520 and blender 530 utilizes negative exponential function to reduce signal 522 when signal 532 is greater than input signal 412.
But it should be understood that other type attenuation function of the predetermined decay performing such as time delay, linear fading function or sluggish attenuation function and so on is similarly suitable for.Other suitable attenuation function will be apparent to those skilled in the art.In the context of the present invention, attenuation function comprises and uses enough large decay to regenerate the function of the input signal 412 of reduction simply, to remove the impact of any difference between the voltage domain of power switch level 130 and current field by attenuation grade 430.
The various operator schemes of the class-D amplifier 300 with eight power switch levels 130 according to the embodiment of the present invention are illustrated in greater detail by means of Fig. 6.Reference signal level 630 is reference signal level of reference signal generator 430 output, reference signal level 631 is reference signal level of signal distributor 431 output, and reference signal level 632 is reference signal level of signal distributor 432 output.As seen in Figure 6, during the starting stage, rectified input signal 412 has 0 value.In other words, the intensity (amplitude) of rectified input signal 412 is less than the intensity (level) of other reference signal 630-632 any, makes comparative degree 442-444 all not produce enable signal.Therefore, the permanent enable power switching stage ON being labeled as [0] is only had in Fig. 4.
At moment t1, the intensity of rectified input signal 412 increases to more than the intensity of reference signal 630-632 fast.As illustrated by composition graphs 5, the output signal 422 of signal level generator 420 follows this increase less than what decay.At time interval t1-t2, vibrate between the minimum value below the level of the maximum of rectified input signal 412 more than the level of reference signal 630-632 and reference signal 630-632.But, frequency of oscillation makes the decay of output signal 422 never drop to below the level of reference signal 630, make all moment of all comparative degree 442-444 during time interval t1-t2 keep producing enable signal, make all power switch levels 130 being labeled as [0]-[7] in this interim permanently enable Fig. 4.
At moment t2, the intensity of input signal 212 and rectified version 412 drops to extremely low level, makes the amplitude peak of signal remain on below the level of reference signal 632.But because the delay of the output signal 422 of signal level generator 420 decays, this can't cause the forbidding immediately to power switch level 130.On the contrary, the output signal 422 of decay, in the level cross of t3 and reference signal 630, therefore causes because comparative degree 444 stops producing the fact of enable signal in this moment the power switch level 130 that postpones to be labeled as [4-7] in forbidding Fig. 4.At t4, the output signal 422 of decay and the level cross of reference signal 631, therefore cause postponing to forbid the power switch level 130 being labeled as [2-3] in Fig. 4 because comparative degree 443 stops the fact of generation enable signal in this moment.
Fig. 7 schematically depict the example embodiment of the power stage 330 in class-D amplifier 300 of the present invention.Power stage 330 has the switch driver 120 of the pulse-width modulation version 2 16 of the input signal 212 received in response to the output 116 from pulse-width modulation level 110.Power stage 330 has multiple sub-level 130 (that is, being previously referred to as power switch level).In the figure 7, only three such sub-levels are shown in the mode of non-limiting example.The control terminal of the power switch of such as pMOS power transistor 132 and nMOS power transistor 134 and so in every height level of sub-level (130_0,130_1 and 130_2) (such as, grid) be connected with switch driver 120 with 720 via corresponding enable switch 710, the enable switch 710 and 720 of every height level of sub-level 130 wherein can be controlled by the different enable signals (signal that the different comparator such as, in comparator 442-444 and/or enable signal generator 441 and/or generator produce) from power level control circuit 340.The enable switch 710 and 720 of one a little grade can share foregoing identical enable signal.When the enable switch 710 and 720 of one of sub-level 130 controls by enable signal generator 441, namely one of sub-level 130 enable switch 710 and 720 can forever enable when, the enable switch 710 and 720 of this sub-level can be saved in an alternative embodiment based on this reason.In an embodiment, as shown in Figure 7, enable switch 710 is arranged as and pMOS power transistor is switched between positive voltage source terminal 140 and switch driver 120, and enable switch 720 is arranged as nMOS power transistor is switched between negative voltage source terminal 150 and switch driver 120.Which ensure that mains switch 132 and 134 is ended effectively when its control terminal (such as, grid) is connected with these voltage source terminal.
It should be understood, however, that the alternative construction for optionally enable one or more sub-level 130 is feasible equally.Such as, switch driver 120 can be suitable for receiving enable signal from comparative degree 442-444, optionally to produce the control signal for suitable sub-level 130, control terminal by suitable pMOS transistor 132 is switched to positive voltage source 140, and the control terminal of suitable nMOS transistor 134 is switched to negative voltage source 150.In other words, (mode of the switch 710 and 720 saving separation can such as be made it possible to) by the function i ntegration of switch 710 and 720 in switch driver 120 in any suitable manner.Alternatively, sub-level 130 can being formed in independent power domain, wherein only when there is the enable signal produced by the corresponding comparative degree of power level control circuit 340, just providing power to sub-level.
It should be noted: above-described embodiment illustrates and unrestricted the present invention, and those skilled in the art can design multiple alternative when not deviating from claims scope.In the claims, any reference marker between round parentheses should not be interpreted as limiting claim.Word " comprises " not getting rid of and there is element outside element listed by claim or step or step.Word " one " before element is not got rid of and be there is multiple this element.The present invention can be realized by the hardware comprising some different elements.In the equipment claim listing some devices, the some devices in these devices can be realized by the same parts of a device and hardware.The unique fact recording special characteristic in mutually different dependent claims does not represent the combination that advantageously cannot use these features.
Claims (13)
1. an amplifier (300), comprising:
Modulating stage (110), described modulating stage (110) has input (112) for receiving input signal (212) and for providing the output (116) of the modulating input signal (216) of input signal (212);
Multiple power stage (130), each power stage is in response to described modulating stage, and each power stage is included in the first switch (132) and the second switch (134) of series coupled between the first voltage source (140) and the second voltage source (150), and each power stage is included in the output node (136) between the first switch and second switch; And
Power level control circuit (340), for measuring incoming signal level, and carrys out the power stage of enable selected number according to the incoming signal level measured.
2. amplifier (300) as claimed in claim 1, wherein, modulating stage comprises comparator, and described comparator also comprises the second input (114) for receiving brewed reference signal (214).
3. amplifier (300) as claimed in claim 1, wherein, the number of described multiple power stage is the power of 2.
4. the amplifier (300) any one of claim 1-3, wherein, power level control circuit (340) comprises the signal level generator (420) of the maximum for keeping the incoming signal level (212) measured, described signal level generator is arranged as generation decaying output signal, and described decaying output signal has the predetermined decay (432) when incoming signal level drops to below measured maximum based on the maximum of the input signal measured.
5. amplifier (300) as claimed in claim 4, wherein, power level control circuit (340) also comprises multiple comparative degree (442-444), each comparative degree has the first input for the output signal (422) of received signal level generator (420) and the second input for the different piece that receives another reference signal (630,631,632), and each described comparative degree produces the output signal of the unique sub-set be used in enable multiple power stage (130).
6. amplifier (300) as claimed in claim 5, wherein, for good and all one of enable multiple power stage (130).
7. the amplifier (300) any one of claim 1,2,3,5,6, also be included in the drive circuit (120) between modulating stage (110) and multiple power stage (130), described drive circuit (120) is for providing control signal to each power stage.
8. the amplifier any one of claim 1,2,3,5,6, wherein, the first and second switches (132,134) are MOS transistor or bipolar transistor.
9. the amplifier (300) any one of claim 1,2,3,5,6, also comprises the loud speaker (160) be connected to the corresponding output (136) of power stage (130).
10. an electronic installation, comprises amplifier as claimed in any one of claims 1-9 wherein (300).
The method of 11. 1 kinds of control amplifiers (300), described amplifier comprises:
Modulating stage (110), described modulating stage (110) has input (112) for receiving input signal (212) and for providing the output (116) of the modulating input signal (216) of input signal (212);
Multiple power stage (130), each power stage is in response to described modulating stage, and each power stage is included in the first switch (132) and the second switch (134) of series coupled between the first voltage source (140) and the second voltage source (150), and each power stage is included in the output node (136) between the first switch and second switch;
Described method comprises:
Measure incoming signal level (212); And
The power stage (130) of enable selected number is carried out according to the incoming signal level measured.
12., as the method for claim 11, also comprise:
Produce signal intensity indication signal (422), described generating step comprises:
For the input signal that intensity increases, produce the input signal (212) as signal intensity indication signal;
Keep the maximum of the incoming signal level of described increase; And
The incoming signal level reduced for intensity produces decaying signal strength index signal, and described decaying signal strength index signal has the predetermined decay (432) of the maximum based on the incoming signal level measured.
13. as the method for claim 12, also comprise by signal intensity indication signal compared with multiple different pieces (430,431,432) of reference signal, each comparative result provides the enable signal of the different subsets for power stage (130).
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| EP20100192805 EP2458732B1 (en) | 2010-11-26 | 2010-11-26 | Amplifier and amplifier control method |
| EP10192805.9 | 2010-11-26 |
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| US9806684B2 (en) * | 2015-09-11 | 2017-10-31 | Ess Technology, Inc. | Method and apparatus for achieving very high-output signal swing from class-D amplifier |
| US9793867B2 (en) * | 2015-09-11 | 2017-10-17 | Ess Technology, Inc. | Method and apparatus for achieving very high-output signal swing from class-D amplifier using fewer components |
| JP6682463B2 (en) * | 2017-02-21 | 2020-04-15 | 株式会社東芝 | Class D amplifier |
| CN113595518B (en) * | 2021-09-30 | 2021-12-07 | 成都明夷电子科技有限公司 | Self-adaptive high-reliability HBT linear power amplifier |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1395364A (en) * | 2001-06-07 | 2003-02-05 | 三垦电气株式会社 | Switching amplifier and signal amplifying method |
| US6812785B2 (en) * | 2001-08-08 | 2004-11-02 | Sony Corporation | Digital power amplifier and digital/analog converter |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4764734A (en) * | 1987-01-20 | 1988-08-16 | Scs Telecom, Inc. | Class SM power amplifier |
| US5422597A (en) * | 1994-05-31 | 1995-06-06 | Motorola, Inc. | Means and method of enhancing signal resolution and dynamic range extension in a pulse width modulation amplifier |
| US5929702A (en) * | 1997-11-28 | 1999-07-27 | Motorola, Inc. | Method and apparatus for high efficiency high dynamic range power amplification |
| JP3894293B2 (en) * | 2001-11-19 | 2007-03-14 | ソニー株式会社 | Power amplifier device |
| KR100749899B1 (en) * | 2003-08-07 | 2007-08-21 | 가부시키가이샤 엔티티 도코모 | Power amplifier |
| EP2063531A4 (en) * | 2006-09-14 | 2015-07-22 | Nec Corp | Amplifying unit, method of output control and control program |
| KR100858292B1 (en) * | 2007-02-26 | 2008-09-11 | (주)유비아이사운드 | Switching amplifier driver for reducing the start and stop noise and Audio amplifier including the Driver |
| US7928774B2 (en) * | 2008-09-29 | 2011-04-19 | Infineon Technologies Ag | Adaptive drive signal adjustment for bridge EMI control |
| US7948312B2 (en) * | 2009-05-13 | 2011-05-24 | Qualcomm, Incorporated | Multi-bit class-D power amplifier system |
| US8212612B2 (en) * | 2010-07-19 | 2012-07-03 | Broadcom Corporation | Closed-loop class-D amplifier with modulated reference signal and related method |
-
2010
- 2010-11-26 EP EP20100192805 patent/EP2458732B1/en active Active
-
2011
- 2011-11-22 US US13/303,007 patent/US8861748B2/en active Active
- 2011-11-25 CN CN201110391581.2A patent/CN102571000B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1395364A (en) * | 2001-06-07 | 2003-02-05 | 三垦电气株式会社 | Switching amplifier and signal amplifying method |
| US6812785B2 (en) * | 2001-08-08 | 2004-11-02 | Sony Corporation | Digital power amplifier and digital/analog converter |
Also Published As
| Publication number | Publication date |
|---|---|
| US8861748B2 (en) | 2014-10-14 |
| EP2458732B1 (en) | 2013-10-02 |
| EP2458732A1 (en) | 2012-05-30 |
| CN102571000A (en) | 2012-07-11 |
| US20120134514A1 (en) | 2012-05-31 |
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