CN102570983A - Harmonic attenuation method and circuit - Google Patents

Abstract

The embodiment of the invention discloses a harmonic attenuation method and a circuit. The method and the circuit are used for solving the problem of interference of different-order harmonics during a down-conversion process. The method provided by the embodiment of the invention comprises the steps: respectively inputting a same radio-frequency signal to a first active link and at least one path of second active link of a harmonic attenuation circuit; performing adjustment and phase shift on the radio-frequency signal inputted to the first active link by a first phase shifter, and then performing the down-conversion on the radio-frequency signal and a local oscillating signal inputted to a first down-converter; performing adjustment and phase shift on the radio-frequency signal inputted to the second active link by a second phase shifter, and then performing the down-conversion on the radio-frequency signal and the local oscillating signal inputted to a second down-converter; and lastly, adding the radio-frequency signals of all active links by an adder of the harmonic attenuation circuit, thereby efficiently attenuating the different-order harmonics.

Description

A harmonic suppression method and circuit

technical field

The invention relates to the technical field of communication, in particular to a harmonic suppression method and circuit.

Background technique

In the down-conversion of frequency conversion technology, the down-converter mixes the received RF signal with the signal generated by the local oscillator, and uses the local oscillator signal to periodically control the conduction and disconnection of its internal circuit, so that the input RF signal passes through the down-converter After that, a discontinuous RF input signal is obtained at the output. If the radio frequency input signal is U _RF (t)=V _RF cos(W _RF t), wherein, V _RF represents the amplitude of the radio frequency signal, and W _RF represents the frequency of the radio frequency signal. With the positive and negative switching of the switching signal of the down-converter, the input signal is turned on and off at the output terminal, and the output signal is equivalent to the product of the RF input signal and the square wave switching signal, as shown in formula (1):

(1): U _out (t) = U _RF (t) sgn (t)

Among them, sgn(t) represents the switch signal, and the Fourier expansion of the switch signal is obtained as formula (2):

(2): sgn(t)＝(4/π)【sin(W _LO t)+1/3sin(3W _LO t)+1/5sin(5W _LO t+------】

Among them, W _LO represents the frequency of the local oscillator. Substituting formula (2) into formula (1), the output signal can be obtained, such as formula (3):

(3): U _out (t)＝V _RF cos(W _RF t)(4/π)【sin(W _LO t)+1/3sin(3W _LO t)+1/5sin(5W _LO t+--- ---]

The product of the RF input signal and the local oscillator signal in formula (3) is the required signal, which is expressed as formula (4):

(4): U(t)＝(4/π)V _RF cos(W _RF t)sin(W _LO t)

From the above analysis, it can be seen that when U _RF (t) is a broadband signal, U _RF (t) will contain higher frequency interference signals, and the odd harmonic components in the switching signal will generate down-converted interference signals. From formula (2), it can be seen that the amplitudes of the third-order harmonic and the fifth-order harmonic of the local oscillator signal are -4.77dB and -6.99dB of the fundamental wave, respectively, and the amplitudes of the seventh-order and ninth-order harmonics are -8.45dB respectively And -9.54dB, if there is an interfering signal on the frequency band corresponding to the higher frequency, it will interfere with the useful signal.

每个混频器使用相位差为45°的本振相位进行混频，如相位分别为0°、45°和90°，最后再将各个子混频器的输出信号进行叠加。At present, the research on harmonic rejection of local oscillators mainly starts from the structural level of the down-converter, involving a harmonic rejection structural mixer (HRM, Harmonic Rejection Mixers). In HRM, there are harmonic suppression structure using translinear technology and harmonic suppression mixing structure with compensation circuit added. Its basic structure consists of three sub-mixer chains, each chain consisting of an amplifier and a mixer. The input RF signal is amplified by the amplifier with different coefficients and reaches the mixer. The ratio of the amplification coefficients of the three sub-mixing links is

Each mixer uses local oscillator phases with a phase difference of 45° for mixing, for example, the phases are 0°, 45° and 90° respectively, and finally the output signals of each sub-mixer are superimposed.

This kind of HRM can suppress the third-order harmonic and the fifth-order harmonic, but cannot effectively suppress the seventh-order harmonic and the ninth-order harmonic. From the analysis of formula (2), the seventh-order harmonic and the ninth-order harmonic The interference caused cannot be ignored, thus limiting the performance of the RHM.

Contents of the invention

In view of the above defects, the embodiment of the present invention provides a harmonic suppression method and circuit to solve the problem that the radio frequency signal is subjected to harmonic interference during the down-conversion process, and can flexibly suppress different orders of harmonics as required.

A harmonic suppression method, comprising:

The radio frequency signal is respectively input into the first working link and at least one second working link of the harmonic suppression circuit, the first working link includes a first phase shifter and a first down-converter, and the second working link The circuit includes a second phase shifter, a second down converter and a switch;

The radio frequency signal input to the first working link is adjusted for phase shift through the first phase shifter, and the radio frequency signal input to the second working link is adjusted for phase shift through the second phase shifter;

The radio frequency signal after the phase shift is adjusted by the first phase shifter is down-converted by the first down-converter and the local oscillator signal input to the first down-converter to obtain the first down-converted radio frequency signal. The radio frequency signal after the phase shift is adjusted by the second phase shifter is down-converted through the second down-converter and the local oscillator signal input to the second down-converter to obtain a second down-converted radio frequency signal;

Both the first down-converted radio frequency signal and the second down-converted radio frequency signal are input to the adder of the harmonic suppression circuit for superposition.

A harmonic suppression circuit, including an adder 210, a first working link 220, and at least one second working link 230;

The first working link 220 includes a first phase shifter 221 and a first down-converter 222, the input end of the first phase shifter 221 is connected to the input source of the radio frequency signal, and the first phase shifter The output terminal of 221 is connected with the first input terminal of the first down-converter 222, the second input terminal of the first down-converter 222 is connected with the input source of the local oscillator signal, and the first down-converter The output end of device 222 is connected with the first input end of described adder 210;

The second working link 230 includes a second phase shifter 231, a second down converter 232 and a switch 233, the input end of the second phase shifter 231 is connected to the input source of the radio frequency signal, the The output end of the second phase shifter 231 is connected with the first input end of the second down-converter 232, and the second input end of the second down-converter 232 is connected with the input source of the local oscillator signal, so The output end of the second down-converter 232 is connected to one end of the switch 233 , and the other end of the switch 233 is connected to the second input end of the adder 210 .

It can be seen from the above technical solutions that the embodiments of the present invention have the following advantages:

The harmonic suppression circuit in the present invention includes an adder, a first working link and at least one second working link, the first working link includes a first phase shifter and a first down-converter, and the radio frequency signal is input to the first The working link adjusts the phase shift of the radio frequency signal through the first phase shifter, performs down-conversion through the first down-converter and the local oscillator signal input to the first down-converter, and then converts the down-converted local oscillator The signal is input to the adder; at the same time, the second working link includes a second phase shifter, a second down-converter and a switch, and the radio frequency signal is input into the second working link to adjust the radio frequency signal through the second phase shifter After the phase shift of the second down-converter and the local oscillator signal input to the second down-converter, the frequency of the down-converted radio frequency signal is input to the adder through the switch, and the adder Receive the input RF signals of the first working link and the second working link, and then superimpose the RF signals to achieve the purpose of suppressing harmonics, and the number of second working links is flexibly selected by the user, so that different orders of harmonics can be suppressed Wave.

Description of drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the accompanying drawings required in the embodiments of the present invention. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For Those of ordinary skill in the art can also obtain other drawings based on these drawings without making creative efforts.

Fig. 1 is the basic flowchart of a kind of harmonic suppression method provided by the embodiment of the present invention;

FIG. 2 is a basic structural diagram of a harmonic suppression circuit provided by an embodiment of the present invention;

3 is a working structure diagram of a harmonic suppression circuit provided by an embodiment of the present invention;

FIG. 4 is a basic structural diagram of a local oscillator signal generator provided by an embodiment of the present invention;

Fig. 5 is a working structure diagram of a local oscillator signal generator provided by an embodiment of the present invention.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

An embodiment of the present invention provides a harmonic suppression method, by inputting the same radio frequency signal into the first working link and the second working link of the harmonic suppression circuit respectively, in the first working link, the first phase shifter Adjust the phase shift of the RF signal, and then down-convert the local oscillator signal of the first down-converter input to the first working link. The RF signal input to the second working link is adjusted for phase shift by the second phase shifter, and then input The local oscillator signal of the second working link is down-converted, and the adder of the harmonic suppression circuit receives the RF signals input by the first working link and the second working link, and superimposes the RF signals, thereby flexibly suppressing different orders Harmonics, in addition, the embodiment of the present invention also provides a harmonic suppression circuit and related equipment, please refer to Figure 1 to Figure 5, the following will describe the embodiment of the present invention in detail:

Embodiment one

Please refer to FIG. 1 . FIG. 1 is a basic flowchart of a harmonic suppression method provided by an embodiment of the present invention. The following will describe the embodiment of the present invention in detail from the perspective of the harmonic suppression circuit. As shown in FIG. 1, the method includes steps:

110. Input the radio frequency signal into the first working link and at least one second working link of the harmonic suppression circuit respectively;

The radio frequency signal will be interfered by harmonics during down-conversion, and the harmonic suppression circuit is selected to suppress the harmonics. The harmonic suppression circuit includes an adder, a first working link and at least one second working link, the first working link is a basic working link, and the first working link includes a first phase shifter and The first down-converter, the second working link includes a second phase shifter and a second down-converter, and also includes a switch. According to different orders of harmonics that need to be suppressed, the radio frequency signals are respectively input into the first working link and the second working link, wherein the number of working links of the second working link is determined by the user according to the current working frequency.

120. The radio frequency signal input to the first working link is adjusted for phase shift through the first phase shifter, and the phase shift of the radio frequency signal input to the second working link is adjusted through the second phase shifter;

The phase shift of the RF signal is adjusted through the phase shifter of each working link. The phase shift of the phase shifter can be simply controlled by the circuit voltage, and the phase shift of the phase shifter of each working link is different. After the radio frequency signal is split into the first working link and the second working link, radio frequency signals with different phase shifts are obtained after passing through the phase shifters of each channel.

130. The radio frequency signal adjusted for phase shift by the first phase shifter is down-converted by the first down-converter and the local oscillator signal input to the first down-converter to obtain a first down-converted radio frequency signal , performing down-conversion on the radio frequency signal after phase shift adjustment by the second phase shifter through the second down-converter and the local oscillator signal input to the second down-converter to obtain a second down-converted radio frequency signal;

The radio frequency signal of each working link is adjusted for phase shift by the phase shifter, and then input to the down-converter and the local oscillator signal of the down-converter for down-conversion.

140. Input both the first down-converted radio frequency signal and the second down-converted radio frequency signal into an adder of the harmonic suppression circuit for superposition.

The adder receives radio frequency signals with different down-conversion components input by each working link, and superimposes the radio frequency signals, so as to achieve the purpose of suppressing harmonics.

In the embodiment of the present invention, by inputting the radio frequency signal into the first working link and at least one second working link, after the phase shift is adjusted by the first phase shifter of the first working link, it is the same as that input to the first down-converter. The same RF signal is input to the second phase shifter of the second working link to adjust the phase shift and then down-converted with the local oscillator signal input to the second down-converter, and the RF signal after the down-conversion is input to the addition The device superimposes the radio frequency signal to suppress different order harmonics.

Among them, the first working link is used as the basic working link, and it means that there is no need to suppress harmonics during operation, so the RF signal passing through the first working link does not undergo phase shifting, the phase shift of the first phase shifter is 0°, and the input The phase shift of the local oscillator signal of the down-converter is also 0°.

As a preferred mode, in the second working link, the phase shift of the second phase shifter of the i-th second working link is i*180°/m, and at the same time, the phase shift of the local oscillator signal of the second down-converter It is also i*180°/m, m is the total number of working links of the first working link and the second working link, and at the same time, m is determined by the frequency range of the radio frequency signal to be detected. It can be seen from i*180°/m that the phase shift difference of the phase shifters of any adjacent two working links including the first working link is 180°/m, and the input of any adjacent two The phase shift difference of the local oscillator signal of the down-converter of the road is 180°/m.

Embodiment two

As shown in FIG. 2, an embodiment of the present invention also provides a harmonic suppression circuit, which includes an adder 210, a first working link 220, and at least one second working link 230;

The first working link 220 includes a first phase shifter 221 and a first down-converter 222, the input end of the first phase shifter 221 is connected to the input source of the radio frequency signal, and the first phase shifter The output terminal of 221 is connected with the first input terminal of the first down-converter 222, the second input terminal of the first down-converter 222 is connected with the input source of the local oscillator signal, and the first down-converter The output end of device 222 is connected with the first input end of described adder 210;

The second working link 230 includes a second phase shifter 231, a second down converter 232 and a switch 233, the input end of the second phase shifter 231 is connected to the input source of the radio frequency signal, the The output end of the second phase shifter 231 is connected with the first input end of the second down-converter 232, and the second input end of the second down-converter 232 is connected with the input source of the local oscillator signal, so The output end of the second down-converter 232 is connected to one end of the switch 233 , and the other end of the switch 233 is connected to the second input end of the adder 210 .

The user can determine the total number of working links that need to be set according to the frequency range of the radio frequency signal to be detected, that is, the total number of working links of the first working link and the second working link in the embodiment of the present invention, if the radio frequency signal received by the user The broadband is B, the upper limit of the frequency is f _{u and} the lower limit is f _i , calculate the order m _r of the maximum odd-order harmonic interference that may be received in the down-conversion, and determine the maximum possible total number of working links required. The order m _r of the maximum odd harmonic interference is the order corresponding to the maximum odd harmonic interference received when the lower limit frequency f _i is the largest odd number not greater than f _u /f _i , and the total number of possible working links m is m=(m _r +1)/2. Wherein, the first working link 220 serves as the basic working link, and there are m−1 second working links 230 remaining.

As a preferred manner, the first working link is used as a basic working link, and the phase shift of the first phase shifter 221 and the phase shift of the local oscillator signal input to the first down-converter are both 0°. In the second working link, the phase shift of the second phase shifter of the i-th path is i*180°/m, and at the same time, the phase shift of the local oscillator signal input to the second down-converter of the i-th path is i* 180°/m, the phase shift difference of the second phase shifters of the two adjacent second working links is 180°/m, input the local oscillator signal of the second down-converter of the two adjacent second working links The phase shift difference is 180°/m, the phase shift difference between the first phase shifter of the first working link and the second phase shifter of the first second working link is 180°/m, input the first working The phase shift difference between the local oscillator signal of the first down-converter of the link and the local oscillator signal input to the second down-converter of the first second working link is 180°/m.

According to the current working efficiency, the maximum order harmonic that needs to be suppressed can be determined, so as to determine the number of working links of the second working link that needs to be connected. If the current operating frequency f _o (f _i <f _c <f _u ), set the order j of the maximum odd harmonic suppression currently required by the user to the largest odd number not greater than f _o /f _i , the working link The total number is n, where n=(i+1)/2 and n≤m, including (n-1) second working links and one first working link that need to be connected. Wherein, the phase shift of the first phase shifter of the first working link is 0°, and the phase shift of the local oscillator signal of the first down-converter is 0°. The phase shift of the second phase shifter of the i-th second working link in the n-1 second working link is i*180°/n, and the local oscillator signal generator inputs the i-th second working link The phase shift of the local oscillator signal of the second down-converter of the n-way is i*180°/n, and the phase shift difference of the phase shifters of any adjacent two working links in the n-way working links is 180°/n n, the phase shift difference of the down converters of any two adjacent working links is 180°/n.

In the down-conversion process, the phase shift of the fundamental wave and high-order odd harmonic components of the phase-shifted local oscillator signal is different. The phase shift of the fundamental wave component is equal to the phase shift of the local oscillator signal, while the high-order odd harmonic The phase shift of the component is the multiple of the phase shift of the local oscillator signal, and the multiple is the order of the harmonic. This makes it possible for the output results of each working link to have different phases and the same amplitude of the down-conversion components of the fundamental wave of the local oscillator signal and the high-order odd harmonic. Wherein, the phase shift of the down-conversion component of the radio frequency signal output by the first working link is 0°, and the jth order harmonic down-conversion component output in the i-th second working link is:

Among them, w _b is the frequency of the down-conversion component, and the sum of the j-th order harmonic down-conversion component output in the n-way working link is zero, that is:

By superimposing each down-converted frequency component through an adder, harmonics of different orders such as the third, fifth, and seventh orders can be realized, meeting the purpose of flexibly adjusting the link to achieve harmonic suppression.

Embodiment Three

As shown in Figure 3, the following will start from the actual application scenario and take the total working link of the harmonic suppression circuit as n=4 as an example to illustrate that the harmonic with the maximum order of the seventh order can be suppressed, wherein the harmonic suppression circuit includes One adder, one first working link, and three second working links, the working principle is as follows:

The first working link includes a phase shifter and a down-converter, the second working link includes a phase shifter, a down-converter and a switch, the second working link is connected to the adder through the switch, and at the same time, through the control The switches in the second working link are opened or closed to suppress different orders of harmonics, including:

A1. When there is no need to suppress harmonics, the switches SW1, SW2, and SW3 are all disconnected, and only the first working link works;

A2. When the third-order harmonic is suppressed, the switches SW2 and SW3 are disconnected, SW1 is closed, the first working link works and the first working link works;

A3. When the third-order and fifth-order harmonics are suppressed, the switches SW1 and SW2 are closed, and SW3 is opened, and the first working link and the first and second second working links work;

A4. When suppressing the third order, fifth order and seventh order, the switches SW1, SW2 and SW3 are all closed, and all working links are working.

Among them, the phase shifts of the phase shifters of the working link are 0°, 45°, 90° and 135° respectively, and the phase shifts of the local oscillator signals input by the external local oscillator signal generator to the down converter are 0°, 45°, 90° and 135°.

In the above A4, the third-order harmonic, fifth-order harmonic and seventh-order harmonic can be suppressed at the same time. At this time, the phase shifts of the third-order harmonic down-conversion components are: 0°, -90°, -180° and - 270°; the phase shifts of the fifth-order harmonic down-conversion components are: 0°, -180°, 0° and -180°; the phase shifts of the seventh-order harmonic down-conversion components are: 0°, -270°, -180 ° and -90°. The down-converted radio frequency signals of the four working links are superimposed by the adder to achieve the purpose of suppressing the third-order harmonic, the fifth-order harmonic and the seventh-order harmonic.

Embodiment four

As shown in FIG. 4, an embodiment of the present invention also provides a local oscillator signal generator, which is used to provide a local oscillator signal to the harmonic suppression circuit in the embodiment of the present invention. The local oscillator signal generator includes a clock 410, a first A local oscillator signal generating unit and at least one second local oscillator signal generating unit;

The first local oscillator signal generation unit includes a first D flip-flop 421, a second D flip-flop 422 and a first switch 423, and the trigger signal pin of the first D flip-flop 421 is the first output of the local oscillator signal terminal, the in-phase output pin of the first D flip-flop 421 is connected to the trigger signal of the second D flip-flop 422, and the trigger signal pin of the second D flip-flop 422 is the first Two output terminals, the same-phase pin of the second D flip-flop 422 is connected to one end of the first switch 423, and the other end of the first switch 423 is connected to the trigger signal of the first D flip-flop 421 The pins are connected;

The second local oscillator signal production unit includes a first D flip-flop 431, a tail trigger 432 and a switch 433, and the trigger signal pin of the first D flip-flop 431 is connected to the second trigger pin of the first local oscillator signal generation unit. The same-phase output pin of the first D flip-flop 431 is connected to the trigger signal pin of the tail D flip-flop 432, and the same-phase output pin of the tail D flip-flop 432 The output pin is connected to one end of the switch 433, and the other end of the switch 433 is connected to the trigger signal pin of the first D flip-flop 421 of the first local oscillator signal generating unit;

Clock signal pins of the first D flip-flop 421 , the second D flip-flop 422 , the first D flip-flop 431 and the tail D flip-flop 432 are all connected to the clock 410 .

Wherein, the total number of the D flip-flops of the first local oscillator signal generating unit and the D flip-flops of the second local oscillator signal generating unit can be 2m, and the number of switches m, loi is the i-th working link of the harmonic suppression circuit The local oscillator signal input source of the down-converter, that is, when the first D flip-flop of the first local oscillator signal generating unit is used as the first trigger, the local oscillator signal of the i-th D flip-flop is input to the i-th working chain down-converter. In the 2m D flip-flops, the first m initial values are set to 1, and the last m initial values are set to 0, the local oscillator signal of loi in the first m D flip-flops is (i-1)180°/m, and the clock The frequency is twice the frequency of the local oscillator signal.

Embodiment five

As shown in Figure 5, the following will start from the actual application scenario. When m=4, the local oscillator signal generator includes 4 D flip-flops, 4 switches and 1 clock, and the initial value of the first 4 D flip-flops is set to 1. , the initial value of the last four D flip-flops is set to 0, and its working principle is explained as follows:

B1. When it is necessary to generate local oscillator signals with different phase shifts among the four, the switches S1, S2, and S3 are opened, and S4 is closed. The initial values of the first 4 D flip-flops are set to 1, and the initial values of the last 4 D flip-flops are set to 0. , the clock frequency is 8 times the frequency of the local oscillator signal;

B2. When it is necessary to generate three kinds of local oscillator signals with different phase shifts, the switches S1, S2, and S4 are opened, and S3 is closed. The initial value of the first three D flip-flops is set to 1, and the initial value of the last three D flip-flops is set to 0. , the clock frequency is 6 times the frequency of the local oscillator signal;

B3. When it is necessary to generate two kinds of local oscillator signals with different phase shifts, the switches S1, S3, and S4 are opened, and S2 is closed. The initial value of the first two D flip-flops is set to 1, and the initial value of the last two D flip-flops is set to 0. , the clock frequency is 4 times the frequency of the local oscillator signal;

B4. When it is necessary to generate a phase-shifted local oscillator signal, the switches S2, S3, and S4 are opened, and S1 is closed. The initial value of the first D flip-flop is set to 1, and the initial value of the last D flip-flop is set to 0. The clock frequency is twice the frequency of the local oscillator signal.

The local oscillator signals generated by the first four D flip-flops are respectively used as the input sources of the down-converter of the harmonic suppression circuit in the third embodiment, the phase shift of the local oscillator signals generated by the first D flip-flop is 0°, and the phase shift of the second D flip-flop is 0°. The phase shift of the local oscillator signal generated by the first D flip-flop is 45°, the phase shift of the local oscillator signal generated by the third D flip-flop is 90°, and the phase shift of the local oscillator signal generated by the fourth D flip-flop is 135° °.

In the present invention, the radio frequency signal is respectively input into one first working link and at least one second working link, the phase shifter of each working link adjusts the phase shift, and then down-converts the frequency with the local oscillator signal input into the down converter , each down-converted RF signal is input to the adder for superimposition, thereby suppressing the harmonics and avoiding the interference of the harmonics on the RF signal, and selecting the number of working links of the second working link according to the needs to meet the requirements of suppressing different order The scheme is simple and convenient, and effectively suppresses the harmonic interference in down-conversion.

The harmonic suppression method and circuit provided by the present invention have been introduced in detail above. For those of ordinary skill in the art, according to the idea of the embodiment of the present invention, there will be changes in the specific implementation and application range. In summary, the contents of this specification should not be construed as limiting the present invention.

Claims (10)

1. A harmonic suppression method, characterized in that, comprising: The radio frequency signal is respectively input into the first working link and at least one second working link of the harmonic suppression circuit, the first working link includes a first phase shifter and a first down-converter, and the second working link The circuit includes a second phase shifter, a second down converter and a switch; The radio frequency signal input to the first working link is adjusted for phase shift through the first phase shifter, and the radio frequency signal input to the second working link is adjusted for phase shift through the second phase shifter; The radio frequency signal after the phase shift is adjusted by the first phase shifter is down-converted by the first down-converter and the local oscillator signal input to the first down-converter to obtain the first down-converted radio frequency signal. The radio frequency signal after the phase shift is adjusted by the second phase shifter is down-converted through the second down-converter and the local oscillator signal input to the second down-converter to obtain a second down-converted radio frequency signal; Both the first down-converted radio frequency signal and the second down-converted radio frequency signal are input to the adder of the harmonic suppression circuit for superposition. 2. The harmonic suppression method according to claim 1, characterized in that the phase shift difference of the phase shifters of the adjacent two working links is 180°/m, and the lower input of the adjacent two working links The phase shift difference of the local oscillator signal of the frequency converter is 180°/m. 3. The harmonic suppression method according to claim 2, wherein the value of m is determined by the frequency range of the radio frequency signal to be detected, or The m is the total number of working links of the first working link and the second working link. 4. A harmonic suppression circuit, characterized in that it comprises an adder (210), a first working link (220) and at least one second working link (230); The first working link (220) includes a first phase shifter (221) and a first downconverter (222), and the input end of the first phase shifter (221) is connected to an input source of a radio frequency signal , the output terminal of the first phase shifter (221) is connected with the first input terminal of the first down-converter (222), and the second input terminal of the first down-converter (222) is connected with this The input source of vibration signal is connected, and the output end of described first down-converter (222) is connected with the first input end of described adder (210); The second working link (230) includes a second phase shifter (231), a second down-converter (232) and a switch (233), and the input terminal of the second phase shifter (231) is connected to the The input source of the radio frequency signal is connected, the output end of the second phase shifter (231) is connected with the first input end of the second down converter (232), and the second down converter (232) The second input end of the second input terminal is connected with the input source of the local oscillator signal, the output end of the second down-converter (232) is connected with one end of the switch (233), and the other end of the switch (233) is connected with the The second input terminals of the adder (210) are connected. 5. The harmonic suppression circuit according to claim 4, characterized in that, the phase shift difference of the phase shifters of the adjacent two working links is 180°/m, and the lower input of the adjacent two working links The phase shift difference of the local oscillator signal of the frequency converter is 180°/m. 6. The harmonic suppression circuit according to claim 5, wherein the value of the m is determined by the frequency range of the radio frequency signal to be detected, or Said m is the total number of working links of the first working link (220) and the second working link (230). 7. The harmonic suppression circuit according to any one of claims 4-6, characterized in that, the input source of the local oscillator signal is a local oscillator signal generator. 8. The harmonic suppression circuit according to claim 7, wherein the local oscillator signal generator comprises a clock, a first local oscillator signal generating unit and at least one second local oscillator signal generating unit; The first local oscillator signal generation unit includes a first D flip-flop, a second D flip-flop and a first switch, the trigger signal pin of the first D flip-flop is connected to the first lower pin of the first working link The second input end of the frequency converter is connected, the same-phase output pin of the first D flip-flop is connected to the trigger signal pin of the second D flip-flop, and the second D trigger signal pin is connected to the The second input end of the second down-converter of the second working link is connected, the same-phase output pin of the second D flip-flop is connected with one end of the first switch, and the first switch The other end is connected to the trigger signal pin of the first D flip-flop; The second local oscillator signal generating unit includes a switch, a first D flip-flop and a tail D flip-flop, the trigger signal pin of the first D flip-flop is connected to the second D flip-flop of the first local oscillator signal generating unit The same-phase output pin is connected, the same-phase output pin of the first D flip-flop is connected to the trigger signal pin of the tail flip-flop, and the same-phase output pin of the tail D flip-flop is connected to one end of the switch connected, the other end of the switch is connected to the trigger signal pin of the first D flip-flop of the first local oscillator signal generating unit; The clock signal pins of the first D flip-flop, the second D flip-flop, the first D flip-flop and the last D flip-flop are all connected to the clock. 9. The harmonic suppression circuit according to claim 8, wherein the total number of the D flip-flops of the first local oscillator signal generating unit and the D flip-flops of the second local oscillator signal generating unit is 2m , the number of the switches is m, and the m is a positive integer. 10. The harmonic suppression circuit according to claim 8, wherein the first D flip-flop of the ith local oscillator signal generating unit is the i-th D flip-flop, and the trigger signal of the i-th D flip-flop The pin is connected to the second input end of the down converter of the i-th working link.

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