CN1707961B - Zero intermediate frequency radio receiver second-order inter-modulation automatic correcting circuit - Google Patents
Zero intermediate frequency radio receiver second-order inter-modulation automatic correcting circuit Download PDFInfo
- Publication number
- CN1707961B CN1707961B CN 200410025017 CN200410025017A CN1707961B CN 1707961 B CN1707961 B CN 1707961B CN 200410025017 CN200410025017 CN 200410025017 CN 200410025017 A CN200410025017 A CN 200410025017A CN 1707961 B CN1707961 B CN 1707961B
- Authority
- CN
- China
- Prior art keywords
- signal
- frequency
- calibration
- mixer
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000010355 oscillation Effects 0.000 claims abstract description 9
- 230000008054 signal transmission Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 9
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000001914 filtration Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005755 formation reaction Methods 0.000 description 1
Images
Landscapes
- Superheterodyne Receivers (AREA)
Abstract
The present invention discloses an automatic correcting circuit of second-order intermodulation performance for a zero-IF wireless receiver. A carrier wave with the frequency fLO as a local oscillation signal is respectively input in a frequency mixer and an input terminal of a correction signal generator. The correction signal generator outputs a correction signal with the frequency 1/2fRF to a balance unit, and the correction signal is converted by the balance unit into one differential signal to an FR input terminal of the frequency mixer. One DC deviation signal is generated through the frequency mixer and is output to an A/D converter circuit for converting into a digital signal and entering a digital correcting circuit. The digital correcting circuit selects a corresponding control electrical level according to the size of the DC deviation signal to adjust the frequency mixer and make the DC deviation signal to be the lowest value. The invention can effectively suppress the intermodulation interference caused by even-order nonlinearity, avoid the signal receiving block caused by the even-order and the increase of the error rate, and ensure the normal operation of the system. The automatic correcting circuit of the invention can be used for the wireless FR direct variable frequency receiver.
Description
Technical field
The present invention relates to radio-frequency transmitter, particularly relate to a kind of auto-calibration circuits of zero intermediate frequency wireless receiver second order inter-modulation performance.
Background technology
Traditional radio-frequency transmitter adopts the superhet structure, and its circuit structure is as shown in Figure 1.It utilizes double conversion that radiofrequency signal is at first transformed to high intermediate frequency, transforms to base band again, between module, adopts the filter of high quality factor outside the sheet, therefore has highly sensitive good selective.Obviously, in the superhet structure, idol time non-linear generation intermodulation product can not disturbed intermediate-freuqncy signal by the coupling capacitance filtering of sheet outer filter and intermodule.But because sheet outer filter and a large amount of outer members, level of integrated system is difficult to improve, and needs a plurality of oscillators, to take power consumption also very high.
Along with the progress of technological level and the raising that level of integrated system is required, more and more to the research and the design of zero intermediate frequency wireless receiver.Fig. 2 is existing zero intermediate frequency wireless receiver block diagram.Its adopts single-conversion that radiofrequency signal is converted directly to base band, compares with the superhet structure, have low in energy consumption, the high tangible advantage of integrated level.But the DC deviation of idol time non-linear generation and the self-mixing that carrier leak causes all can directly disturb zero intermediate frequency signals.The intermodulation product of idol time non-linear generation drops in the signal band, can't pass through electric capacity or filter filtering.
Adopt difference channel can effectively suppress idol time nonlinearity product; But the deviation of the asymmetric and technology of circuit is inevitable; DC deviation that is produced and second order intermodulation product can cause signal reception congestion and the error rate to improve, even let the system can't operate as normal.Therefore need a cover can detect idol time nonlinearity product, and improve the calibration circuit of second order inter-modulation performance through automatic adjusting.
Summary of the invention
The technical problem that the present invention solves provides a kind of auto-calibration circuits of zero intermediate frequency wireless receiver; It can effectively suppress the Intermodulation Interference of idol time non-linear generation; The reception signal jam and the error rate of avoiding Intermodulation Interference to cause increase, and guarantee system's operate as normal.
For solving the problems of the technologies described above, zero intermediate frequency wireless receiver second order inter-modulation auto-calibration circuits of the present invention comprises frequency mixer and calibration signal generator, and frequency is f
LOCarrier wave as the local oscillation signal input of input mixer and calibration signal generator respectively, the calibration signal generator output frequency does
Calibrating signal and input to balancing unit; Convert the rf inputs of differential signal input mixer into through this balancing unit; Produce DC deviation through the frequency mixer mixing; This DC deviation signal input analog-to-digital converter converts digital signal to and gets into digital calibration circuit, and this digital calibration circuit selects control corresponding level adjustment frequency mixer to make the DC deviation signal reach minimum according to the size of DC deviation signal; The transmission of calibration signal generator and calibrating signal need be calibrated enable signal and started.
The present invention is through detecting the idol time non-linear DC deviation that causes; Give digital calibration circuit through analog-to-digital conversion; Digital calibration circuit searches one group of best control level adjustment frequency mixer according to the size of DC deviation; Reduce the Intermodulation Interference of idol time non-linear generation, make zero intermediate frequency wireless receiver second order inter-modulation performance reach optimum.
Description of drawings
Below in conjunction with accompanying drawing and embodiment the present invention is done further explain:
Fig. 1 is traditional superhet radio-frequency transmitter block diagram;
Fig. 2 is existing zero intermediate frequency wireless receiver block diagram;
Fig. 3 is the auto-calibration circuits block diagram of zero intermediate frequency wireless receiver of the present invention;
Fig. 4 is a calibration signal generator block diagram among Fig. 3;
Fig. 5 is traditional Ji Bote frequency mixer block diagram;
Fig. 6 is the Ji Bote frequency mixer block diagram that the present invention increases bias current and load adjustable array.
Embodiment
Fig. 3 is the auto-calibration circuits block diagram of zero intermediate frequency wireless receiver of the present invention.After zero intermediate frequency wireless receiver calibration function starts; Low noise amplifier 1 is not worked under the control of calibration enable signal, by the auto-calibration circuits work of calibration signal generator 3, balancing unit (BALUN) 2, Ji Bote frequency mixer 4, analog to digital converter 5, digital calibration circuit 6 formations.Lucky baud frequency mixer 4 needed local oscillation signals are that frequency is f
LO=f
RFCarrier wave, this carrier wave is input to calibration signal generator 3, produces frequency component to do
Calibrating signal, convert the rf inputs that differential signal enters into Ji Bote frequency mixer 4 into through balancing unit 2.Frequency is
As a calibration signal mixer nonlinearities produce
even harmonics.Because the mismatch of the asymmetric and device of circuit layout, even-order harmonic can't be offset, and wherein, second harmonic component is maximum, and identical with carrier frequency, and both mixing produce DC deviation.The DC deviation that produces gets into digital calibration circuit 6 through analog to digital converter 5.This digital calibration circuit 6 combines certain algorithm to find one group of Optimal Control level adjustment Ji Bote frequency mixer to make DC deviation reach minimum rapidly according to the size of DC deviation.The transmission of calibration signal generator and calibrating signal is started by the calibration enable signal.
In order effectively to detect idol time nonlinearity product, after calibration started, at balancing unit 2 inputs, frequency did
The calibrating signal component should be enough big, and frequency is f
RFThe radiofrequency signal component should be low as far as possible.In addition, when calibration is not worked, should guarantee low noise amplifier 1 operate as normal.Fig. 4 is calibration signal generator 3 circuit block diagrams in the auto-calibration circuits shown in Figure 3, and it changes single-end circuit 9 by high speed two-divider 8 and the difference that comprises resonant network and constitutes.Frequency is f
LO=f
RFLocal oscillation signal to be carrier wave produce the differential signal of multiple-harmonic components through two-divider 8, wherein do with frequency
Component is main, and behind difference commentaries on classics single-end circuit 9, differential signal converts single-ended signal into, and frequency does simultaneously
Component be that calibrating signal is exaggerated, and frequency is f
RFComponent be suppressed.Zero intermediate frequency wireless receiver shown in Figure 3 also can adopt harmonic mixer.Local oscillation signal and calibrating signal all are that frequency does when adopting harmonic mixer
Carrier wave.Simultaneously, calibration signal generator shown in Figure 4 only need comprise the difference of resonant network changes single-end circuit 9, need not high speed two-divider 8.
Fig. 5 is traditional Ji Bote mixer figure, and it is by radio-frequency driven level M1～M2, local oscillator switching stage M3～M6, and load output stage R1～R2 and biasing circuit constitute.Frequency mixer 4 among Fig. 3 be the present invention on the basis of Fig. 5, increased output loading and bias current adjustable array, its circuit is as shown in Figure 6.Said output loading adjustable array is the parallelly connected some groups of circuit that are in series by load R1～R6 and control switch S1～S6 of Ji Bote mixer load output stage, and said bias current adjustable array is the parallelly connected some groups of circuit that are in series by bias current Iref1～Iref6 and control switch S7～S12 in biasing circuit.The control end of the control switch S1～S6 of load adjustable array and the control switch S7～S12 of bias current adjustable array is controlled by one group of level that the digital calibration circuit among Fig. 36 produces.Digital calibration circuit 6 utilizes certain algorithm search to making DC deviation reach one group of control level of minimum, and calibration finishes.And this bias current and output loading adjustable array are equally applicable to harmonic mixer.Vout+ among Fig. 5,6 is the mixing output plus terminal, and Vout-is a mixing output negative terminal, and VLO+ is a local oscillator input anode; VLO-is a local oscillator input negative terminal, and VB+ is the bias voltage anode, and VB-is the bias voltage negative terminal; Vrf+ is a radio frequency input anode, and Vrf-is a radio frequency input negative terminal, and lref is a bias current.
Claims (6)
1. the auto-calibration circuits of a zero intermediate frequency wireless receiver, it comprises frequency mixer, it is characterized in that: also comprise calibration signal generator, frequency is f
LOCarrier wave as the local oscillation signal input of input mixer and calibration signal generator respectively, the calibration signal generator output frequency does
Calibrating signal and input to balancing unit; Convert the rf inputs of differential signal input mixer into through this balancing unit; Produce the DC deviation signal through the frequency mixer mixing; This DC deviation signal input analog-to-digital converter converts digital signal to and gets into digital calibration circuit, and this digital calibration circuit selects control corresponding level adjustment frequency mixer to make the DC deviation signal reach minimum according to the size of DC deviation signal; Calibrating signal transmission between the startup of calibration signal generator, calibration signal generator and the balancing unit is by the control of calibration enable signal.
2. the auto-calibration circuits of zero intermediate frequency wireless receiver as claimed in claim 1 is characterized in that: said frequency mixer is the Ji Bote frequency mixer, the frequency f of local oscillation signal when adopting the Ji Bote frequency mixer
LOFrequency f with radiofrequency signal
RFEquate f
LO=f
RF
3. the auto-calibration circuits of zero intermediate frequency wireless receiver as claimed in claim 2 is characterized in that: said calibration signal generator changes single-end circuit by high speed two-divider and the difference that comprises resonant network and constitutes, and frequency is f
LO=f
RFLocal oscillation signal produce the differential signal of multiple-harmonic component through two-divider, change single-end circuit through difference again and convert differential signal into single-ended signal, frequency does simultaneously
Component be exaggerated, and frequency is f
RFComponent be suppressed.
4. the auto-calibration circuits of zero intermediate frequency wireless receiver as claimed in claim 1; It is characterized in that: said frequency mixer is a harmonic mixer, local oscillation signal frequency
when adopting harmonic mixer.
5. like the auto-calibration circuits of claim 1 or 4 described zero intermediate frequency wireless receivers, it is characterized in that: said calibration signal generator changes single-end circuit by the difference that comprises resonant network and constitutes.
6. like the auto-calibration circuits of claim 2 or 4 described zero intermediate frequency wireless receivers; It is characterized in that: said lucky baud frequency mixer or harmonic mixer also can insert bias current and output loading adjustable array; Said output loading adjustable array is Ji Bote frequency mixer or some groups of circuit that are in series by load and control switch of harmonic mixer load output stage parallel connection; Said bias current adjustable array is the parallelly connected some groups of circuit that are in series by bias current and control switch in biasing circuit, and the control switch of the control switch of load adjustable array and bias current adjustable array is controlled by one group of level that digital calibration circuit produces.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410025017 CN1707961B (en) | 2004-06-09 | 2004-06-09 | Zero intermediate frequency radio receiver second-order inter-modulation automatic correcting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410025017 CN1707961B (en) | 2004-06-09 | 2004-06-09 | Zero intermediate frequency radio receiver second-order inter-modulation automatic correcting circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1707961A CN1707961A (en) | 2005-12-14 |
| CN1707961B true CN1707961B (en) | 2012-07-04 |
Family
ID=35581646
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200410025017 Expired - Fee Related CN1707961B (en) | 2004-06-09 | 2004-06-09 | Zero intermediate frequency radio receiver second-order inter-modulation automatic correcting circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1707961B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101803179B (en) * | 2007-09-14 | 2013-02-13 | 高通股份有限公司 | Offset correction for passive mixers |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101072040B (en) * | 2007-06-13 | 2013-07-31 | 展讯通信（上海）有限公司 | Method and device for suppressing carrier leakage |
| CN101330332B (en) * | 2007-06-22 | 2011-10-26 | 中兴通讯股份有限公司 | Zero intermediate frequency calibration method for board for receiving and sending message |
| JP4977570B2 (en) * | 2007-10-03 | 2012-07-18 | 株式会社日立製作所 | DIGITAL CALIBRATION TYPE ANALOG / DIGITAL CONVERTER AND RADIO RECEIVING CIRCUIT AND RADIO TRANSMITTING / RECEIVER CIRCUIT USING THE SAME |
| US8559905B2 (en) * | 2007-12-05 | 2013-10-15 | Viasat, Inc. | Systems, devices, and methods for suppressing frequency spurs in mixers |
| CN101183923B (en) * | 2007-12-07 | 2011-03-09 | 中兴通讯股份有限公司 | Method of implementing index optimization of zero intermediate frequency scheme |
| CN101183922B (en) * | 2007-12-07 | 2011-03-09 | 中兴通讯股份有限公司 | Method of implementing temperature compensation in zero intermediate frequency scheme |
| CN101222741B (en) * | 2008-01-25 | 2012-07-18 | 中兴通讯股份有限公司 | Device and method for calibrating zero intermediate frequency transmitting parameter of base station |
| CN101594163B (en) * | 2008-05-28 | 2012-11-14 | 北京中电华大电子设计有限责任公司 | Receiving and transmitting method based on WLAN zero intermediate frequency structure and device thereof |
| CN101394218B (en) * | 2008-11-05 | 2012-11-21 | 浙江新时讯通信技术有限公司 | Digital circuit for mobile communication radio frequency signal |
| ES2406705T3 (en) * | 2008-12-12 | 2013-06-07 | St-Ericsson Sa | Method and system of calibration of a second order intermodulation interception point of a radio transceiver |
| CN102457297A (en) * | 2010-10-19 | 2012-05-16 | 中国科学院微电子研究所 | Wireless transceiver |
| CN102957642B (en) * | 2011-08-24 | 2016-04-27 | 上海凯芯微电子有限公司 | A kind of receive data by wireless system and method for reseptance thereof |
| CN104012006B (en) * | 2011-11-03 | 2015-09-09 | 华为技术有限公司 | The compensation equipment of asymmetric broad passband frequency response in the receiver with 25% duty cycle passive frequency mixer |
| CN102832959B (en) * | 2012-08-22 | 2015-01-21 | 天津大学 | Radio-frequency front end in high and medium frequency superheterodyne+zero intermediate frequency structure |
| CN107026664B (en) * | 2017-03-07 | 2019-06-07 | 四川海格恒通专网科技有限公司 | A kind of method of cancellation receiver Intermodulation Interference |
| CN109299626B (en) * | 2018-10-29 | 2022-03-15 | 丁天威 | RFID card reader receiving and sending device and system |
| CN111490801A (en) * | 2019-01-29 | 2020-08-04 | 上海川土微电子有限公司 | Radio frequency receiver architecture with adjustable image rejection ratio |
| CN112825487B (en) * | 2019-11-18 | 2024-03-15 | 深圳市中兴微电子技术有限公司 | Radio frequency receiving link and radio frequency transceiver |
| CN113132030A (en) * | 2019-12-30 | 2021-07-16 | 中兴通讯股份有限公司 | Calibration method and device of receiver and receiver |
| CN112305321A (en) * | 2020-10-22 | 2021-02-02 | 济南浪潮高新科技投资发展有限公司 | System and method for debugging amplitude stability of AWG (arrayed waveguide grating) direct-current signal |
| CN116388779A (en) * | 2021-12-23 | 2023-07-04 | 深圳市中兴微电子技术有限公司 | Signal processing circuit, chip, circuit board assembly and radio frequency transceiver |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1200209A (en) * | 1996-09-06 | 1998-11-25 | 菲利浦电子有限公司 | A zero-IF receiver |
| CN1206252A (en) * | 1997-03-13 | 1999-01-27 | 阿尔卡塔尔-阿尔斯托姆通用电气公司 | Apparatus for suppressing interfering DC component shifts in radio receiver of direct conversion type, and corresponding method of suppression |
| CN1397108A (en) * | 2000-11-23 | 2003-02-12 | 皇家菲利浦电子有限公司 | DC-offset correction circuit having DC control loop and DC blocking circuit |
-
2004
- 2004-06-09 CN CN 200410025017 patent/CN1707961B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1200209A (en) * | 1996-09-06 | 1998-11-25 | 菲利浦电子有限公司 | A zero-IF receiver |
| CN1101091C (en) * | 1996-09-06 | 2003-02-05 | 皇家菲利浦电子有限公司 | A zero-IF receiver |
| CN1206252A (en) * | 1997-03-13 | 1999-01-27 | 阿尔卡塔尔-阿尔斯托姆通用电气公司 | Apparatus for suppressing interfering DC component shifts in radio receiver of direct conversion type, and corresponding method of suppression |
| CN1397108A (en) * | 2000-11-23 | 2003-02-12 | 皇家菲利浦电子有限公司 | DC-offset correction circuit having DC control loop and DC blocking circuit |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101803179B (en) * | 2007-09-14 | 2013-02-13 | 高通股份有限公司 | Offset correction for passive mixers |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1707961A (en) | 2005-12-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1707961B (en) | Zero intermediate frequency radio receiver second-order inter-modulation automatic correcting circuit | |
| US8099070B2 (en) | Passive mixer and four phase clocking method and apparatus | |
| US11418149B2 (en) | Re-configurable passive mixer for wireless receivers | |
| US6313688B1 (en) | Mixer structure and method of using same | |
| CN101331678B (en) | Switching circuit, and a modulator, demodulator or mixer including such a circuit, its operation method | |
| US7792215B2 (en) | Direct-conversion receiver and sub-harmonic frequency mixer thereof | |
| US7653372B2 (en) | Communication device, mixer and method thereof | |
| US8212602B2 (en) | System and method for signal mixing based on high order harmonics | |
| US7542521B2 (en) | Direct-conversion frequency mixer | |
| GB2249679A (en) | Mixer for direct conversion receiver | |
| CN101232296B (en) | Radio-frequency front-end circuit, frequency mixing device and conversion method for reducing frequency for radio-frequency device | |
| US6937849B2 (en) | Mixing apparatus | |
| US11057069B2 (en) | Radio frequency (RF) front end of low power consumption and fully automatic adjustable broadband receiver | |
| CN101964643B (en) | Self-adaptive broadband quadrature phase-shift circuit and application thereof | |
| EP1653695A2 (en) | I/Q quadrature demodulator with single common voltage to current input stage for both I and Q | |
| US20040174199A1 (en) | Multiplier circuit | |
| US7085548B1 (en) | Harmonic mixer | |
| US8269551B2 (en) | Complex filter and calibration method | |
| US8718591B2 (en) | Discrete time polyphase mixer | |
| CN115765772A (en) | Low-power-consumption frequency-mixing priority type broadband receiver front-end module | |
| CN102132488B (en) | Phase-detector for detecting phase difference pi/2n | |
| CN210075212U (en) | Software radio receiver | |
| CN114629441A (en) | Correction method for suppressing harmonic waves of passive down-mixer of receiver | |
| US6970687B1 (en) | Mixer | |
| CN102347730B (en) | Mixer for eliminating second-order inter-modulation distortion and relevant transconductor circuit of mixer |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| ASS | Succession or assignment of patent right |
Owner name: TIANJIN BINHAI COMLENT SCIENCE AND TECHNOLOGY CO., Free format text: FORMER OWNER: COMLENT TECHNOLOGIES (SHANGHAI) INC. Effective date: 20120206 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 201203 PUDONG NEW AREA, SHANGHAI TO: 300384 NANKAI, TIANJIN |
|
| TA01 | Transfer of patent application right |
Effective date of registration: 20120206 Address after: 300384 Tianjin Huayuan Industrial Zone Haitai development six road 6 Haitai green industry base A room 502-8 Applicant after: Dingxin Communication (Shanghai) Co., Ltd. Address before: 201203 Shanghai City Songtao road Zhangjiang hi tech Park No. 563 block A room 211 Applicant before: Dingxin Communication Co., Ltd., Shanghai |
|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| PP01 | Preservation of patent right |
Effective date of registration: 20121130 Granted publication date: 20120704 |
|
| RINS | Preservation of patent right or utility model and its discharge | ||
| PD01 | Discharge of preservation of patent |
Date of cancellation: 20130530 Granted publication date: 20120704 |
|
| RINS | Preservation of patent right or utility model and its discharge | ||
| ASS | Succession or assignment of patent right |
Owner name: NANJING ZICHEN DINGXIN MICROELECTRONIC CO., LTD. Free format text: FORMER OWNER: TIANJIN BINHAI COMLENT SCIENCE AND TECHNOLOGY CO., LTD. Effective date: 20140917 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 300384 NANKAI, TIANJIN TO: 211100 NANJING, JIANGSU PROVINCE |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20140917 Address after: 211100 Jiangning Province Economic and Technological Development Zone, Jiangsu City, No. Sheng Tai Road, No. 68 Patentee after: Nanjing Chen Ding Ding Microelectronics Co., Ltd. Address before: 300384 Tianjin Huayuan Industrial Zone Haitai development six road 6 Haitai green industry base A room 502-8 Patentee before: Dingxin Communication (Shanghai) Co., Ltd. |
|
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120704 Termination date: 20160609 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |