CN102567560A - Method and system for estimating service life of MOS (Metal Oxide Semiconductor) device - Google Patents

Method and system for estimating service life of MOS (Metal Oxide Semiconductor) device Download PDF

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CN102567560A
CN102567560A CN2010106217945A CN201010621794A CN102567560A CN 102567560 A CN102567560 A CN 102567560A CN 2010106217945 A CN2010106217945 A CN 2010106217945A CN 201010621794 A CN201010621794 A CN 201010621794A CN 102567560 A CN102567560 A CN 102567560A
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parameter
mos
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service life
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王群勇
阳辉
钟征宇
陈冬梅
白桦
刘燕芳
吴文章
陈宇
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BEIJING SAN-TALKING TESTING ENGINEERING ACADEMY Co Ltd
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Abstract

The invention discloses a method for estimating service life of an MOS (Metal Oxide Semiconductor) device. The method comprises the steps of: analyzing the relevance of a physical failure mechanism and a device macroparameter degradation, constructing a device macroparameter degradation model based on the physical failure mechanism; carrying out reliability analog simulation on a device, analyzing the sensitivity of the device macroparameter degradation to the physical failure mechanism; selecting a stress applying mode, carrying out a parameter degradation service life-based test on the device and obtaining reliability test data; analyzing the reliability test data, establishing a parameter degradation-based service life estimating computing model; and obtaining a service life estimating result of the device according to the service life estimating computing model. By using the method, the problems of accuracy and maneuverability of the traditional device service life predicting method under the novel technical conditions are solved, the quantity of test samples is reduced, the testing cost is lowered, and the accuracy of predicting the testing result is improved.

Description

MOS method for predicting device lifetime and system
Technical field
The present invention relates to technical field of semiconductors, particularly relate to a kind of MOS (Metal Oxid Semiconductor) method for predicting device lifetime and system.
Background technology
China is highly reliable, the long-life integrated circuit when realizing design immediately following the international semiconductor technical development, producing the great-leap-forward progress, also face the challenge of reliability and test aspect.Highly reliable, long-life MOS device adaptability, stability under varying environment, particularly each other suitability have strict requirement, and therefore highly reliable, long-life MOS device proposes requirements at the higher level to q&r.
On the other hand; Along with development of technology; The MOS device particularly large-scale digital ic crash rate with compared significant reduction in the past; Device traditional based on time-lost efficacy hardly in the life-span wire examination method of inefficacy, research institute is difficult to obtain the information of device reliability through test, has restricted the research of technique of long-life MOS device.
Following highly reliable, long-life MOS device performance index, environmental suitability and reliability requirement will significantly improve; Technology such as traditional durability test and burn-in screen test can not satisfy the demands; Need research and the test evaluation method that the development of MOS device is complementary, solve a long-life fail-test evaluation method difficult problem.
MOS component failure mechanism generally comprises electromigration (EM), hot carrier is injected (HCI), gate oxide time breakdown (TDDB), negative bias thermal instability (NBTI) etc., and these failure mechanisms are being arranged the life-span and the reliability of MOS device.Along with the use of device dimensions shrink and new material also brings the research and analysis demand to component failure mechanism and failure mode.The integrity problem of MOS device comprises HCI, NBTI, EM, TDDB etc., requires that extremely failure mechanism, failure mode are carried out complete test, evaluation and method and made amendment to these new integrity problems.
Under the use of new technology, new material,,, improve long-life test and reliability evaluation result's accuracy for the evaluation of MOS device reliability, long-life estimate to provide technical support like Cu interconnection, high k, low-k materials, SOI etc.For example adopt high k material to help to solve the electric leakage problem of ultra-thin gate dielectric layer in the technology; But the use of high k material is easy to generate some new integrity problems; When forming fixed charge density on polysilicon/high-k dielectric interface, can quicken NBTI effect variation usually and cause threshold voltage, flat-band voltage (flat band) off-set phenomenon.Postpone to turn to use copper interconnected for reducing the parasitic RC relevant for another example from traditional aluminium interconnection technique line with metal interconnecting wires; Though the electrical sheet resistance coefficient of Cu Base Metal interconnection line can reach the half the of Al Base Metal system; But the interconnected processing step that will look for novelty of Cu; And some relevant with it new security risk can appear, the Stress Transfer of bringing like copper enchasing technology causes silicon nitride to be peeled off and causes problems such as short circuit metal.
Therefore, for the MOS device, be badly in need of the biometrics method that a cover is degenerated based on the failure mechanism parameter, for development and examination highly reliable, long-life MOS device provide support.
Summary of the invention
The biometrics method that the purpose of this invention is to provide a kind of MOS device of degenerating based on the failure mechanism parameter.
For achieving the above object, a kind of MOS method for predicting device lifetime according to embodiment of the present invention is provided, comprise the steps:
S1, the correlativity that the physical failure mechanism of analysis device and device bulk parameter are degenerated makes up the device bulk parameter degradation model based on said physical failure mechanism;
S2 carries out the reliability analog simulation to device, and the analysis device bulk parameter is degenerated to the susceptibility of physical failure mechanism;
S3 selects stress to apply mode, and device is carried out based on parameter degeneration durability test and obtains reliability test data;
S4 analyzes above-mentioned reliability test data, sets up the biometrics computation model of degenerating based on parameter;
S5 is according to the biometrics result of above-mentioned biometrics computation model acquisition device.
Preferably, the physical failure mechanism among the said step S1 comprises hot carrier injection, the puncture of time correlation dielectric layer, negative bias instability and/or electromigration.
Preferably, the sensitive parameter hard failure data of data and device over time that comprise device of the reliability test data among the said step S3.
Preferably, among the said step S3, adopt A Lieniwusi model, E model, Aileen's model or its combination to confirm that stress applies mode.
Preferably, said step S4 comprises: the correlativity between the distribution of the various single failure modes of analysis device and the various single failure mode.
The present invention has finally formed a kind of biometrics method of degenerating based on the parameter of failure mechanism through the analysis to MOS component failure mechanism, failure mode.Utilize this method to solve traditional devices life-span prediction method accuracy and operability problem under the new technology condition; Reduce number of test specimens, reduce testing expenses, improve and estimate accuracy of experimental results; And theoretical foundation is provided for test findings; The life-span that the failure mechanism that helps research staff and designer to be directed against the MOS device effectively improves device has reduced the test period, the expedite product listing.
Description of drawings
Fig. 1 is the method flow diagram of MOS method for predicting device lifetime of the embodiment of the invention;
Fig. 2 is the synoptic diagram that the transistor degradation of MOS method for predicting device lifetime of the description embodiment of the invention exerts an influence to circuit;
Fig. 3 utilizes the Reliablility simulation analysis tool to carry out reliability analog simulation wiring diagram in MOS method for predicting device lifetime of the embodiment of the invention;
Fig. 4 is the time degenerated curve figure of MOS component failure in existing MOS method for predicting device lifetime;
Fig. 5 be in MOS method for predicting device lifetime of the embodiment of the invention under the different temperatures accelerated test to matrix degenerated curve figure.
Embodiment
Below in conjunction with accompanying drawing and embodiment, specific embodiments of the invention describes in further detail.Following examples are used to explain the present invention, but are not used for limiting scope of the present invention.
The embodiment of the invention is directed against main MOS device physics failure mechanism: HCI, TDDB, EM and NBTI etc., analyze the correlativity that MOS component failure mechanism and device parameters are degenerated, and put out MOS device bulk parameter degradation model in order based on physical failure; Utilize the technical experience and the advanced software and hardware technology equipment in integrated circuit testing and test field; The test and the test platform of design high precision and high stability; IC design unit combines with highly reliable, long-life, chooses and process suitable MOS device and structure, and test is also implemented in design; The susceptibility that analytical test stress applying method and parameter are degenerated forms effectively based on parameter degeneration life test method; Select suitable sample and testing program, through designing a series of demonstration test image data; Adopt international up-to-date data mining and exploratory data analysis technology, analyze the degraded data pattern-recognition, technology such as data fitting and extrapolation technique are set up a kind of biometrics method of degenerating based on the parameter of failure mechanism to the MOS device.As shown in Figure 1, the detailed step of the method for the invention is following:
Step 1: MOS component failure Mechanism analysis
The main MOS device physics failure mechanism of analyzing: HCI, TDDB, EM and NBTI etc., analyze the correlativity that MOS component failure mechanism and device parameters are degenerated, and make up the MOS device bulk parameter degradation model based on physical failure mechanism.
Step 2: the relation of setting up performance degradation sensitive parameter and component failure
HCI model with MaCRO is an example, in MaCRO, causes resistance in series enhancing value Δ R through hot carrier dEmbody the influence that transistor degradation that HCI causes produces circuit, as shown in Figure 2.
The hot carrier of injection grid oxide layer can cause the generation of interface state and oxide layer electric charge, and then causes the variation of channel mobility, threshold voltage, mutual conductance and drain saturation current.The Δ R of these effects through confirming by following formula dValue embodies:
ΔR d = 1 + αΔN I ds 0 V Rd
Δ R in the following formula dIt is the drain terminal resistance in series variable quantity of the MOS transistor that causes of hot carrier's effect; V RdBe Δ R dThe pressure drop at two ends; Δ N is interface state surface density and the oxide layer surface density of charge sum that is caused by hot carrier's effect; α is the constant relevant with technology; I Ds0It is the drain terminal electric current before the MOS transistor hot carrier's effect is degenerated.
Therefore,, can adjust the influence that HCI produces entire circuit through people's value of model parameter for a change, thus more convenient and definite sensitive parameter collection exactly.For effects such as TDDB, NBTI and EM, also can utilize similar method to help to confirm the sensitive parameter collection, so just between physical failure degeneration and device parameters, set up mapping relations.
To dissimilar MOS devices, to find out directly relatedly with component failure, and the bulk parameter that can directly measure in device level constitutes the bulk parameter collection.Utilize existing MOS IC reliability simulation analysis instrument, the MOS circuit is carried out the reliability analog simulation, seek the device level sensitive parameter relevant with physical failure mechanism.Detailed process at first proposes and the most responsive relevant module that lost efficacy shown in Figure of description 3, it is carried out " network level " describe, and reacts failure properties more accurately, for insensitive module, uses " behavioral scaling " to describe; Carry out the circuit Behavior modeling then, carry out dc analysis, transactional analysis, transient analysis and other analysis, confirm circuit direct current, power working points such as (I, V, f, T, P etc.), determine the residing electricity of each transistorized each module, thermal stress environment; Utilize the degradation experiment data of actual measurement that failure model is carried out parameter extraction at last, the substitution degradation model carries out the simulation of crash rate.
In this step,, therefore do not need to extract very accurately the model parameter in the transistor degradation model owing to only need the susceptibility of qualitative analysis device level parameter to the microcosmic failure mechanism; And can be through correlation model parameter value in the adjustment transistor degradation model; Artificial amplification or dwindle different failure mechanisms (HCI, TDDB, NBTI, EM) to the influence of entire circuit utilizes this method can confirm that each parameter is to the susceptibility of diverse microcosmic failure mechanism in the sensitive parameter.
Step 3: proof stress is selected confirming of technology
Device in the test is under the test condition, through to being continuously applied stress by the examination device to detect and the sensitive parameter of sampler data over time.The proof stress condition is different, and the situation of device degradation is also different.For example, generally speaking, test temperature is high more, and the catagen speed of device is fast more.Through improving, also can quicken the degeneration of device by the input of examination device voltage, electric current, frequency.For the digital device of complicacy, need applying of primary study test electric stress, so that unit as much as possible is applied in electric stress.For the selection of accelerated degradation test proof stress, several different methods can be arranged.For example, suppose failure mechanism, to this A Lieniwusi model commonly used owing to hot activation causes.For the situation that has single failure mechanism, usual way is that the 1/T reciprocal with ln (crash rate) and temperature is painted on and will obtains straight line (maybe can adopt the index return match) on the figure; For failure mechanism is by electrically excited situation, TDDB for example, and common model is " an E-model ".If ln (crash rate) is directly proportional with electric-force gradient (Δ V/tox).The figure that draws ln (crash rate) and (Δ V/tox) will obtain a line (or using the index return match); Suppose that inefficacy is what to be caused by two kinds of different stress.For example, TDDB is to temperature and voltage-sensitive.The key of layout strategy is supposition Aileen model fully work (a separable stress); (temperature is a coordinate axis can to construct " space " of a two-dimensional coordinate; Voltage is another coordinate axis), the usage factor design has been surveyed affined zone in the space to confirm stress condition.
Step 4: MOS estimates confirming of model device lifetime
Multiple failure mode possibly cause the MOS component failure, and failure mode is arranged by different physical failure mechanism.In the degradation failure testing data of life-span of reality, include bulk information about device reliability, for example, a plurality of sensitive parameter degraded datas of device and the data of device generation hard failure in degenerative process.MOS estimates that model is exactly to want these reliability test data of analysis-by-synthesis device lifetime, sets up the biometrics computation model of degenerating based on parameter, and draws the biometrics result of device thus.
From the on going result analysis, most inefficacy can trace a degenerative process track.These degeneration tracks can be expressed as three kinds of time degenerated curves: straight line (linear), and concave (concave) and convex line (convex), as shown in Figure 4, horizontal ordinate is represented the time, and ordinate is represented the degeneration of sensitive parameter, and the dotted line among the figure is an invalid position.Straight line mainly characterizes constant degradation ratio; For concave, the degeneration commencing speed is very fast, slowly reaches capacity then and approaches failpoint; Convex line is then different, and speed is slower when just beginning, quick deterioration near failpoint the time.
For accelerated degradation test, degenerated curve also is simultaneously the function that quickens stress except being the function of time.In order to obtain the accelerated life test result, need to consider to quicken stress influence to the extrapolation in operate as normal life-span.For example, quickening the matrix degenerated curve for temperature, is the A Lieniwusi equation if temperature-reaction rate is quickened equation, and the expression formula of reaction rate is:
R(T)=B*exp[-Ea/kB(T+273.15)]
T in the following formula is a Celsius temperature, and kB is a Boltzmann constant, and Ea is an activation energy, the constant that the B representative is relevant with device, and different device B values is different.
The expression formula of speedup factor AF is AF (T)=AF (T, T 0, Ea)=R (T)/R (T 0), wherein, T 0The initial temperature that representative is compared with T.Degenerated curve D (t, expression formula T) be D (t, T)=D ∞ * { 1-exp [{ R (T 0) * AF (T) * t].Accelerated test is as shown in Figure 5 to matrix degenerated curve figure under the different temperatures.Horizontal ordinate is represented the time among the figure, and ordinate is represented the variation of sensitive parameter, and accelerated test was to matrix degenerated curve figure when curve was followed successively by 80 degrees centigrade, 150 degrees centigrade, 195 degrees centigrade and 237 degrees centigrade from top to bottom among the figure.
In order to set up the biometrics model, at first to analyze the distribution of various single failure modes and the correlativity between each single failure mode, its less important distribution of knowing each single failure mechanism.When the crash rate of each failure mode is constant; The relation of fiduciary level, distribution function and the crash rate of reliability R, cumulative distribution function F and total crash rate h and each single failure mechanism that components and parts are total is shown below; Subscript i in the formula is expressed as i single failure mechanism, R i(t) fiduciary level of i single failure mechanism of expression, F i(t) distribution function of i single failure mechanism of expression, h i(t) crash rate of i single failure mechanism of expression.
R ( t ) = Π i = 1 k R i ( t )
F ( t ) = 1 - Π i = 1 k ( 1 - F i ( t ) )
h ( t ) = Σ i = 1 k h i ( t )
Competing risk model is set up the biometrics model through following three steps: the Life Distribution data are observed; The Life Distribution that different failure modes cause losing efficacy is confirmed; And set up the biometrics model.
Competing risk model is based on the more biometrics model of use in the parameter degeneration durability test, has higher accuracy, and it can handle multiple failure mode acting situation simultaneously.All failure mechanisms all work, and see that which failure mechanism at first causes component failure.In this competition process, not interrelated between each failure mechanism, they are to develop along path separately to cause, and the failure mechanism that at first " reaches " causes component failure.
Be exemplified below: supposing is had 2 competition failure modes by the examination components and parts: first failure mode is the soft failure that parameter Y (t) degenerates and causes; Second failure mode is because the hard failure that the termination of components and parts function causes.
Degradation modes is that degradation ratio is the linear regression of constant μ; Measuring error is distributed as stochastic distribution, so parameter degeneration Y (t) can be by following model description:
Y(t)=Y 0+σW(t-t 0)+μ(t-t 0),t≥t 0
Wherein, W (t) is a standard Brownian movement equation.For given failpoint S.Life-span TS is the time that Y (t) arrives S first.For Y 0<S, life-span TS follow the described contrary Gaussian distribution of Legesgne equation.
f TS = S - Y 0 2 πσ 2 ( t - t 0 ) 3 exp ( - ( S - Y 0 - μ ( t - t 0 ) ) 2 2 σ 2 ( t - t 0 ) ) I ( t > t 0 )
Because that survives is not reached failpoint S at the trial by the examination device,, must seek and block the probability density function of Wiener process in order to obtain likelihood equation.Suppose Y J-1, Y jBe t J-1And t jDegradation values constantly is to t J-1≤τ≤t jAnd Y (t) probability density distribution of Y (τ)<S is:
Figure BSA00000409171600082
On the other hand, for the hard failure data, analyze hard failure according to EDA and go out to obey Weibull distribution, probability density function f (t) defines as follows:
f ( t ) = β η ( t η ) β - 1 e - ( t η ) β
The present invention utilizes likelihood method to try to achieve the parameter in the competing risk model, and finding the solution likelihood equation through test figure can be to being made prediction device lifetime by examination, and likelihood equation is following:
L ( x , θ ) = Π i = 1 n { Π j = 1 M i [ 1 σ t ij - t ij - 1 φ [ ( Y ij - Y ij - 1 ) - μ ( t ij - t ij - 1 ) σ t ij - t ij - 1 ] × [ 1 - exp { - 2 ( S - Y ij - 1 ) ( S - Y ij ) σ 2 ( t ij - t ij - 1 ) } ]
&times; [ S - Y iMi &sigma; ( &tau; i - t iMi ) &phi; [ ( S - Y iMi ) - &mu; ( &tau; i - t iMi ) &sigma; ( &tau; i - t iMi ) ] ] I ( Mi < mi ) &delta; &times; [ &beta; &eta; ( t iMi &eta; ) &beta; - 1 e - ( t iMi &eta; ) &beta; ] &delta; e - ( t iMi &eta; ) &beta; }
Wherein,
Figure BSA00000409171600093
Competing risk model is present based on using more biometrics model in the parameter degeneration durability test, in the electronic devices and components biometrics, obtains higher accuracy.The competitive risk pattern is from each single failure mode, and " from bottom to top " constructs the component reliability model.The main thought of competing risk model is that all failure mechanisms all work, and sees that which failure mechanism at first causes component failure.In this competition process, not interrelated between each failure mechanism, they are to develop along path separately to cause, and the failure mechanism that at first " reaches " causes component failure.In this case, component reliability is the product of various failure mode reliabilities, and the failure of elements rate is exactly the summation of each failure mode crash rate.
The present invention has finally formed a kind of biometrics method of degenerating based on the parameter of failure mechanism for the MOS device through the analysis to MOS component failure mechanism and failure mode.For MOS estimates to provide a kind of new method device lifetime, solve traditional devices life-span prediction method accuracy and operability problem under the new technology condition through the present invention, reduce number of test specimens; Reduce testing expenses; Improve and estimate accuracy of experimental results, and for test findings provides theoretical foundation, the life-span that the failure mechanism that helps numerous research staff and designer etc. to be directed against the MOS device effectively improves device; Reduced the test period, the expedite product listing.
The above only is a preferred implementation of the present invention; Should be pointed out that for those skilled in the art, under the prerequisite that does not break away from know-why of the present invention; Can also make some improvement and modification, these improve and modification also should be regarded as protection scope of the present invention.

Claims (5)

1. MOS method for predicting device lifetime is characterized in that, said biometrics method comprises:
S1, the correlativity that the physical failure mechanism of analysis device and device bulk parameter are degenerated makes up the device bulk parameter degradation model based on said physical failure mechanism;
S2 carries out the reliability analog simulation to device, and the analysis device bulk parameter is degenerated to the susceptibility of physical failure mechanism;
S3 selects stress to apply mode, and device is carried out based on parameter degeneration durability test and obtains reliability test data;
S4 analyzes above-mentioned reliability test data, sets up the biometrics computation model of degenerating based on parameter;
S5 is according to the biometrics result of above-mentioned biometrics computation model acquisition device.
2. MOS method for predicting device lifetime as claimed in claim 1 is characterized in that, the physical failure mechanism among the said step S1 comprises hot carrier injection, the puncture of time correlation dielectric layer, negative bias instability and/or electromigration.
3. MOS method for predicting device lifetime as claimed in claim 1 is characterized in that, the sensitive parameter that the reliability test data among the said step S3 comprises device is the hard failure data of data and device over time.
4. MOS method for predicting device lifetime as claimed in claim 1 is characterized in that, among the said step S3, adopts A Lieniwusi model, E model, Aileen's model or its combination to confirm that stress applies mode.
5. MOS method for predicting device lifetime as claimed in claim 1 is characterized in that said step S4 comprises: the correlativity between the distribution of the various single failure modes of analysis device and the various single failure mode.
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