CN102567213B - Writing balancing method of phase change memory - Google Patents
Writing balancing method of phase change memory Download PDFInfo
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- CN102567213B CN102567213B CN201110391502.8A CN201110391502A CN102567213B CN 102567213 B CN102567213 B CN 102567213B CN 201110391502 A CN201110391502 A CN 201110391502A CN 102567213 B CN102567213 B CN 102567213B
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Abstract
The invention provides a writing balancing method of a phase change memory. The method comprises the following steps of: dividing a high-capacity phase change memory system into a plurality of memory regions, wherein each region comprises a plurality of memory arrays, each array comprises a plurality of memory rows, and each memory row is composed of a plurality of bytes and located in the same region; storing file data by a striping method to increase a mapping discretization degree of data address mapping; performing writing balancing via a neighbored copying algorithm in the array, namely maintaining a blank row pointer, and copying the data of an upper line neighboring to the pointer into the position directed by the pointer, thereby realizing the writing balance of the two memory rows; mapping the blank rows of all the arrays to a special array via an interlaced mapping mode so as to improve the discretization degree of the special array. The method can increase the discretization degree of the data address mapping, and can resist the malicious attack of repeatedly writing the same memory unit more effectively so as to realize the writing balance of the whole memory system, thereby prolonging the service life and increasing the utilization rate of the memory system.
Description
Technical field
The invention belongs to technical field of computer, be specifically related to a kind of equalization methods of writing of phase transition storage.
Background technology
Phase transition storage (Phase Change-Random Access Memory, be called for short PCRAM or PCM) be a kind of novel resistor type non-volatile semiconductor memory, it take chalcogenide compound material as storage medium, utilizes the phase-change material be worked into nano-scale when (material is high-impedance state), to present significant resistance otherness in crystalline state (material is low resistive state) and amorphous state and realizes data and store.Many good characteristics such as PCRAM has a changeability, non-volatile, read or write speed is fast, storage density is high are suitable as highdensity stand alone type or Embedded storer very much.But the life-span of phase change memory system can only reach several years even still less at present, far can not meet user's demand, because phase transition storage has the resistance to restriction (10 of writing number of times
7-10
8inferior).
The equilibrium of writing of storer is mainly to describe the data logical address providing from file system (Logical Address, be called for short LA), according to certain strategy, be mapped to physical address (Physical Address, abbreviation PA) process, to the number of times of writing of each storage unit of balance to greatest extent, thereby extend the life-span of whole storage system.Traditional equalization algorithm of writing, in operating system aspect, safeguard complicated mapping mechanism, need to store a large amount of mapping table (writing number of times statistical form etc. as address mapping table, unit), and the required memory capacity of these list items all reaches hundreds of MB rank, consume more storage space and control complicated.For the equalization methods of writing of phase transition storage, there is at present adjacent lines copy strategy, the major advantage of the method is that control information amount is few, simple to operate, is beneficial to hardware and realizes.Yet the method also comes with some shortcomings, as resisted the attack that repeats to write same memory cell; Looseization degree is inadequate; Relatively be applicable to the rare and loose storage system of memory space, be not suitable for the storage system of large capacity intensity etc.
Summary of the invention
The object of the invention is to provide a kind of equalization methods of writing of phase transition storage, it can strengthen the looseization degree of address mapping, can more effectively resist the attack that repeats to write same memory cell, make whole storage system write equilibrium, thereby extend the life-span of storage system and improve its security and utilization factor.
The present invention is achieved by the following technical solutions:
Phase transition storage write an equalization methods, comprise the following steps:
(1) phase transition storage is carried out to initialization operation: phase transition storage is divided into m region, each region comprises n array, each array comprises N effectively row and 1 particular row, each is effectively gone and particular row includes b byte, a front m-1 region is non-special area, m region division is special area, and comprise a particular array and a plurality of redundant array, effective row of array and the address of particular row include tlv triple (r, l, a), wherein r is regional number, l is line number, a is the array number in region, the array numbering U=r*m+a-1 of array in phase transition storage, following parameters is set: the Array Mapping table in region, the random key table of array, the initial value of writing time counter i of phase transition storage is 0 and threshold value, the initial value of writing time counter j of array is 0 and threshold value, the initial value of the initial row pointer Phead of array is 0 and points to the first trip of array, the initial value of the blank line pointer Pblank of array is N the blank line that points to array,
(2) from phase transition storage controller, obtain logical address LA, search Array Mapping table, to obtain physical address PA;
(3) according to physical address PA, judgement is read operation or write operation to the action type of phase transition storage, if write operation enters step (4), otherwise directly reads the data at physical address PA place, finishes;
(4), if action type is write operation, arranges and write time counter i=i+1;
(5) judgement is write time counter i and whether is not less than threshold value;
(6) if write time counter i, be not less than threshold value, read initial row pointer Phead and the blank line pointer Pblank of array, and calculate x array always write number of times w
x=Phead*N+ (N-Pblank);
(7) calculate each non-special area always write number of times be n array always write the maximal value in number of times;
(8) number of times of always writing of non-special area is sorted according to descending order, with two non-special areas that find the difference of always writing between two between number of times to be greater than 1000000;
(9) the mutual copy function to the executing data in two non-special areas and parameter, and upgrade Array Mapping table, parameter comprise random key table list item value, initial row pointer, array write time counter j, blank line pointer;
(10) search the Array Mapping table of renewal, with the physical address PA after being upgraded;
(11) data are write to the physical address PA position pointed after renewal, and carry out read-after-write verify inspection:
(12) read the data that write, and compare with former data, to judge that whether the two is not identical;
(13) if the two is not identical, copy the data that write to redundant array, and upgrade the list item value of random key table, the list item value of Array Mapping table and physical address PA;
(14) arrange and write time counter j=j+1;
(15) judgement is write time counter j and whether is not less than threshold value;
(16) if write time counter j, be not less than threshold value, the data of the lastrow array empty line pointer being pointed to copy blank line to, upgrade blank line pointer and write time counter j.
Method of the present invention also comprises step: if action type is read operation, read the data at physical address PA place.
Method of the present invention also comprises step: if write time counter i, is less than threshold value, proceeds to data are write to the physical address PA position pointed after renewal, and the step of carrying out read-after-write verify inspection; If the two is identical, proceeds to the step of writing time counter j=j+1 is set.
Method step of the present invention (2) also comprises following sub-step:
(2-1) according to the regional number of logical address LA and array number, search the array of corresponding region in Array Mapping table: the row address that navigates to array by regional number, by array number, navigate to again the column address of array, take out corresponding physical region number and physical array number, thereby find physical array;
(2-2) line number of logical address is carried out to the line number IAL that enciphering/deciphering operation draws intermediate address;
(2-3) judge whether line number IAL is not less than blank line pointer, if be not less than, enter step (2-4), otherwise enter step (2-6);
(2-4) whether what judge that line number IAL points to is not that last of array is effectively capable, if not enter step (2-5), otherwise enter step (2-8).
(2-5) line number IAL is from increasing 1;
(2-6) line number IAL is assigned to the line number of physical address PA;
(2-7) according to the regional number of physical address PA and array number, obtain new physical address, and return to final physical address;
(2-8) the physics line number of line number IAL is mapped in particular array;
(2-9) the physics line number of line number IAL is assigned to the line number of physical address PA, and searches corresponding regional number and the array number of particular array in Array Mapping table, with regional number, upgrade regional number and the array number of physical address PA, to obtain final physical address.
Sub-step in method of the present invention (2-8) also comprises following sub-step:
(2-8-1) numbering of the array in the phase transition storage U according to array, calculates the particular row of array at the line number IASL=2U of the intermediate address of particular array;
(2-8-2) whether the line number IASL that judges intermediate address is not less than blank line pointer, enters step (2-8-3), otherwise enter step (2-8-4) if be not less than.
(2-8-3) line number IASL is from increasing 1;
(2-8-4) return to line number IASL.
Step in method of the present invention (16) also comprises following sub-step:
(16-1) judge that whether blank line pointer value is not 0, if enter step (16-2), otherwise enters step (16-4);
(16-2) judge whether blank line pointer value is less than N, if enter step (16-3), otherwise enter step (16-6);
(16-3) valid data of blank line lastrow are copied on blank line, enter step (16-8);
(16-4) the physics line number that the numbering of the array by array U is mapped to particular array is calculated the line number of the lastrow of blank line pointer;
(16-5) copy the valid data of the line number indication of lastrow to blank line, upgrading blank line pointer value is N, and initial row pointer Phead adds 1, enters step (16-9);
(16-6) the physics line number that the numbering of the array by array U is mapped to particular array is calculated the physics line number of blank line pointer;
(16-7) last data of effectively going of array are copied to the position of the physics line number sensing of blank line pointer, and particular array is carried out to adjacent row copy function;
(16-8) blank line pointer Pblank is subtracted to 1;
(16-9) will write time counter j sets to 0.
Sub-step in method of the present invention (16-7) comprises following sub-step:
(16-7-1) write time counter j from increasing 1;
(16-7-2) judgement is write time counter j and is greater than its threshold value, if enter step (16-7-3), else process finishes;
If (16-7-3) judge that the 0th row whether the blank line pointer of particular array points to array enters step (16-7-4), otherwise enter step (16-7-6);
(16-7-4) data of the row that is 2n by line number copy the blank line of particular array to, and upgrading blank line pointer is 2n;
(16-7-5) initial row pointer Phead, from increasing 1, then enters step (16-7-7);
(16-7-6) copy the data of blank line pointer lastrow to blank line, blank line pointer subtracts 1;
(16-7-7) will write time counter j sets to 0.
The present invention has the following advantages:
(1) looseization of storage degree is high: the present invention makes rational planning for to jumbo storage system, and strip-type storage increases the looseization degree of array address mapping, and in region, the planning of many arrays is beneficial to hardware realization, also meet the division of page size in file system, as 1KB, 2KB, 4KB etc.;
(2) the present invention adopts dynamic mapping mechanism, and two regions of load great disparity are write in exchange, more effectively resist the malicious attack that repeats to write same unit, thereby have further extended the life-span of whole storage system;
(3) the present invention unifies interlacing mapping storage to blank line, facilitates hardware to realize the read-write of continuous space, and interlacing mapping can increase looseization of mapping degree;
(4) the present invention adopts read-after-write verify mechanism, and has certain redundancy scheme, improves utilization factor and the security of system space.
Accompanying drawing explanation
Fig. 1 is the process flow diagram of writing equalization methods of phase transition storage of the present invention.
Fig. 2 is the refinement process flow diagram of step in the inventive method (2).
Fig. 3 is the refinement process flow diagram of sub-step in the inventive method (2-8).
Fig. 4 is the refinement process flow diagram of step in the inventive method (16).
Fig. 5 is the refinement process flow diagram of sub-step in the inventive method (16-7).
Embodiment
First, relational language of the present invention is defined:
(1) mapping: be mainly address mapping, logical address be converted into the process of physical address, to obtain the physical location of logical address in phase transition storage; Looseization degree a: file is divided into many data blocks, and these data blocks are not to be stored in continuously the space of phase transition storage but storage dispersedly, the degree that their disperse is just called dispersion.
(2) planning of phase transition storage storage space: refer to whole storage space is divided into a plurality of regions, a plurality of arrays of each district inclusion, each array comprises a plurality of effective row and a particular row, each is effectively gone and particular row comprises a plurality of bytes, and specifying last region is special area, and it does not store user's data, mainly does and shine upon and redundancy use, last array is particular array, and other array of special area is redundant array.
(3) effectively row address and particular row address value are comprised of (regional number, line number, array number) this 3 part; Array numbering: refer to the position of each array in phase transition storage.
(4) effectively capable: its row address can shine upon in array; Particular row: its row address is mapped in particular array, particular row is spaced apart and is mapped in particular array, 2 times of array that the line number of particular row in particular array is numbering; Blank line: the data of its position pointed are invalid.
(5) blank line pointer: the blank line that points to array; Initial row pointer: the first trip position of each array of initial directional.
(6) the Array Mapping table in region: represent with a two-dimensional array, can navigate to the row of this array with regional number, can navigate to the row of these data with array number, by regional number and this array of array initialization.
(7) random key table: applying to symmetric cryptography decipherment algorithm, produced by random function, is a two-dimensional array, each array can be numbered and be found 3 corresponding key values by array, and the key value of each array is all different.
(8) adjacent row copy algorithm: main thought, when reaching while writing frequency threshold value, copies the data of blank line pointer lastrow to blank line, with equilibrium both write number of times; Therein, each array can be regarded a large array of connected head-to-tail annular as.
(9) phase transition storage write frequency threshold value: can set voluntarily, can be in 107 ranks, when surpassing this threshold value, phase transition storage sorts to the number of times of writing of regional; Array is write frequency threshold value: can set voluntarily, generally, between 100 to 1000, when surpassing this threshold value, array is carried out once adjacent row copy algorithm.
(10) particular array: different from non-particular array, it does not carry out the operation of line number enabling decryption of encrypted, only carries out adjacent row copy algorithm to the particular row of 2 times of the total number of arrays in phase transition storage, and its blank line pointer and initial row pointer are all in particular array.
As shown in Figure 1, the equalization methods of writing of phase transition storage of the present invention comprises the following steps:
(1) phase transition storage is carried out to initialization operation: phase transition storage is divided into m region, each region comprises n array, each array comprises N effectively row and 1 particular row, each is effectively gone and particular row includes b byte, a front m-1 region is non-special area, m region division is special area, and comprise a particular array and a plurality of redundant array, effective row of array and the address of particular row include tlv triple (r, l, a), wherein r is regional number, l is line number, a is the array number in region, the array numbering U=r*m+a-1 of array in phase transition storage, following parameters is set: the Array Mapping table in region, the random key table of array, the initial value of writing time counter i of phase transition storage is 0 and threshold value, the initial value of writing time counter j of array is 0 and threshold value, the initial value of the initial row pointer Phead of array is 0 and points to the first trip of array, the initial value of the blank line pointer Pblank of array is N the blank line that points to array,
(2) from phase transition storage controller, obtain logical address LA, search Array Mapping table, to obtain physical address PA;
(3) according to physical address PA, judgement is read operation or write operation to the action type of phase transition storage, if write operation enters step (4), otherwise directly reads the data at physical address PA place, finishes;
(4), if action type is write operation, arranges and write time counter i=i+1;
(5) judgement is write time counter i and whether is not less than threshold value; If not little, enter step (6), otherwise enter step (11);
(6) if write time counter i, be not less than threshold value, read initial row pointer Phead and the blank line pointer Pblank of array, and calculate x array always write number of times w
x=Phead*N+ (N-Pblank);
(7) calculate each non-special area always write number of times be n array always write the maximal value in number of times;
(8) number of times of always writing of non-special area is sorted according to descending order, with two non-special areas that find the difference of always writing between two between number of times to be greater than 1000000;
(9) the mutual copy function to the executing data in two non-special areas and parameter, and upgrade Array Mapping table, parameter comprise random key table list item value, initial row pointer, array write time counter j, blank line pointer;
(10) search the Array Mapping table of renewal, with the physical address PA after being upgraded;
(11) data are write to the physical address PA position pointed after renewal, and carry out read-after-write verify inspection:
(12) read the data that write, and compare with former data, to judge that whether the two is not identical; If not identical progressive step (13), otherwise enter step (14);
(13) if the two is not identical, copy the data that write to redundant array, and upgrade the list item value of random key table, the list item value of Array Mapping table and physical address PA;
(14) arrange and write time counter j=j+1;
(15) judgement is write time counter j and whether is not less than threshold value; If be not less than, enter step (16) otherwise finish;
(16) if write time counter j, be not less than threshold value, the data of the lastrow array empty line pointer being pointed to copy blank line to, upgrade blank line pointer and write time counter j.
As shown in Figure 2, the step in equalization methods (2) of writing of phase transition storage of the present invention comprises following sub-step:
(2-1) according to the regional number of logical address LA and array number, search the array of corresponding region in Array Mapping table: the row address that navigates to array by regional number, by array number, navigate to again the column address of array, take out corresponding physical region number and physical array number, thereby find physical array;
(2-2) line number of logical address is carried out to the line number IAL that enciphering/deciphering operation draws intermediate address;
(2-3) judge whether line number IAL is not less than blank line pointer, if be not less than, enter step (2-4), otherwise enter step (2-6);
(2-4) whether what judge that line number IAL points to is not that last of array is effectively capable, if not enter step (2-5), otherwise enter step (2-8).
(2-5) line number IAL is from increasing 1;
(2-6) line number IAL is assigned to the line number of physical address PA;
(2-7) according to the regional number of physical address PA and array number, obtain new physical address, and return to final physical address;
(2-8) the physics line number of line number IAL is mapped in particular array;
(2-9) the physics line number of line number IAL is assigned to the line number of physical address PA, and searches corresponding regional number and the array number of particular array in Array Mapping table, with regional number, upgrade regional number and the array number of physical address PA, to obtain final physical address.
As shown in Figure 3, the sub-step in equalization methods (2-8) of writing of phase transition storage of the present invention comprises following sub-step:
(2-8-1) numbering of the array in the phase transition storage U according to array, calculates the particular row of array at the line number IASL=2U of the intermediate address of particular array;
(2-8-2) whether the line number IASL that judges intermediate address is not less than blank line pointer, enters step (2-8-3), otherwise enter step (2-8-4) if be not less than.
(2-8-3) line number IASL is from increasing 1;
(2-8-4) return to line number IASL.
As shown in Figure 4, the step in equalization methods (16) of writing of phase transition storage of the present invention comprises following sub-step:
(16-1) judge that whether blank line pointer value is not 0, if enter step (16-2), otherwise enters step (16-4);
(16-2) judge whether blank line pointer value is less than N, if enter step (16-3), otherwise enter step (16-6);
(16-3) valid data of blank line lastrow are copied on blank line, enter step (16-8);
(16-4) the physics line number that the numbering of the array by array U is mapped to particular array is calculated the line number of the lastrow of blank line pointer;
(16-5) copy the valid data of the line number indication of lastrow to blank line, upgrading blank line pointer value is N, and initial row pointer Phead adds 1, enters step (16-9);
(16-6) the physics line number that the numbering of the array by array U is mapped to particular array is calculated the physics line number of blank line pointer;
(16-7) last data of effectively going of array are copied to the position of the physics line number sensing of blank line pointer, and particular array is carried out to adjacent row copy function;
(16-8) blank line pointer Pblank is subtracted to 1;
(16-9) will write time counter j sets to 0.
As shown in Figure 5, the sub-step in equalization methods (16-7) of writing of phase transition storage of the present invention comprises following sub-step:
(16-7-1) write time counter j from increasing 1;
(16-7-2) judgement is write time counter j and is greater than its threshold value, if enter step (16-7-3), else process finishes;
If (16-7-3) judge that the 0th row whether the blank line pointer of particular array points to array enters step (16-7-4), otherwise enter step (16-7-6);
(16-7-4) data of the row that is 2n by line number copy the blank line of particular array to, and upgrading blank line pointer is 2n;
(16-7-5) initial row pointer Phead, from increasing 1, then enters step (16-7-7);
(16-7-6) copy the data of blank line pointer lastrow to blank line, blank line pointer subtracts 1;
(16-7-7) will write time counter j sets to 0.
Claims (5)
- Phase transition storage write an equalization methods, comprise the following steps:(1) phase transition storage is carried out to initialization operation: described phase transition storage is divided into m region, each region comprises n array, each array comprises N effectively row and 1 particular row, described in each, effective row and described particular row include b byte, a front m-1 region is non-special area, m region division is special area, and comprise a particular array and a plurality of redundant array, effective row of described array and the address of described particular row include tlv triple (r, l, a), wherein r is regional number, l is line number, a is the array number in region, the array numbering U=r*m+a-1 of described array in described phase transition storage, following parameters is set: the Array Mapping table in described region, the random key table of described array, the initial value of writing time counter i of described phase transition storage is 0 and threshold value, the initial value of writing time counter j of described array is 0 and threshold value, the initial value of the initial row pointer Phead of described array is 0 and points to the first trip of described array, the initial value of the blank line pointer Pblank of described array is N the blank line that points to described array,(2) from phase transition storage controller, obtain logical address LA, search described Array Mapping table, to obtain physical address PA;(3) according to described physical address PA judgement, to the action type of described phase transition storage, be read operation or write operation;(4) if described action type is write operation, described in arranging, write time counter i=i+1, then proceed to step (5); If described action type is read operation, read the data at described physical address PA place, then process finishes;(5) described in judgement, write time counter i and whether be not less than described threshold value;(6) if described in write time counter i and be not less than described threshold value, read initial row pointer Phead and the blank line pointer Pblank of described array, and calculate x array always write number of times w x=Phead*N+ (N-Pblank), then proceeds to step (7); If described in write time counter i and be less than described threshold value, proceed to step (11);(7) calculate each non-special area always write number of times be a described n array always write the maximal value in number of times;(8) number of times of always writing of described non-special area is sorted according to descending order, to find, between any two non-special areas, always write two non-special areas that the difference between number of times is greater than 1000000;(9) data and parameter in described two non-special areas are carried out to mutual copy function, and upgrade described Array Mapping table, described parameter comprise random key table list item value, initial row pointer, array write time counter j, blank line pointer;(10) search the Array Mapping table of described renewal, with the physical address PA after being upgraded;(11) data are write to the physical address PA position pointed after described renewal, and carry out read-after-write verify inspection:(12) read the described data that write, and compare with former data, to judge that whether the two is not identical;(13), if the two is not identical, copies the described data that write to described redundant array, and upgrade the list item value of described random key table, then the list item value of described Array Mapping table and described physical address PA proceed to step (14); If the two is identical, proceed to step (14);(14) write time counter j=j+1 described in arranging;(15) described in judgement, write time counter j and whether be not less than described threshold value;(16) if described in write time counter j and be not less than described threshold value, the data of the lastrow described array empty line pointer being pointed to copy described blank line to, upgrade described blank line pointer and described in write time counter j.
- 2. the equalization methods of writing according to claim 1, is characterized in that, described step (2) comprises following sub-step:(2-1) according to the regional number of described logical address LA and array number, search the array of corresponding region in described Array Mapping table: the row address that navigates to array by described regional number, by described array number, navigate to again the column address of described array, take out corresponding physical region number and physical array number, thereby find described physical array;(2-2) line number of described logical address is carried out to the line number IAL that enciphering/deciphering operation draws intermediate address;(2-3) judge whether described line number IAL is not less than blank line pointer, if be not less than, enter step (2-4), otherwise enter step (2-6);(2-4) whether what judge that described line number IAL points to is not that last of described array is effectively capable, if not last of described array effectively row enter step (2-5), otherwise enter step (2-8);(2-5) described line number IAL is from increasing 1;(2-6) described line number IAL is assigned to the line number of described physical address PA;(2-7) according to the regional number of described physical address PA and array number, obtain new physical address, to obtain final physical address and to return;(2-8) the physics line number of described line number IAL is mapped in described particular array;(2-9) the physics line number of described line number IAL is assigned to the line number of described physical address PA, and search corresponding regional number and the array number of particular array described in described Array Mapping table, with described regional number, upgrade regional number and the array number of described physical address PA, to obtain final physical address, and return to this physical address.
- 3. the equalization methods of writing according to claim 2, is characterized in that, described sub-step (2-8) comprises following sub-step:(2-8-1) numbering of the array in the described phase transition storage U according to described array, calculates the particular row of described array at the line number IASL=2U of the intermediate address of described particular array;(2-8-2) whether the line number IASL that judges described intermediate address is not less than described blank line pointer, enters step (2-8-3), otherwise enter step (2-8-4) if be not less than;(2-8-3) described line number IASL is from increasing 1;(2-8-4) return to described line number IASL.
- 4. the equalization methods of writing according to claim 1, is characterized in that, described step (16) comprises following sub-step:(16-1) judge that whether described blank line pointer value is not 0, if enter step (16-2), otherwise enters step (16-4);(16-2) judge whether described blank line pointer value is less than N, if enter step (16-3), otherwise enter step (16-6);(16-3) valid data of described blank line lastrow are copied on described blank line, then enter step (16-8);(16-4) the physics line number that the numbering of the array by described array U is mapped to described particular array is calculated the line number of the lastrow of described blank line pointer;(16-5) copy the valid data of the line number indication of described lastrow to described blank line, upgrading described blank line pointer value is N, and described initial row pointer Phead adds 1, then enters step (16-9);(16-6) the physics line number that the numbering of the array by described array U is mapped to described particular array is calculated the physics line number of described blank line pointer;(16-7) last data of effectively going of described array are copied to the position of the physics line number sensing of described blank line pointer, and described particular array is carried out to adjacent row copy function;(16-8) described blank line pointer Pblank is subtracted to 1;(16-9) described in general, writing time counter j sets to 0.
- 5. the equalization methods of writing according to claim 4, is characterized in that, described sub-step (16-7) comprises following sub-step:(16-7-1) described in, write time counter j from increasing 1;(16-7-2) described in judgement, write time counter j and be greater than its threshold value, if enter step (16-7-3), else process finishes;If (16-7-3) judge that the 0th row whether the blank line pointer of described particular array points to described array enters step (16-7-4), otherwise enter step (16-7-6);(16-7-4) data of the row that is 2n by line number copy the blank line of described particular array to, and upgrading described blank line pointer is 2n;(16-7-5) described initial row pointer Phead, from increasing 1, then enters step (16-7-7);(16-7-6) copy the data of described blank line pointer lastrow to described blank line, described blank line pointer is from subtracting 1;(16-7-7) described in general, writing time counter j sets to 0.
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| CN102981972A (en) * | 2012-12-25 | 2013-03-20 | 重庆大学 | Wear-leveling method for phase change memory |
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| CN104714894B (en) * | 2015-03-18 | 2017-08-11 | 清华大学 | The phase transition internal memory abrasion equilibrium method based on Random Maps and system of a kind of layering |
| CN105678196B (en) * | 2015-12-31 | 2018-12-25 | 上海交通大学 | A kind of malice read-write program monitoring device and method towards nonvolatile memory |
| CN111258925B (en) * | 2020-01-20 | 2022-05-27 | 中国科学院微电子研究所 | Nonvolatile memory access method, nonvolatile memory access device, memory controller, nonvolatile memory device and nonvolatile memory medium |
| CN113127377B (en) * | 2021-04-08 | 2022-11-25 | 武汉导航与位置服务工业技术研究院有限责任公司 | Wear leveling method for writing and erasing of nonvolatile memory device |
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| US20070103972A1 (en) * | 2005-11-07 | 2007-05-10 | Yu-Hwan Ro | Non-volatile phase-change memory device and method of reading the same |
| CN101552032A (en) * | 2008-12-12 | 2009-10-07 | 深圳市晶凯电子技术有限公司 | Method and device for constructing a high-speed solid state memory disc by using higher-capacity DRAM to join in flash memory medium management |
| CN101673188A (en) * | 2008-09-09 | 2010-03-17 | 上海华虹Nec电子有限公司 | Data access method for solid state disk |
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| CN101673188A (en) * | 2008-09-09 | 2010-03-17 | 上海华虹Nec电子有限公司 | Data access method for solid state disk |
| CN101552032A (en) * | 2008-12-12 | 2009-10-07 | 深圳市晶凯电子技术有限公司 | Method and device for constructing a high-speed solid state memory disc by using higher-capacity DRAM to join in flash memory medium management |
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