CN102567149A

CN102567149A - SOC (system on chip) verifying method

Info

Publication number: CN102567149A
Application number: CN201010581661XA
Authority: CN
Inventors: 朱思良
Original assignee: Shanghai Huahong Integrated Circuit Co Ltd
Current assignee: Shanghai Huahong Integrated Circuit Co Ltd
Priority date: 2010-12-09
Filing date: 2010-12-09
Publication date: 2012-07-11
Anticipated expiration: 2030-12-09
Also published as: CN102567149B

Abstract

The invention discloses an SOC (system on chip) verifying method, which includes: during verification of module level, defining an input and output port of a processor in the SOC, calling a unique system task from all operations of the processor, operating through the input and output port of the processor to build a mirror image storage unit of a module, and maintaining values of the mirror image storage unit; during verification of a subsystem, multiplexing the described input and output port, operating by the unique system task after integrating operations of the processor; during verification of the system level, utilizing the input and output port as a bus monitor, synchronizing the mirror image storage unit when executing software, and realizing multiplexing of the verification environment. By the SOC verifying method, the verification environment of the module level can be used as a sub-environment of verification of the system level maximally, and multiplexing of the verification environments of the system level and the module level is realized.

Description

SOC system verification method

Technical field

The present invention relates to a kind of SOC system verification method, be applicable to that general is SOC (the system on chip system on a chip) system verification of core with the central processing unit.

Background technology

From the module to the system, module level verifies that only for single peripheral module mostly processor is the register read-write to its operation often in the SOC checking, and general checking is to come read-write register through the analog processor sequential, and the checking emphasis is the peripheral module function.The subsystem level verification can be integrated total system, but still comes read-write register by verification environment analog processor sequential, and the checking emphasis is a system architecture.System-level checking can be put into processor and read in software code, and the checking emphasis is the cooperation of software and hardware.

The verification environment of complete complicacy has been set up in module level checking, after verifying, when getting into system verification again according to system architecture reconstructing system level verification environment.If system-level verification environment can Multiplexing module level verification environment direct elevator system verification efficiency.This just needs a kind of verification method arrange the module level verification environment, makes it can be multiplexing by more system-level verification environment.

Summary of the invention

The technical matters that the present invention will solve provides a kind of SOC system verification method, can make the sub-environment of module level verification environment as system-level checking substantially, realizes that system-level verification environment and module level verification environment are multiplexing.

For solving the problems of the technologies described above, SOC system verification method of the present invention is to adopt following technical scheme to realize:

The IO port of processor in the definition SOC system will call a unique system task all about the operation of processor when module level is verified when module level is verified, operate through said port; , sets up module level the mirror registers of module when verifying, the maintenance image register value;

Multiplexing said port is described when the subsystem level verification, after will integrating about the operation of processor, still uses unique system task to operate;

When system-level checking, as a bus monitoring, synchronous mirror register when executive software realizes that verification environment is multiplexing with said port.

Method of the present invention focuses on that the module level verification environment arrives the multiplexing of system-level verification environment; Just carry out the interface definition of system-level checking in the module level checking; Mirror registers, and module level checking subenvironment, multiplexing through interface and behavior model; Just can easier build subsystem level verification environment and system-level verification environment, realize that system-level verification environment and module level verification environment are multiplexing.

Traditional system-level verification method often will spend the time that is equal to even surpasses the module level checking when system-level checking.

Method of the present invention owing to realized the multiplexing of module level verification environment and system-level verification environment, can let system-level verification environment fast construction on module level verification environment basis, the shortening chip system proving time, better guarantees chip functions; Have higher efficient and confidence level.

Description of drawings

Below in conjunction with accompanying drawing and embodiment the present invention is done further detailed explanation:

Fig. 1 is a module level verification environment synoptic diagram;

Fig. 2 is a subsystem level verification environment synoptic diagram;

Fig. 3 is system-level verification environment synoptic diagram.

Embodiment

This method mainly is to have proposed a kind of method that authenticates to the multiplexing verification environment of system-level checking from module level.

Referring to shown in Figure 1, before the module level checking, definition processor port (or claiming interface) 100; This interface is all drive signals of processor; To system-level, any all can drive through the interface that this group defines to other operation of signal level from module level, so just effectively reduces and changes.Call the register read-write of analog processor through a system task (being processor tasks shown in Figure 1) 110 to module to be measured.For multiplexing, all registers all use macro definition to describe, and register manipulation is directed against register name rather than register address; Because there is map addresses in system-level checking, can the module level verification environment in system-level verification environment, still can be worked through the replacement macro definition.With all functional modes to module to be measured, temporal model, test generates, and the data self check all is encapsulated in the module level checking subenvironment 120, and module level checking subenvironment 120 links to each other with processor tasks 110 through passage 130; All register read-writes all are packaged as a data class, through passage 130, come decryption class and analog processor that register is read and write by processor tasks 110.In addition, if the function port of module to be measured is connected system module rather than chip exterior interface when system-level checking, then can let module level checking subenvironment 120 monitor module operation result to be measured through the data of observing on the interface 140.

When setting up module level verification environment 150; Also must set up all register mirror images; Can preserve the mirror registers state, distinguish two kinds of situation here, if the register of controlling by processor merely; Read operation can obtain the state of current module to be measured through reading the mirror registers state when module level is verified; Behind write operation, upgrade register value.If, must read actual inside modules value to be measured through processor tasks 110 by the common mirror registers of controlling of software and hardware.So just distinguished the mirror registers mode of operation of module level checking and system-level checking.

When the subsystem level verification; Because the function of module is constant; So module level checking subenvironment 120 still can be used; Can a plurality of module level checking subenvironments be merged in the sub-systems level verification environment 200, like module level checking subenvironment (1) 210 among Fig. 2, module verification subenvironment (2) 220.In conjunction with shown in Figure 2, comprised processor bus 230 in the subsystem to be measured, need map addresses, can use the register macro definition of the register macro definition replacement module level checking of subsystem level verification.There is not processor to get involved in the subsystem verification environment; Also need analog processor behavior read-write register; Read-write operation is Depending module level verification environment still; Need the processor tasks 110 of module level be merged into a sub-systems processor tasks 240, simultaneously module level verified that the read-write register passage 250,260 of subenvironment 210,220 all is connected to subsystem processor task 240.

In conjunction with shown in Figure 3; When system-level checking; System-level verification environment 300 can the system-level verification environment of multiplex sub, because whole subsystem level verification environment is all fixing, the difference of subsystem level verification environment and system-level verification environment only is; True processing device and software are used in system-level checking, and just the mirror registers read-write operation does not need verification environment to simulate but directly accomplished by processor software 310.The difference of verification environment is that subsystem processor task 240 can also read and write bus so, and system processor task 320 be merely able to observe on the bus data and can not write data.

System processor task 320 is all noted the read-write operation that observes and is kept in the formation; Upgrade the value of mirror registers then; Here be divided into two kinds of situation equally; If by the mirror registers of software control,, system-level verification environment 300 just can satisfy the state of judging module to be measured as long as reading the value of mirror registers.If by the common mirror registers of handling of software and hardware; When system-level verification environment 300 sends write operation; System processor task 320 will be waited for the operation of new entering formation; And search the write operation whether address date coupling is arranged in the software operation, can wait for always that the write operation of system verification environment is accomplished after obtaining matching operation if fail to find the write operation of coupling in the formation.When system-level verification environment 300 sends read operation; System processor task 320 is waited for the new read operation that gets into formation; And search the read operation of matching addresses; Can wait for if fail to find the read operation of coupling in the formation always, up to matching operation is arranged, and the data that this operation obtains returned to system environments.

Realize that above behavior must have the certain verification environment and the interoperation of software; But the most basic framework that instructs is set up; Just according to the adjustment of detailed programs, need only the checking that the operation of handling mirror registers just can be accomplished system-Level software and hardware comparatively speaking thereupon.

Adopt method of the present invention, the structure of module level verification environment has been kept by major part, through revising system task, cooperates the software upgrading mirror registers, just can realize the multiplexing of system-level verification environment and module level verification environment.

More than through embodiment the present invention has been carried out detailed explanation, but these are not to be construed as limiting the invention.Under the situation that does not break away from the principle of the invention, those skilled in the art also can make many distortion and improvement, and these also should be regarded as protection scope of the present invention.

Claims

1. SOC system verification method is characterized in that:

When module level was verified, the IO port of processor will be operated through said port all about a unique system task of the operation calls of processor in the definition SOC system; Set up the mirror registers of module, the maintenance image register value;

When subsystem was verified, multiplexing said port was described, and after will integrating about the operation of processor, still used unique system task to operate;

2. the method for claim 1; It is characterized in that: the IO port of processor is meant in the said definition SOC system; Processor for the SoC system core defines unique IO port, in module level checking and system-level checking, all calls this port.

3. the method for claim 1, it is characterized in that: the said mirror registers of setting up module is meant, the register holds that establishes mirror image state is distinguished and is treated mirror registers and read mode, so that system-level verification environment is multiplexing.

4. method as claimed in claim 3 is characterized in that: said differentiation is treated mirror registers and is read mode and be meant,

If merely by the register of processor control, read operation obtains the state of current module to be measured through reading the mirror registers state when module level is verified; Behind write operation, upgrade the value of mirror registers;

If by the common mirror registers of controlling of software and hardware, must read the intrinsic value of actual module to be measured through system task.

5. the method for claim 1; It is characterized in that: said will being meant all about a unique system task of the operation calls of processor; Through unique all processor behaviors of system task operation,, directly accomplishes module level the mirror registers configuration when verifying,, subsystem needs mirror registers is carried out the map addresses analysis when verifying; During system-level checking, then through software executing synchronous mirror register value as a result.

6. the method for claim 1 is characterized in that: said with said port as a bus monitoring, the synchronous mirror register is meant when executive software,

The system processor task be merely able on the observation processor bus data and can not write data;

The system processor task is all noted the read-write operation that observes and is kept in the formation, upgrades the value of mirror registers then;

If by the mirror registers of software control, as long as read the state that the value of mirror registers just can be judged module to be measured; If by the common mirror registers of handling of software and hardware; When write operation is sent in system-level checking; The system processor task will be waited for the operation of new entering formation; And search the write operation whether address date coupling is arranged in the software operation, if fail to find the write operation of coupling in the formation then wait for that always the write operation of system verification environment is accomplished after obtaining matching operation;

When read operation is sent in system-level checking; The system processor task waiting newly gets into the read operation of formation, and searches the read operation of matching addresses, if fail to find the read operation of coupling in the formation then wait for always; Up to matching operation is arranged, and the data that this operation obtains are returned to system environments.