CN102543572B

CN102543572B - Micro electro mechanical system (MEMS) switch apparatus, logic gate and integrated circuit

Info

Publication number: CN102543572B
Application number: CN201010618405.3A
Authority: CN
Inventors: 张镭; 许程凯; 唐德明
Original assignee: Lexvu Opto Microelectronics Technology Shanghai Co Ltd
Current assignee: Xi'an Yisheng Photoelectric Technology Co., Ltd.
Priority date: 2010-12-31
Filing date: 2010-12-31
Publication date: 2014-08-13
Anticipated expiration: 2030-12-31
Also published as: CN102543572A

Abstract

The invention discloses a micro electro mechanical system (MEMS) switch apparatus, a logic gate and an integrated circuit. The MEMS switch apparatus comprises a moveable polar plate, a first reference electrode, a second reference electrode, a first connecting end, a second connecting end and a third connecting end, wherein the moveable polar plate is positioned and can move between the first reference electrode and the second reference electrode; when the moveable polar plate is close to the second reference electrode, the first connecting end and the second connecting end are electrically connected through the moveable polar plate; and when the moveable polar plate is close to the first reference electrode, the first connecting end and the third connecting end are electrically connected through the moveable polar plate. The MEMS switch apparatus is simple in structure and technical flow; the cost is saved; and when the MEMS switch apparatus is compared with the logic gate formed by a metal oxide semiconductor (MOS) transistor, used pipes are few in number. In addition, a circuit formed by the MEMS switch apparatus is compatible with a complementary metal-oxide-semiconductor transistor (CMOS) circuit.

Description

Mems switch device, gate and integrated circuit

Technical field

The present invention relates to technical field of semiconductors, relate in particular to mems switch device, gate and integrated circuit.

Background technology

Gate is mainly used in digital technology field and analogue technique field, and gate of a great variety mainly comprises: with door, not gate, or door, NAND gate, NOR gate, AND OR NOT gate, selector, trigger, triple gate etc.

Gate of the prior art realizes certain logic function by the combination of MOS transistor, MOS transistor is the transistor of Metal-oxide-semicondutor (Metal-Oxide-Semiconductor) structure, be called for short MOS transistor, it comprises source region, the drain region that is positioned at substrate, is positioned at the grid on substrate; Between source region and drain region, there is raceway groove, on source region, drain region and grid, there is through hole and interconnection line, by through hole and interconnection line, be connected with outer electrode, by control, be applied to the voltage of outer electrode, control is applied to the voltage on source region, drain region and grid, can make raceway groove between source region and drain region in conducting or cut-off, that is to say, can make MOS transistor in closing or disconnecting, thereby utilize the combination of MOS transistor can realize certain logic function.

Yet, by the combination of MOS transistor, realize certain logic function, there is following shortcoming: 1, MOS transistor, under cut-off state, exists leakage current, caused the power consumption of gate large; 2, the formation method more complicated of MOS transistor.

The Chinese patent application that April 29, disclosed publication number was CN101420216A in 2009, a kind of " gate and the conductor integrated circuit device that uses this gate " disclosed, yet, do not solve above-described technical problem, in prior art, there are many patents about gate, all do not solve above-described technical problem.

Summary of the invention

The problem that the present invention solves is to provide a kind of gate, simple in structure, uses device count few, and leakage current is minimum.

For addressing the above problem, the invention provides a kind of mems switch device, comprising:

Can movable plate electrode;

The first reference electrode, the second reference electrode, described can movable plate electrode between described the first reference electrode and described the second reference electrode, can between the first reference electrode, the second reference electrode, move;

The first link, the second link and the 3rd link, when described can movable plate electrode during near the second reference electrode, the first link and the second link are by electrically conducting by movable plate electrode; When described can movable plate electrode during near the first reference electrode, the first link and the 3rd link are by electrically conducting by movable plate electrode.

Optionally, described can comprising by movable plate electrode:

One deck conductive layer at least can move by movable plate electrode by controlling described in the electromotive force official post between described conductive layer and described the first reference electrode, described the second reference electrode between described the first reference electrode and the second reference electrode;

Conductive contact end with described conductive layer insulation, described can movable plate electrode during near the second reference electrode, the first link and the second link electrically conduct by described conductive contact end, described can movable plate electrode during near the first reference electrode, the first link and the 3rd link electrically conduct by described conductive contact end.

Optionally, describedly can also comprise insulating barrier by movable plate electrode, be positioned at the surface of described conductive layer.

Optionally, described the first link comprises the first connecting portion and the second connecting portion;

Described the first connecting portion and described the second link are at same metal level;

Described the second connecting portion and described the 3rd link are at same metal level.

Optionally, described the first reference electrode comprises at least one deck conductive layer.

Optionally, described conductive layer surface has insulating barrier.

Optionally, described the second reference electrode comprises at least one deck conductive layer.

Optionally, described conductive layer surface has insulating barrier.

Optionally, the surface that the surface of described conductive contact end has passivation layer or described the first link, the second link, the 3rd link has passivation layer.

The present invention also provides a kind of gate, comprises at least one input, and an output connects by least one mems switch device between described input and described output, and to realize logic function, described mems switch device is above-described mems switch device.

The present invention also provides a kind of integrated circuit, comprises above-described logic gates.

Compared with prior art, the present invention has the following advantages:

Mems switch device of the present invention is single-pole double throw type, simple in structure, and corresponding technological process is simple, does not need P type Implantation in CMOS technique and N-type ion implantation technology etc., thereby can be cost-saving.And the circuit that this mems switch device forms and cmos circuit are compatible.

While utilizing being combined to form of mems switch device of the present invention gate of the present invention to realize certain logic function, the number of the mems switch device of use is few, and gate is simple in structure, and flow process is also corresponding simple, thereby can be cost-saving.

The integrated circuit that utilizes gate of the present invention to form, simple in structure, leakage current is little, thereby can save layout area, reduces power consumption.

Accompanying drawing explanation

Fig. 1 a is the cross-sectional view of the mems switch device of the specific embodiment of the invention;

Fig. 1 b is that the mems switch device of the specific embodiment of the invention shown in Fig. 1 a is along the combination cross-sectional view of a-a, b-b direction;

Fig. 1 c is mems switch device first link of the specific embodiment of the invention shown in Fig. 1 a and the cross-sectional view of the second link conducting;

Fig. 1 d is that the mems switch device of the specific embodiment of the invention shown in Fig. 1 c is along the combination cross-sectional view of a-a, b-b direction;

Fig. 2 a is that the first reference electrode meets voltage VCC1+, and the second reference electrode connects the graphical diagram of the mems switch device of voltage VCC1-;

Fig. 2 b is that the first reference electrode meets voltage VCC1-, and the second reference electrode connects the graphical diagram of the mems switch device of voltage VCC1+;

Fig. 3 a is the circuit diagram of the first specific embodiment of not gate of the present invention;

Fig. 3 b is the circuit diagram of the second specific embodiment of not gate of the present invention;

Fig. 4 a is the circuit diagram of the present invention and the family status one specific embodiment;

Fig. 4 b is the circuit diagram of the present invention and the family status two specific embodiments;

Fig. 5 a is the circuit diagram of the first specific embodiment of the present invention or door;

Fig. 5 b is the circuit diagram of the second specific embodiment of the present invention or door;

Fig. 6 a is the circuit diagram of the first specific embodiment of the present invention's two input nand gates;

Fig. 6 b is the circuit diagram of the second specific embodiment of the present invention's two input nand gates;

Fig. 6 c is the circuit diagram of the 3rd specific embodiment of the present invention's two input nand gates;

Fig. 6 d is the circuit diagram of the 4th specific embodiment of the present invention's two input nand gates;

The circuit diagram of the 5th specific embodiment of Fig. 6 e NAND gate of the present invention;

The circuit diagram of the 6th specific embodiment of Fig. 6 f NAND gate of the present invention;

Fig. 7 a is the circuit diagram of the first specific embodiment of NOR gate of the present invention;

Fig. 7 b is the circuit diagram of the second specific embodiment of NOR gate of the present invention;

Fig. 7 c is the circuit diagram of the 3rd specific embodiment of NOR gate of the present invention;

Fig. 7 d is the circuit diagram of the 4th specific embodiment of NOR gate of the present invention;

Fig. 7 e is the circuit diagram of the 5th specific embodiment of NOR gate of the present invention;

Fig. 7 f is the circuit diagram of the 6th specific embodiment of NOR gate of the present invention;

Fig. 8 a is the circuit diagram of four input AND OR NOT gate of the present invention's the first specific embodiment;

Fig. 8 b is the circuit diagram of four input AND OR NOT gate of the present invention's the second specific embodiment;

Fig. 9 a be the present invention with or the circuit diagram of the first specific embodiment of door;

Fig. 9 b be the present invention with or the circuit diagram of the second specific embodiment of door;

Fig. 9 c be the present invention with or the circuit diagram of the 3rd specific embodiment of door;

Fig. 9 d be the present invention with or the circuit diagram of the 4th specific embodiment of door;

Fig. 9 e be the present invention with or the circuit diagram of the family status five specific embodiments;

Fig. 9 f be the present invention with or the circuit diagram of the family status six specific embodiments;

Figure 10 a is the circuit diagram of the first specific embodiment of XOR gate of the present invention;

Figure 10 b is the circuit diagram of the second specific embodiment of XOR gate of the present invention;

Figure 10 c is the circuit diagram of the 3rd specific embodiment of XOR gate of the present invention;

Figure 10 d is the circuit diagram of the 4th specific embodiment of XOR gate of the present invention;

Figure 10 e is the circuit diagram of the 5th specific embodiment of XOR gate of the present invention;

Figure 10 f is the circuit diagram of the 6th specific embodiment of XOR gate of the present invention;

Figure 11 a is the circuit diagram of alternative selector of the present invention;

Figure 11 b is the circuit diagram that the present invention four selects a selector;

Figure 11 c is the schematic symbol diagram of the selector that represents of a mems switch device;

Figure 11 d is that 16 of the specific embodiment of the invention selects a selector to be applied to the schematic diagram of look-up table;

Figure 12 a is the circuit diagram of the first specific embodiment of triple gate of the present invention;

Figure 12 b is the circuit diagram of the second specific embodiment of triple gate of the present invention;

Figure 13 a is the circuit diagram of the first specific embodiment of trigger of the present invention;

Figure 13 b is the circuit diagram of the second specific embodiment of trigger of the present invention;

Figure 13 c is the circuit diagram of the 3rd specific embodiment of trigger of the present invention;

Figure 13 d is the circuit diagram of the 4th specific embodiment of trigger of the present invention;

Figure 14 a is the circuit diagram of the first specific embodiment of edge triggered flip flop of the present invention;

Figure 14 b is the circuit diagram of the second specific embodiment of edge triggered flip flop of the present invention;

Figure 14 c is the circuit diagram of the 3rd specific embodiment of edge triggered flip flop of the present invention;

Figure 14 d is the circuit diagram of the 4th specific embodiment of edge triggered flip flop of the present invention.

Embodiment

The gate of the specific embodiment of the invention, utilizes the combination of microelectromechanical systems (Micro ElectroMechanical Systems, MEMS) switch to realize logic function.

In order to realize the gate of the specific embodiment of the invention, the invention provides a kind of mems switch device, for single-pole double throw type, mems switch device of the present invention simple in structure, corresponding technological process is simple, do not need P type Implantation in CMOS technique and N-type ion implantation technology etc., thus can be cost-saving.And the circuit that this mems switch device forms and cmos circuit are compatible.

Fig. 1 a is the cross-sectional view of the mems switch device of the specific embodiment of the invention, and Fig. 1 b is that the mems switch device of the specific embodiment of the invention shown in Fig. 1 a is along the combination cross-sectional view of a-a, b-b direction; With reference to figure 1a and Fig. 1 b, the mems switch device of the specific embodiment of the invention comprises: can movable plate electrode 10; The first reference electrode 21, the second reference electrode 22, the first links 31, the second link 32 and the 3rd link 33.Described can movable plate electrode 10 between described the first reference electrode 21 and described the second reference electrode 22, can between the first reference electrode 21, the second reference electrode 22, move; When described can movable plate electrode 10 during near the second reference electrode 22, the first link 31 and the second link 32 are by can movable plate electrode 10 electrically conduct (with reference to figure 1c and Fig. 1 d); When described can movable plate electrode 10 during near the first reference electrode 21, the first link 31 and the 3rd link 33 (are not expressed the first link 31 and the 3rd link 33 electrically conducts by can movable plate electrode 10 electrically conduct in diagram, the example that those skilled in the art electrically conduct according to the first link 31 and the second link 32, can be informed in what situations, the first link 31 and the 3rd link 33 electrically conduct).

Described can comprising by movable plate electrode 10: at least one deck conductive layer 11, by controlling described in the electromotive force official post between described conductive layer 11 and described the first reference electrode 21, described the second reference electrode 22, can between described the first reference electrode 21 and the second reference electrode 22, move by movable plate electrode 10; Conductive contact end 12 with described conductive layer 11 insulation, described can movable plate electrode 10 during near the second reference electrode 22, the first link 31 and the second link 32 electrically conduct by described conductive contact end 12, described can movable plate electrode 10 during near the first reference electrode 21, the first link 31 and the 3rd link 33 electrically conduct by described conductive contact end 12.In specific embodiments of the invention, can comprise conductive layer 11 by movable plate electrode 10, on the surface of conductive layer 11, there is insulating barrier 13, can by two links 14, be formed on dielectric layer 41 by movable plate electrode 10, two links 14 are electrically connected with conductive layer 11, by two links 14, can apply voltage to conductive layer 11.And in this specific embodiment, two links 14 and insulating barrier 13 play the effect of bracing frame, play the effect that support can movable plate electrode 10.Conductive contact end 12 has two ends, be respectively first end 121 and the second end 122, by first end 121 and the second end 122 can make that the first link 31 and the second link 32 electrically conduct, the first link 31 and the 3rd link 33 electrically conduct, wherein, first end 121 is for contacting with the first link 31, and the second end 122 is for contacting with the second link 32 or with the 3rd link 33.

By control the first reference electrode 21, the second reference electrode 22 and can the conductive layer 11 of movable plate electrode 10 between electrical potential difference, can make movable pole plate 10 move between the first reference electrode 21 and the second reference electrode 22, the first link 31 and the second link 32 are electrically conducted by described conductive contact end 12, or the first link 31 and the 3rd link 33 electrically conduct by described conductive contact end 12.With reference to figure 1c and Fig. 1 d, when applying high voltage at the first reference electrode 21, for example the first reference electrode 21 connects positive source, the first reference electrode 21 is applied to supply voltage, the second reference electrode 22 applies low-voltage, the second reference electrode 22 ground connection for example, the second reference electrode 22 is applied to no-voltage, by 14 pairs of conductive layers 11 of link, apply high voltage simultaneously, during as supply voltage, between the second reference electrode 22 and conductive layer 11, there is electrical potential difference, there is interaction force between the two, therefore, can under the effect of interaction force, to the second reference electrode 22 directions, move by movable plate electrode 10, make conductive contact end 12 connect the first link 31 and the second link 32, be that first end 121 contacts with the first link 31, the second end 122 contacts with the second link 32, thereby the first link 31 and the second link 32 are electrically conducted.It should be noted that, at this, example that the first link 31 and the second link 32 electrically conduct has been described, those skilled in the art derive according to this, can unquestionablely know the situation that the first link 31 and the 3rd link 33 electrically conduct.Generally speaking, between the first reference electrode 21 and conductive layer 11, have electrical potential difference, thereby while there is interaction force, the first link 31 and the 3rd link 33 electrically conduct; Between the second reference electrode 22 and conductive layer 11, have electrical potential difference, thereby while there is interaction force, the first link 31 and the second link 32 electrically conduct.

In the present invention, conductive layer 11 is at least one deck, in the specific embodiment of the invention, conductive layer 11 is two-layer, compare the interaction force that can increase between conductive layer 11 and the first reference electrode 21, the second reference electrode 22 with one deck conductive layer 11, thus the sensitivity that can increase mems switch device.Certainly, conductive layer 11 is not limited to two-layer, can, for more than two-layer, can be also also one deck.The insulating barrier forming on conductive layer 11 surfaces can prevent that the second reference electrode 22 from contacting with conductive layer 11.

In specific embodiments of the invention, described the second reference electrode 22 is positioned in substrate 40, be specially, be positioned on the lip-deep dielectric layer 41 of substrate 40, described the first reference electrode 21 is positioned at described the second reference electrode 22 tops, the first reference electrode 21 and the second reference electrode 22 are conductive layer, can movable plate electrode 10 between the first reference electrode 21 and the second reference electrode 22.In other embodiments of the invention, can there is no substrate 40 yet.

In specific embodiments of the invention, described the first link 31 comprises the first connecting portion 311 and the second connecting portion 312, wherein the first connecting portion 311 and the second connecting portion 312 are electrically connected, and the electrical connection of the first connecting portion 311 and the second connecting portion 312 is not shown in figure.The first connecting portion 311 and described the second link 32 be at same metal level, and in embodiments of the present invention, described the second reference electrode 22 also can be with the first connecting portion 311 and described the second link 32 at same metal level; The second connecting portion 312 and described the 3rd link 33 be at same metal level, and in the specific embodiment of the invention, described the first reference electrode 21 also can be with the second connecting portion 312 and described the 3rd link 33 at same metal level.The first reference electrode 21 has insulating barrier 23 near surface that can movable plate electrode 10, to prevent that can movable plate electrode 10 during near the first reference electrode 21, the first reference electrode 21 contacts with conductive layer 11.In specific embodiments of the invention, the surface of the second reference electrode 22 does not have insulating barrier, this be because corresponding thereto can have insulating barrier 13 by movable plate electrode 10, can prevent that the second reference electrode 22 from contacting with conductive layer 11, certainly, the surface of the second reference electrode 22 also can have insulating barrier.

It should be noted that, in order to prevent that the first reference electrode from contacting with the conductive layer on can movable plate electrode, and second reference electrode contact with the conductive layer on can movable plate electrode, in specific embodiments of the invention, can movable plate electrode with respect to the surface of the second reference electrode, be provided with insulating barrier, the first reference electrode is provided with insulating barrier with respect to surface that can movable plate electrode, yet this is a specific embodiment of the present invention.In other specific embodiments of the present invention, insulating barrier on can movable plate electrode, insulating barrier on insulating barrier on the first reference electrode and the second reference electrode can arrange as required, as long as play, can prevent that the first reference electrode from contacting with conductive layer on can movable plate electrode and the second reference electrode contacts with the conductive layer on can movable plate electrode.The first reference electrode, the second reference electrode can not have insulating barrier yet, if can guarantee the first reference electrode not can with can movable plate electrode on conductive layer contact and the second reference electrode not can with can movable plate electrode on conductive layer contact.

And in specific embodiments of the invention, the surface that the surface of described conductive contact end can have passivation layer or described the first link, the second link, the 3rd link has passivation layer.Can be: the surface of conductive contact end has passivation layer that the surface of the first link, the second link, the 3rd link does not have passivation layer; Also can be: the surface of conductive contact end does not have passivation layer that the surface of the first link, the second link, the 3rd link has passivation layer.

In the specific embodiment of the invention, the material of the conductive layer 11 can movable plate electrode 10 comprising can be aluminium, titanium, copper, cobalt, nickel, tantalum, thallium, platinum, silver, gold etc. or its combination, and well known to a person skilled in the art other electric conducting materials.The material of conductive contact end 12 can be aluminium, titanium, copper, cobalt, nickel, tantalum, thallium, platinum, silver, gold etc. or its combination, and well known to a person skilled in the art other electric conducting materials.The material of the first reference electrode 21 and the second reference electrode 22 can be aluminium, titanium, copper, cobalt, nickel, tantalum, thallium, platinum, silver, gold etc. or its combination, and well known to a person skilled in the art other electric conducting materials.The material of the first link 31, the second link 32 and the 3rd link 33 can be aluminium, titanium, copper, cobalt, nickel, tantalum, thallium, platinum, silver, gold etc. or its combination, and well known to a person skilled in the art other electric conducting materials.

The material of the insulating barrier 13 on conductive layer 11 surfaces is SiO ₂, Si ₃n ₄, SiN _x, SiON, SiCO _xetc..The material of the insulating barrier on the first reference electrode 21 surfaces is SiO ₂, Si ₃n ₄, SiN _x, SiON, SiCO _xetc..

In the specific embodiment of the invention, substrate 40 can be also silicon-on-insulator (SOI) for monocrystalline silicon or SiGe (SiGe), can also comprise other material, for example indium antimonide, lead telluride, indium arsenide, indium phosphide, GaAs or gallium antimonide.Can also there is MOS device substrate 40 is interior.

It should be noted that, the above is only a specific embodiment of the present invention, in other embodiments, the distribution mode of the first link, the second link and the 3rd link is also not limited to above-described mode, those skilled in the art can do corresponding change to it according to its derivation, yet all do not depart from spirit of the present invention.For example, in other embodiments, when the first connecting portion 311 is not connected with the second connecting portion 312, the first connecting portion 311 can be used as the second link, the second connecting portion 312 can be used as the 3rd link, after the 3rd link 33 and the second link 32 are electrically connected as the first link.

Utilize above-described mems switch device of the present invention, the invention provides a kind of gate, comprising: with door, not gate, or door, NAND gate, NOR gate, AND OR NOT gate, selector, trigger, triple gates etc. well known to a person skilled in the art other gates, in specific embodiments of the invention, only list the gate of limited kinds.

The gate of the specific embodiment of the invention, comprise at least one input, an output, connects by least one mems switch device between described input and described output, to realize logic function, described mems switch device is above-described mems switch device.

Before the gate of the explanation specific embodiment of the invention, the symbol of paper mems switch device of the present invention.Fig. 2 a is that the first reference electrode 21 meets voltage VCC1+, and the second reference electrode 22 connects the graphical diagram of the mems switch device of voltage VCC1-; Fig. 2 b is that the first reference electrode 21 meets voltage VCC1-, and the second reference electrode 22 connects the graphical diagram of the mems switch device of voltage VCC1+.With reference to figure 2a and Fig. 2 b, and combination is with reference to figure 1a, A ₀expression can movable plate electrode 10 conductive layer 11, B ₀represent the second link 32, C ₀represent the 3rd link 33, D ₀represent the first link 31, E ₀represent conductive contact end 12.Wherein, the value of voltage VCC1+ and voltage VCC1-can determine according to actual conditions, and VCC1+ is greater than VCC1-, and for example voltage VCC1+ can be supply voltage, and voltage VCC1-can be zero.

Below in conjunction with specific embodiment, describe the gate of the specific embodiment of the invention in detail.

The following describes the not gate in gate,

Fig. 3 a is the circuit diagram of the first specific embodiment of not gate of the present invention, Fig. 3 b is the circuit diagram of the second specific embodiment of not gate of the present invention, with reference to figure 3a and Fig. 3 b, the not gate of the specific embodiment of the invention comprises an input (not shown) and a mems switch device, can being connected with described input by movable plate electrode of mems switch device, in specific embodiments of the invention, the conductive layer by can movable plate electrode is connected with described input; The second link input logic high level, described the 3rd link input logic low level; Described the first link is connected with described output; The first reference electrode is inputted the first voltage, the second reference electrode input second voltage, and described second voltage is greater than described the first voltage; Or, described the second link input logic low level, described the 3rd link input logic high level; Described the first reference electrode is inputted the first voltage, described the second reference electrode input second voltage, and described second voltage is less than described the first voltage.

With reference to figure 3a, in the first specific embodiment of not gate of the present invention, the second link input logic high level, described the 3rd link input logic low level, the second link input voltage VCC+ in the present invention, the 3rd link input voltage VCC-, wherein the value of voltage VCC+ and voltage VCC-is determined according to actual circuit, as long as meet VCC+, is greater than VCC-; Described the first reference electrode is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

In the first specific embodiment of not gate of the present invention, when being 1 by input to conductive layer input signal A that can movable plate electrode, by input by can movable plate electrode conductive layer high input voltage time, can under the effect of interaction force, to the direction of the first reference electrode, move by movable plate electrode, the first link and the 3rd link electrically conduct by conductive contact end, output signal OUT is voltage VCC-, is logical zero; When being 0 by input to conductive layer input a-signal that can movable plate electrode, by input by can movable plate electrode conductive layer input low-voltage time, can under the effect of interaction force, to the direction of the second reference electrode, move by movable plate electrode, the first link and the second link electrically conduct by conductive contact end, output signal OUT is voltage VCC+, is logical one; Thereby realize the logic function of not gate,

With reference to figure 3b, in the second specific embodiment of not gate of the present invention, described the second link input logic low level, described the 3rd link input logic high level, the second link input voltage VCC-in the present invention, the 3rd link input voltage VCC+, wherein the value of voltage VCC+ and voltage VCC-is determined according to actual circuit, as long as meet VCC+, is greater than VCC-; Described the first reference electrode is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than described the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

In the second specific embodiment of not gate of the present invention, when being 1 by input to the signal A of conductive layer input that can movable plate electrode, by input by can movable plate electrode conductive layer high input voltage time, can under the effect of interaction force, to the direction of the second reference electrode, move by movable plate electrode, the first link and the second link electrically conduct by conductive contact end, the output signal OUT of the first link is voltage VCC-, is logical zero; When being 0 by input to conductive layer input signal A that can movable plate electrode, by input by can movable plate electrode conductive layer input low-voltage time, can under the effect of interaction force, to the direction of the first reference electrode, move by movable plate electrode, the first link and the 3rd link electrically conduct by conductive contact end, the output signal OUT of the first link is voltage VCC+, is logical one; Thereby realize the logic function of not gate,

Not gate truth table of the present invention is as follows:

A OUT

1(VCC+) 0(VCC-)

0(VCC-) 1(VCC+)

The following describes in gate with door, OUT=AB.

Fig. 4 a is of the present invention and the circuit diagram family status one specific embodiment, Fig. 4 b is the circuit diagram of the present invention and the family status two specific embodiments, with reference to figure 4a and Fig. 4 b, two inputs and the door of the specific embodiment of the invention, comprise two input (not shown), be respectively first input end and the second input, described mems switch device is one; Can being connected with described first input end by movable plate electrode of described mems switch device, in specific embodiments of the invention, the conductive layer by can movable plate electrode is connected with described input; The second link of described mems switch device is connected with described the second input, the 3rd link input logic low level of described mems switch device, and the first link of described mems switch device is connected with described output; The first reference electrode of described mems switch device is inputted the first voltage, the second reference electrode input second voltage of described mems switch device, and described second voltage is less than described the first voltage; Or, the second link input logic low level of described mems switch device, the 3rd link of described mems switch device is connected with described the second input; Described second voltage is greater than described the first voltage.

With reference to figure 4a, in the first specific embodiment of the present invention and door, described mems switch device can movable plate electrode conductive layer be connected with described first input end, for input signal A, the second link of described mems switch device is connected with described the second input, for input signal B, the 3rd link input logic low level of described mems switch device, the 3rd link input voltage VCC-in the present invention, wherein the value of voltage VCC-is determined according to actual circuit, the first link of described mems switch device is connected with described output, for output signal OUT, the first reference electrode of described mems switch device is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

In the first specific embodiment of of the present invention and door, when being 1 by first input end to the signal A of conductive layer input that can movable plate electrode, by first input end by can movable plate electrode conductive layer high input voltage time, can under the effect of interaction force, to the direction of the second reference electrode, move by movable plate electrode, the first link and the second link electrically conduct by conductive contact end, the output signal OUT of the first link is the signal B to the second link input by the second input, if B is high voltage, be that B is while being logical one, output signal OUT is logical one, if B is low-voltage, be that B is while being logical zero, output signal OUT is logical zero.When being 0 by first input end to the signal A of conductive layer input that can movable plate electrode, by first input end by can movable plate electrode conductive layer input low-voltage time, can under the effect of interaction force, to the direction of the first reference electrode, move by movable plate electrode, the first link and the 3rd link electrically conduct by conductive contact end, no matter signal B is logical one or logical zero, output signal OUT is zero, is logical zero; Thereby the logic function of realization and door, i.e. OUT=AB.

With reference to figure 4b, the present invention's the second specific embodiment with door in, described mems switch device can movable plate electrode conductive layer be connected with described first input end, for inputting a-signal by first input end, the second link input logic low level of described mems switch device, the second link input voltage VCC-in the present invention, wherein the value of voltage VCC-is determined according to actual circuit, the 3rd link of described mems switch device is connected with described the second input, for inputting B signal by the second input, the first link of described mems switch device is connected with described output, output signal output OUT, the first reference electrode of described mems switch device is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.That is to say, the second specific embodiment with the comparing with door of door and the first specific embodiment, if the voltage height of the first reference electrode and the input of the second reference electrode is contrary, the circuit connecting mode of the second link and the 3rd link will exchange.

In the second specific embodiment of of the present invention and door, when signal A is 1, by first input end by can movable plate electrode conductive layer high input voltage time, can under the effect of interaction force, to the direction of the first reference electrode, move by movable plate electrode, the first link and the 3rd link electrically conduct by conductive contact end, output signal OUT is the signal B to the 3rd link input by the second input, if B is high voltage, it is logical one, output signal OUT is logical one, if B is low-voltage, be logical zero, output signal OUT is logical zero.When signal A is 0, by first input end by can movable plate electrode conductive layer input low-voltage time, can under the effect of interaction force, to the direction of the second reference electrode, move by movable plate electrode, the first link and the second link electrically conduct by conductive contact end, no matter signal B is logical one or logical zero, and output signal OUT is logical zero; Thereby the logic function of realization and door, i.e. OUT=AB.

Truth table of the present invention and door is:

A B OUT

1(VCC+) 1(VCC+) 1(VCC+)

1(VCC+) 0(VCC-) 0(VCC-)

0(VCC-) 1(VCC+) 0(VCC-)

0(VCC-) 0(VCC-) 0(VCC-)

The following describes the specific embodiment of the invention or door, OUT=A+B.

Fig. 5 a is the circuit diagram of the first specific embodiment of the present invention or door, Fig. 5 b is the circuit diagram of the second specific embodiment of the present invention or door, with reference to figure 5a and Fig. 5 b, two inputs or the door of the specific embodiment of the invention comprise two input (not shown), be respectively first input end and the second input, described mems switch device is one; Can being connected with described first input end by movable plate electrode of described mems switch device, in specific embodiments of the invention, the conductive layer by can movable plate electrode is connected with described input; The second link of described mems switch device is connected with described the second input, the 3rd link input logic high level of described mems switch device, and the first link of described mems switch device is connected with described output; The first reference electrode of described mems switch device is inputted the first voltage, the second reference electrode input second voltage of described mems switch device, and described second voltage is greater than described the first voltage; Or, the second link input logic high level of described mems switch device, the 3rd link of described mems switch device is connected with described the second input, and the first link of described mems switch device is connected with described output; Described second voltage is less than described the first voltage.

With reference to figure 5a, in the first specific embodiment of of the present invention or door, described mems switch device can movable plate electrode conductive layer be connected with described first input end, input a-signal; The second link of described mems switch device is connected with described the second input, input B signal, the 3rd link input logic high level of described mems switch device, the 3rd link input voltage VCC+ in the present invention, wherein the value of voltage VCC+ is determined according to actual circuit; The first link of described mems switch device is connected with described output, output signal output OUT; The first reference electrode of described mems switch device is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

In the first specific embodiment of of the present invention or door, when a-signal is logical one, by first input end by can movable plate electrode conductive layer high input voltage time, can under the effect of interaction force, to the direction of the first reference electrode, move by movable plate electrode, the first link and the 3rd link electrically conduct by conductive contact end, no matter B signal is logical one or logical zero, and output signal OUT is voltage VCC+, is logical one.When signal A is logical zero, by first input end by can movable plate electrode conductive layer input low-voltage time, can under the effect of interaction force, to the direction of the second reference electrode, move by movable plate electrode, the first link and the second link electrically conduct by conductive contact end, output signal OUT is identical with B signal, if B signal is low-voltage, it is logical zero, output signal OUT is logical zero, if B signal is high voltage, i.e. logical one, output signal OUT is logical one, thereby can realize logic OR function, i.e. OUT=A+B.

With reference to figure 5b, in the second specific embodiment of of the present invention or door, described mems switch device can movable plate electrode conductive layer be connected with described first input end, input a-signal; The second link input logic high level of described mems switch device, the second link input voltage VCC+ in the present invention, wherein the value of voltage VCC+ is determined according to actual circuit; The 3rd link of described mems switch device is connected with described the second input, input B signal, and the first link of described mems switch device is connected with described output, output signal output OUT; In the second specific embodiment of the present invention, the first reference electrode of described mems switch device is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.That is to say, the second specific embodiment or door and the first specific embodiment or door is compared, if the voltage height of the first reference electrode and the second reference electrode input on the contrary, the circuit connecting mode of the second link and the 3rd link will exchange.

In the second specific embodiment of of the present invention or door, when signal A is logical one, by first input end by can movable plate electrode conductive layer high input voltage time, can under the effect of interaction force, to the direction of the second reference electrode, move by movable plate electrode, the first link and the second link electrically conduct by conductive contact end, no matter B signal is logical zero or logical one, and output signal OUT is voltage VCC+, i.e. logical one.When signal A is 0, by first input end by can movable plate electrode conductive layer input low-voltage time, can under the effect of interaction force, to the direction of the first reference electrode, move by movable plate electrode, the first link and the 3rd link electrically conduct by conductive contact end, output signal OUT is B signal, if B signal is low-voltage, it is logical zero, output signal OUT is logical zero, if B signal is high voltage, i.e. logical one, output signal OUT is logical one, thereby can realize logic OR function, i.e. OUT=A+B.

Truth table of the present invention or door is:

A B OUT

1(VCC+) 1(VCC+) 1(VCC+)

1(VCC+) 0(VCC-) 1(VCC+)

0(VCC-) 1(VCC+) 1(VCC+)

0(VCC-) 0(VCC-) 0(VCC-)

The following describes two input nand gates of the specific embodiment of the invention,

Fig. 6 a is the circuit diagram of two input nand gate the first specific embodiments of the present invention, Fig. 6 b is the circuit diagram of two input nand gate the second specific embodiments of the present invention, Fig. 6 c is the circuit diagram of two input nand gates the 3rd specific embodiment of the present invention, Fig. 6 d is the circuit diagram of two input nand gates the 4th specific embodiment of the present invention, with reference to figure 6a, Fig. 6 b, Fig. 6 c and Fig. 6 d, two input nand gates of the specific embodiment of the invention comprise two input (not shown), be respectively first input end and the second input, one output (not shown), described mems switch device is two, be respectively the first mems switch device 61 and the second mems switch device 62, described the first mems switch device 61 can movable plate electrode conductive layer be connected with described first input end, the second link of described the first mems switch device 61 is connected with described the second input, the 3rd link input logic low level of described the first mems switch device 61, the first link of described the first mems switch device 61 can be connected by movable plate electrode with described the second mems switch device 62, in specific embodiments of the invention, by the second mems switch device 62 can movable plate electrode conductive layer be connected with the first link of described the first mems switch device 61, the first reference electrode of described the first mems switch device 61 is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device 61, and described second voltage is less than described the first voltage, or, the second link input logic low level of described the first mems switch device 61, the 3rd link of described the first mems switch device 61 is connected with described the second input, and described second voltage is greater than described the first voltage,

The second link input logic high level of described the second mems switch device 62, the 3rd link input logic low level of described the second mems switch device, the first link of described the second mems switch device is connected with described output; The first reference electrode input tertiary voltage of described the second mems switch device 62, the second reference electrode input the 4th voltage of described the second mems switch device, described the 4th voltage is greater than described tertiary voltage; Or, the second link input logic low level of described the second mems switch device, the 3rd link input logic high level of described the second mems switch device, the first link of described the second mems switch device is connected with described output; Described the 4th voltage is less than described tertiary voltage.

According to the embodiment of NAND gate of the present invention, can find out, the second link of each mems switch device and the connected mode of the 3rd link change along with the change of the connected mode of the first reference electrode and the second reference electrode, if the reference voltage of the reference voltage of the first reference electrode input and the input of the second reference electrode exchanges, the connected mode of the second link and the 3rd link also will be exchanged, thereby can guarantee the realization of NAND gate.

With reference to figure 6a, in the first specific embodiment of NAND gate of the present invention, described the first mems switch device 61 can movable plate electrode conductive layer be connected with described first input end, be used for inputting a-signal, the second link of described the first mems switch device 61 is connected with described the second input, be used for inputting B signal, the 3rd link input logic low level of described the first mems switch device 61, the 3rd link input voltage VCC-in the present invention, wherein, the value of voltage VCC-is determined according to actual circuit; The first link of described the first mems switch device 61 and described the second mems switch device 62 can movable plate electrode conductive layer be connected; The first reference electrode of described the first mems switch device is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

The second link input logic high level of described the second mems switch device 62, the 3rd link input logic low level of described the second mems switch device, the second link input voltage VCC+ in the present invention, the 3rd link input voltage VCC-, wherein the value of voltage VCC+ and voltage VCC-is determined according to actual circuit, wherein, VCC+ is greater than VCC-.The first link of described the second mems switch device is connected with described output, for output signal output OUT; The first reference electrode input tertiary voltage VCC1-of described the second mems switch device, described the second reference electrode input the 4th voltage VCC1+, described the 4th voltage is greater than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

In the first specific embodiment of NAND gate of the present invention, when signal A is logical one, by first input end by the first mems switch device 61 can movable plate electrode conductive layer high input voltage time, the first mems switch device can movable plate electrode under the effect of interaction force the direction to the second reference electrode of the first mems switch device move, the first link output signal B of the first mems switch device 61, if now signal B is logical one, while being high voltage, the the second mems switch device 62 being connected with the first link of the first mems switch device 61 can movable plate electrode conductive layer input B signal, for high voltage, the second mems switch device 62 can movable plate electrode conductive layer to the first reference electrode direction of the second mems switch device 62, move, the first link of the second mems switch device 62 and the 3rd link electrically conduct by conductive contact end, the output signal OUT of output is voltage VCC-, be logical zero, if signal B is logical zero, while being low-voltage, the the second mems switch device 62 being connected with the first link of the first mems switch device 61 can movable plate electrode conductive layer input B signal, for low-voltage, can movable plate electrode moving to the second reference electrode direction of the second mems switch device 62 of the second mems switch device 62, the first link and second link of the second mems switch device 62 electrically conduct by conductive contact end, and the output signal OUT of output is voltage VCC+, is logical one.

When signal A is logical zero, by first input end by the first mems switch device 61 can movable plate electrode conductive layer input low-voltage time, can movable plate electrode first reference electrode direction to the first mems switch device under the effect of interaction force move, the first link output LOW voltage VCC-of the first mems switch device 61, the the second mems switch device 62 being connected with the first link of the first mems switch device 61 can movable plate electrode conductive layer input low-voltage VCC-, can movable plate electrode moving to the second reference electrode direction of the second mems switch device 62 of the second mems switch device 62, the first link and second link of the second mems switch device 62 electrically conduct by conductive contact end, now, no matter B signal is logical zero or logical one, the output signal OUT of the first link output of the second mems switch device 62 is voltage VCC+, for logical one.

With reference to figure 6b, the second specific embodiment of NAND gate of the present invention and the difference of the first specific embodiment are: the second link input logic low level of described the second mems switch device 62, the 3rd link input logic high level of described the second mems switch device 62; The first reference electrode input tertiary voltage VCC1+ of described the second mems switch device 62, described the second reference electrode input the 4th voltage VCC1-, described the 4th voltage is less than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.The connected mode of the first mems switch device 61 is constant, due to the first reference electrode of the second mems switch device 62 and the exchange of the input reference voltage of the second reference electrode, therefore the second link of the second mems switch device 62 and the connected mode of the 3rd link are also exchanged accordingly.

Operation principle about the NAND gate of the second specific embodiment is not described, and those skilled in the art, according to the description to the operation principle of the NAND gate of the first specific embodiment, can derive the operation principle of the NAND gate of the second specific embodiment.

With reference to figure 6c, the 3rd specific embodiment of NAND gate of the present invention and the difference of the first specific embodiment are: the first reference electrode of the first mems switch device 61 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the first mems switch device 61 and the connected mode of the 3rd link are also exchanged.Be specially: the second link input logic low level of described the first mems switch device 61, the 3rd link of described the first mems switch device 61 is connected with described the second input, for inputting B signal; The first reference electrode of described the first mems switch device 61 is inputted the first voltage VCC1-, the second reference electrode input second voltage VCC1+ of described the first mems switch device 61, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.The connected mode of the second mems switch device does not change.

Operation principle about the NAND gate of the 3rd specific embodiment is not described, and those skilled in the art, according to the description to the operation principle of the NAND gate of the first specific embodiment, can derive the operation principle of the NAND gate of the 3rd specific embodiment.

With reference to figure 6d, the 4th specific embodiment of NAND gate of the present invention and the difference of the first specific embodiment are: the first reference electrode of the first mems switch device 61 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the first mems switch device 61 and the connected mode of the 3rd link are also exchanged; The first reference electrode of the second mems switch device 62 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the second mems switch device 62 and the connected mode of the 3rd link are also exchanged accordingly.Be specially: the second link input logic low level of described the first mems switch device 61, the 3rd link of described the first mems switch device 61 is connected with described the second input, for inputting B signal; The first reference electrode of described the first mems switch device is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.The second link input logic low level of described the second mems switch device 62, the 3rd link input logic high level of described the second mems switch device; The first reference electrode input tertiary voltage VCC1+ of described the second mems switch device 62, described the second reference electrode input the 4th voltage VCC1-, described the 4th voltage is less than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

Operation principle about the NAND gate of the 4th specific embodiment is not described, and those skilled in the art, according to the description to the operation principle of the NAND gate of the first specific embodiment, can derive the operation principle of the NAND gate of the 4th specific embodiment.

In the NAND gate of four specific embodiments of above-described the present invention, can the first mems switch device and the second mems switch device is stacked, and the first mems switch device and the second mems switch device share the first reference electrode or the second reference electrode, that is to say that the first mems switch device and the second mems switch device can stackedly arrange, can save the quantity of reference electrode like this, specifically sharing the first reference electrode or the second reference electrode will make a concrete analysis of according to actual circuit.

Fig. 6 e is the circuit diagram of the 5th specific embodiment of NAND gate of the present invention, Fig. 6 f is the circuit diagram of the 6th specific embodiment of NAND gate of the present invention, with reference to figure 6e and Fig. 6 f, the NAND gate of another kind of embodiment of the present invention can realize by a mems switch device, its prerequisite is: the signal from two input inputs becomes logic NOT signal via front stage circuits, that is to say, these non-signals refer in front stage circuits and occur, and this level just in time will be used these non-signals, the signal A being inputted from first input end becomes the logic NOT signal of original signal A via front stage circuits signal B from the second input input becomes the logic NOT signal of original signal B via front stage circuits with reference to figure 6e and Fig. 6 f, the NAND gate of another embodiment of the present invention comprises two input (not shown), be respectively first input end and the second input, described first input end input first signal, described the second input input secondary signal, described NAND gate realizes by a mems switch device, described mems switch device can movable plate electrode the input signal contrary with described first signal logic, in the specific embodiment of the invention, by conductive layer that can movable plate electrode, input the signal contrary with described first signal logic, the second link input signal contrary with described secondary signal logic of described mems switch device, the 3rd link input logic high level of described mems switch device, the first link of described mems switch device is connected with described output, the first reference electrode of described mems switch device is inputted the first voltage, the second reference electrode input second voltage of described mems switch device, and described second voltage is greater than described the first voltage, or, the second link input logic high level of described mems switch device, the 3rd link input signal contrary with described secondary signal logic of described mems switch device, described second voltage is less than described the first voltage.

With reference to figure 6e, the NAND gate of the present invention's the 5th specific embodiment, described first input end input first signal, is signal A, described the second input input secondary signal, is signal B; Described mems switch device can movable plate electrode the conductive layer input signal contrary with described first signal logic, i.e. signal the second link input signal contrary with described secondary signal logic of described mems switch device, i.e. signal the 3rd link input logic high level of described mems switch device, the 3rd link input voltage VCC+ in this example, the value of VCC+ is determined according to actual conditions; The first link of described mems switch device is connected with described output, output signal OUT; The first reference electrode of described mems switch device is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

In the NAND gate of the 5th specific embodiment of the present invention, when signal A is logical one, the signal of conductive layer input that can movable plate electrode by mems switch device is the logical inverse signal of signal A be logical zero, now can to the second reference electrode direction, move by movable plate electrode, the first link and the second link electrically conduct by conductive contact end, and the signal OUT of output output is the logical inverse signal of signal B if now signal B is logical one, output signal OUT is logical zero, if signal B is logical zero, output signal OUT is logical one.

When signal A is logical zero, the signal of conductive layer input that can movable plate electrode by mems switch device is the logical inverse signal of signal A be logical one, now can to the first reference electrode direction, move by movable plate electrode, the first link and the 3rd link electrically conduct by conductive contact end, and now no matter signal B is logical zero or logical one, and the signal OUT of output output is voltage VCC+, is logical one.

With reference to figure 6f, the difference of the NAND gate of the present invention's the 6th specific embodiment and the NAND gate of the 5th specific embodiment is: the first reference electrode of mems switch device and the connected mode of the second reference electrode are exchanged, and corresponding the second link of mems switch device and the connected mode of the 3rd link are also exchanged.Be specially: the second link input logic high level of described mems switch device, the second link input voltage VCC+ in this example, the value of voltage VCC+ is determined according to actual conditions; The 3rd link input signal contrary with described secondary signal logic of described mems switch device is signal in this specific embodiment described second voltage is less than described the first voltage, in this specific embodiment, the first reference electrode of described mems switch device is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

Operation principle about the NAND gate of the 6th specific embodiment is not described, and those skilled in the art, according to the description to the operation principle of the NAND gate of the 5th specific embodiment, can derive the operation principle of the NAND gate of the 6th specific embodiment.

NAND gate of the present invention truth table be:

A B OUT

1(VCC+) 1(VCC+) 0(VCC-)

1(VCC+) 0(VCC-) 1(VCC+)

0(VCC-) 1(VCC+) 1(VCC+)

0(VCC-) 0(VCC-) 1(VCC+)

The following describes two input NOR gate of the present invention embodiment.

Fig. 7 a is the circuit diagram of the first specific embodiment of NOR gate of the present invention; Fig. 7 b is the circuit diagram of the second specific embodiment of NOR gate of the present invention; Fig. 7 c is the circuit diagram of the 3rd specific embodiment of NOR gate of the present invention; Fig. 7 d is the circuit diagram of the 4th specific embodiment of NOR gate of the present invention; With reference to figure 7a～Fig. 7 d, two input NOR gate of the specific embodiment of the invention comprise:

Two input (not shown), are respectively first input end and the second input, and two mems switch devices are respectively the first mems switch device 71 and the second mems switch device 72; Can being connected with described first input end by movable plate electrode of described the first mems switch device 71, in the specific embodiment of the invention, the conductive layer by can movable plate electrode is connected with described first input end; The second link of described the first mems switch device 71 is connected with described the second input, the 3rd link input logic high level of described the first mems switch device 71, the first link of described the first mems switch device 71 and described the second mems switch device 72 can movable plate electrode conductive layer be connected; The first reference electrode of described the first mems switch device 71 is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device 71, and described second voltage is greater than described the first voltage; Or, the second link input logic high level of described the first mems switch device 71, the 3rd link of described the first mems switch device is connected with described the second input, and described second voltage is less than described the first voltage;

The second link input logic high level of described the second mems switch device 72, the 3rd link input logic low level of described the second mems switch device 72, the first link of described the second mems switch device 72 is connected with described output; The first reference electrode input tertiary voltage of described the second mems switch device 72, the second reference electrode input the 4th voltage of described the second mems switch device 72, described the 4th voltage is greater than described tertiary voltage; Or, the second link input logic low level of described the second mems switch device 72, the 3rd link input logic high level of described the second mems switch device, described the 4th voltage is less than described tertiary voltage.

Below in conjunction with specific embodiment in detail two input NOR gate are described in detail.

With reference to figure 7a, the NOR gate of the first specific embodiment of the present invention, described the first mems switch device 71 can movable plate electrode conductive layer be connected with described first input end, for input signal A, the second link of described the first mems switch device 71 is connected with described the second input, for input signal B, and the 3rd link input logic high level of described the first mems switch device 71, input voltage VCC+ in this specific embodiment, the value of voltage VCC+ is determined according to actual conditions; The first link of described the first mems switch device 71 and described the second mems switch device 72 can movable plate electrode conductive layer be connected; The first reference electrode of described the first mems switch device 71 is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device 71; In this specific embodiment, the first reference electrode of described the first mems switch device 71 is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

The second link input logic high level of described the second mems switch device 72, the 3rd link input logic low level of described the second mems switch device 72, the first link of described the second mems switch device 72 is connected with described output, for output signal output OUT; The first reference electrode input tertiary voltage VCC1-of described the second mems switch device 72, described the second reference electrode input the 4th voltage VCC1+, described the 4th voltage is greater than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

In the NOR gate of the first specific embodiment of the present invention, when signal A is logical one, by first input end by the first mems switch device 71 can movable plate electrode conductive layer high input voltage time, can movable plate electrode under the effect of interaction force the direction to the first reference electrode of the first mems switch device 71 move, the first link of the first mems switch device 71 and the 3rd link conduct, output voltage V CC+, the the second mems switch device 72 being connected with the first link of the first mems switch device 71 can movable plate electrode conductive layer input voltage VCC+, can movable plate electrode moving to the first reference electrode direction of the second mems switch device 72 of the second mems switch device 72, the first link of the second mems switch device 72 and the 3rd link conduct, now, no matter signal B is logical zero or logical one, the output signal OUT of the first link output of the second mems switch device 72 is voltage VCC-, be logical zero.

When signal A is logical zero, by first input end by the first mems switch device 71 can movable plate electrode conductive layer input low-voltage time, can movable plate electrode under the effect of interaction force the direction to the second reference electrode of the first mems switch device 71 move, the first link and second link of the first mems switch device 71 conduct, output signal B; The the second mems switch device 72 being connected with the first link of the first mems switch device 71 can movable plate electrode conductive layer input signal B, now, if signal B is logical zero, during for low-voltage, can movable plate electrode moving to the second reference electrode direction of the second mems switch device 72 of the second mems switch device 72, the first link and second link of the second mems switch device 72 conduct, and output voltage V CC+ is logical one; If signal B is logical one, during for high voltage, can movable plate electrode the moving to the first reference electrode direction of the second mems switch device 72 of the second mems switch device 72, the first link of the second mems switch device 72 and the 3rd link conduct, output voltage V CC-is logical zero.

With reference to figure 7b, the difference of the NOR gate of the NOR gate of the second specific embodiment of the present invention and the first specific embodiment is: the first reference electrode of the second mems switch device 72 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the second mems switch device 72 and the connected mode of the 3rd link are also exchanged.Be specially: the second link input logic low level of described the second mems switch device 72, the 3rd link input logic high level of described the second mems switch device 72, in the specific embodiment of the invention, the second link input voltage VCC-, the 3rd link input voltage VCC+, the occurrence of voltage VCC+ and voltage VCC-is determined according to actual conditions, as long as meet the condition that VCC+ is greater than VCC-; The first reference electrode input tertiary voltage VCC1+ of described the second mems switch device 72, described the second reference electrode input the 4th voltage VCC1-, described the 4th voltage is less than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.The connected mode of the first mems switch device 71 does not change.Operation principle about the NOR gate of the second specific embodiment is not described, and those skilled in the art, according to the description to the operation principle of the NOR gate of the first specific embodiment, can derive the operation principle of the NOR gate of the second specific embodiment.

With reference to figure 7c, the difference of the NOR gate of the NOR gate of the 3rd specific embodiment of the present invention and the first specific embodiment is: the first reference electrode of the first mems switch device 71 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the first mems switch device 71 and the connected mode of the 3rd link are also exchanged.Be specially: the second link input logic high level of described the first mems switch device 71, input voltage VCC+ in the specific embodiment of the invention, the occurrence of voltage VCC+ is determined according to actual conditions; The 3rd link input signal B of described the first mems switch device 71; The first reference electrode of described the first mems switch device 71 is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.The connected mode of the second mems switch device 72 does not change.Operation principle about the NOR gate of the 3rd specific embodiment is not described, and those skilled in the art, according to the description to the operation principle of the NOR gate of the first specific embodiment, can derive the operation principle of the NOR gate of the 3rd specific embodiment.

With reference to figure 7d, the difference of the NOR gate of the NOR gate of the 4th specific embodiment of the present invention and the first specific embodiment is: the first reference electrode of the first mems switch device 71 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the first mems switch device 71 and the connected mode of the 3rd link are also exchanged; The first reference electrode of the second mems switch device 72 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the second mems switch device 72 and the connected mode of the 3rd link are also exchanged.Be specially: the second link input logic high level of described the first mems switch device 71, input voltage VCC+ in this specific embodiment, the value of voltage VCC+ is determined according to actual conditions; The 3rd link input signal B of described the first mems switch device 71; The first reference electrode of described the first mems switch device 71 is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.The second link input logic low level of described the second mems switch device 72, the 3rd link input logic high level of described the second mems switch device 72, in the specific embodiment of the invention, the second link input voltage VCC-, the 3rd link input voltage VCC+, the occurrence of voltage VCC+ and voltage VCC-is determined according to actual conditions, is met VCC+ and be greater than VCC-; The first reference electrode input tertiary voltage VCC1+ of described the second mems switch device 72, described the second reference electrode input the 4th voltage VCC1-, described the 4th voltage is less than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

Operation principle about the NOR gate of the 4th specific embodiment is not described, and those skilled in the art, according to the description to the operation principle of the NOR gate of the first specific embodiment, can derive the operation principle of the NOR gate of the 4th specific embodiment.

The first mems switch device and the second mems switch device of the NOR gate of four specific embodiments of above-described the present invention can be stacked, and the first mems switch device and the second mems switch device share the first reference electrode or the second reference electrode, that is to say that the first mems switch device and the second mems switch device can stackedly arrange, can save the quantity of reference electrode like this, specifically sharing the first reference electrode or the second reference electrode will make a concrete analysis of according to actual circuit.

Fig. 7 e is the circuit diagram of the 5th specific embodiment of NOR gate of the present invention, the circuit diagram of the 6th specific embodiment of Fig. 7 f NOR gate of the present invention, with reference to figure 7e and Fig. 7 f, the NOR gate of another kind of embodiment of the present invention can realize by a mems switch device, its prerequisite is: the signal from two input inputs becomes logic NOT signal via front stage circuits, that is to say, these non-signals refer in front stage circuits and occur, and this grade just in time will be used the non-signal of original signal, the signal A being inputted from first input end becomes the logic NOT signal of signal A via front stage circuits signal B from the second input input becomes the logic NOT signal of signal B via front stage circuits

With reference to figure 7e and Fig. 7 f, the NOR gate of another embodiment of the present invention comprises two input (not shown), be respectively first input end and the second input, described first input end input first signal, described the second input input secondary signal, described NOR gate realizes by a mems switch device; Described mems switch device can movable plate electrode the input signal contrary with described first signal logic, in the specific embodiment of the invention, by conductive layer that can movable plate electrode, input the signal contrary with described first signal logic; The second link input signal contrary with described secondary signal logic of described mems switch device, the 3rd link input logic low level of described mems switch device, the first link of described mems switch device is connected with described output; The first reference electrode of described mems switch device is inputted the first voltage, the second reference electrode input second voltage of described mems switch device, and described second voltage is less than described the first voltage; Or, the second link input logic low level of described mems switch device, the 3rd link input signal contrary with described secondary signal logic of described mems switch device; Described second voltage is greater than described the first voltage.

With reference to figure 7e, the NOR gate of the present invention's the 5th specific embodiment, described first input end input first signal, is signal A, described the second input input secondary signal, is signal B; Described mems switch device can movable plate electrode the conductive layer input signal contrary with described first signal logic, i.e. the logic NOT signal of signal A the second link input signal contrary with described secondary signal logic of described mems switch device, i.e. the logic NOT signal of signal B the 3rd link input logic low level of described mems switch device, input voltage VCC-in the specific embodiment of the invention, the value of voltage VCC-is determined according to actual conditions.The first link of described mems switch device is connected with described output, for output signal output OUT; The first reference electrode of described mems switch device is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

In the NOR gate of the 5th specific embodiment of the present invention, when signal A is logical one, the signal of conductive layer input that can movable plate electrode by mems switch device is the logic NOT signal of signal A be logical zero, now can to the first reference electrode direction, move by movable plate electrode, the first link and the 3rd link conduct, and now no matter signal B is logical zero or logical one, and the signal OUT of output output is voltage VCC-, is logical zero.

When signal A is logical zero, the signal of conductive layer input that can movable plate electrode by mems switch device is the logic NOT signal of signal A be logical one, now can to the second reference electrode direction, move by movable plate electrode, the first link and the second link conduct, and now, if signal B is logical zero, output output signal OUT is the logic NOT signal of signal B for logical one, if signal B is logical one, output output signal OUT is the logic NOT signal of signal B for logical zero.

With reference to figure 7f, the difference of the NOR gate of the present invention's the 6th specific embodiment and the NOR gate of the 5th specific embodiment is: the first reference electrode of mems switch device and the connected mode of the second reference electrode are exchanged, and corresponding the second link of mems switch device and the connected mode of the 3rd link are also exchanged.Be specially: the second link input logic low level of described mems switch device, input voltage VCC-in the specific embodiment of the invention, the value of voltage VCC-is determined according to actual conditions; The 3rd link input signal contrary with described secondary signal logic of described mems switch device is signal in this specific embodiment the first reference electrode of described mems switch device is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

Operation principle about the NOR gate of the 6th specific embodiment is not described, and those skilled in the art, according to the description to the operation principle of the NOR gate of the 5th specific embodiment, can derive the operation principle of the NOR gate of the 6th specific embodiment.

NOR gate of the present invention truth table be:

A B OUT

1(VCC+) 1(VCC+) 0(VCC-)

1(VCC+) 0(VCC-) 0(VCC-)

0(VCC-) 1(VCC+) 0(VCC-)

0(VCC-) 0(VCC-) 1(VCC+)

Below in conjunction with specific embodiment, describe four input AND OR NOT gate of the specific embodiment of the invention in detail

OUT = \overset{&OverBar;}{(A \cdot B) + (C \cdot D)} .

Fig. 8 a is the circuit diagram of four input AND OR NOT gate of the present invention's the first specific embodiment, with reference to figure 8a, four input AND OR NOT gate of the specific embodiment of the invention are drawn together four input (not shown), be respectively first input end, the second input, the 3rd input and four-input terminal, four mems switch devices, are respectively the first mems switch device 81, the second mems switch device 82, the 3rd mems switch device 83 and the 4th mems switch device 84.

Can being connected with described first input end by movable plate electrode of described the first mems switch device 81, in the specific embodiment of the invention, conductive layer by can movable plate electrode is connected with described first input end, for input signal A, the second link of described the first mems switch device 81 is connected with described the second input, be used for inputting B signal, the 3rd link input logic low level of described the first mems switch device 81, input voltage VCC-in the specific embodiment of the invention, the value of voltage VCC-is determined according to actual conditions, the first link of described the first mems switch device 81 is connected with the second link of described the 3rd mems switch device 83, the first reference electrode of described the first mems switch device 81 is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

Can being connected with described the 3rd input by movable plate electrode of described the second mems switch device 82, in the specific embodiment of the invention, the conductive layer by can movable plate electrode is connected with described the 3rd input, for inputting C signal; The second link of described the second mems switch device 82 is connected with described four-input terminal, for inputting D signal; The 3rd link input logic low level of described the second mems switch device 82, input voltage VCC-in the specific embodiment of the invention, the value of voltage VCC-is determined according to actual conditions; The first link of described the second mems switch device 82 can be connected by movable plate electrode with described the 3rd mems switch device 83, in the specific embodiment of the invention, is connected with conductive layer that can movable plate electrode; The first reference electrode input tertiary voltage VCC1+ of described the second mems switch device 82, described the second reference electrode input the 4th voltage VCC1-, described the 4th voltage is less than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

The 3rd link input logic high level of described the 3rd mems switch device 83, input voltage VCC+ in the specific embodiment of the invention, the value of voltage VCC+ is determined according to actual conditions; The first link of described the 3rd mems switch device 83 can be connected by movable plate electrode with described the 4th mems switch device 84, in specific embodiments of the invention, is connected with conductive layer that can movable plate electrode; The first reference electrode input the 5th voltage VCC1-of described the 3rd mems switch device 83, described the second reference electrode input the 6th voltage VCC1+, described the 6th voltage is greater than the 5th voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

The second link input logic high level of described the 4th mems switch device 84, input voltage VCC+ in the specific embodiment of the invention, the value of voltage VCC+ is determined according to actual conditions; The 3rd link input logic low level of described the 4th mems switch device 84, input voltage VCC-in the specific embodiment of the invention, the value of voltage VCC-is determined according to actual conditions; The first link of described the 4th mems switch device 84 is connected with described output, for output signal output OUT; The first reference electrode input the 7th voltage VCC1-of described the 4th mems switch device, described the second reference electrode input the 8th voltage VCC1+, described the 8th voltage is greater than the 7th voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

According to the operation principle of mems switch device of the present invention, and according to above to door, or door, not gate, the analysis of the operation principle of NAND gate and NOR gate, those skilled in the art can derive the operation principle of four input AOIs of the first specific embodiment of the present invention, and this does not repeat.Four input AND OR NOT gate of the present invention truth table be:

A B C D OUT

0(VCC-) 0(VCC-) 0(VCC-) 0(VCC-) 1(VCC+)

0(VCC-) 0(VCC-) 0(VCC-) 1(VCC+) 1(VCC+)

0(VCC-) 0(VCC-) 1(VCC+) 0(VCC-) 1(VCC+)

0(VCC-) 0(VCC-) 1(VCC+) 1(VCC+) 0(VCC-)

0(VCC-) 1(VCC+) 0(VCC-) 0(VCC-) 1(VCC+)

0(VCC-) 1(VCC+) 0(VCC-) 1(VCC+) 1(VCC+)

0(VCC-) 1(VCC+) 1(VCC+) 0(VCC-) 1(VCC+)

0(VCC-) 1(VCC+) 1(VCC+) 1(VCC+) 0(VCC-)

1(VCC+) 0(VCC-) 0(VCC-) 0(VCC-) 1(VCC+)

1(VCC+) 0(VCC-) 0(VCC-) 1(VCC+) 1(VCC+)

1(VCC+) 0(VCC-) 1(VCC+) 0(VCC-) 1(VCC+)

1(VCC+) 0(VCC-) 1(VCC+) 1(VCC+) 0(VCC-)

1(VCC+) 1(VCC+) 0(VCC-) 0(VCC-) 0(VCC-)

1(VCC+) 1(VCC+) 0(VCC-) 1(VCC+) 0(VCC-)

1(VCC+) 1(VCC+) 1(VCC+) 0(VCC-) 0(VCC-)

1(VCC+) 1(VCC+) 1(VCC+) 1(VCC+) 0(VCC-)

According to the first specific embodiment of AND OR NOT gate of the present invention, if the first reference electrode of the first mems switch device 81 and the connected mode of the second reference electrode are exchanged, the second link of the first mems switch device 81 and the connected mode of the 3rd link are also exchanged accordingly.Be specially, the second link input logic low level of described the first mems switch device, the 3rd link of described the first mems switch device is connected with described the second input, and described second voltage is greater than described the first voltage.If the first reference electrode of the second mems switch device 82 and the connected mode of the second reference electrode are exchanged, the second link of the second mems switch device 82 and the connected mode of the 3rd link are also exchanged accordingly.Be specially: the second link input logic low level of the second mems switch device 82, the 3rd link of described the second mems switch device 82 is connected with described four-input terminal, and described the 4th voltage is greater than described tertiary voltage.If the first reference electrode of the 4th mems switch device 84 and the connected mode of the second reference electrode are exchanged, the second link of the 4th mems switch device 84 and the connected mode of the 3rd link are also exchanged accordingly.Be specially: the second link input logic low level of described the 4th mems switch device, the 3rd link input logic high level of described the 4th mems switch device, described the 8th voltage is less than described the 7th voltage.

Fig. 8 b is the circuit diagram of the second specific embodiment of four input AND OR NOT gate of the present invention, the difference of four input AND OR NOT gate of this second specific embodiment and the AND OR NOT gate of the first specific embodiment is: the first reference electrode of described the 3rd mems switch device 83 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the 3rd mems switch device 83 and the connected mode of the 3rd link are also exchanged.Be specially: the second link input logic high level of described the 3rd mems switch device 83, input voltage VCC+ in the specific embodiment of the invention, the value of voltage VCC+ is determined according to actual conditions, the 3rd link of described the 3rd mems switch device 83 is connected with the first link of described the first mems switch device 81, described the 6th voltage is less than described the 5th voltage, in this specific embodiment, the first reference electrode input the 5th voltage VCC1+ of described the 3rd mems switch device 83, described the second reference electrode input the 6th voltage VCC1-, described the 6th voltage is less than the 5th voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

According to the second specific embodiment of four input AND OR NOT gate of the present invention, if the first reference electrode of the first mems switch device 81 and the connected mode of the second reference electrode are exchanged, the second link of the first mems switch device 81 and the connected mode of the 3rd link are also exchanged accordingly.Be specially, the second link input logic low level of described the first mems switch device, the 3rd link of described the first mems switch device is connected with described the second input, and described second voltage is greater than described the first voltage.If the first reference electrode of the second mems switch device 82 and the connected mode of the second reference electrode are exchanged, the second link of the second mems switch device 82 and the connected mode of the 3rd link are also exchanged accordingly.Be specially: the second link input logic low level of the second mems switch device 82, the 3rd link of described the second mems switch device 82 is connected with described four-input terminal, and described the 4th voltage is greater than described tertiary voltage.If the first reference electrode of the 4th mems switch device 84 and the connected mode of the second reference electrode are exchanged, the second link of the 4th mems switch device 84 and the connected mode of the 3rd link are also exchanged accordingly.Be specially: the second link input logic low level of described the 4th mems switch device, the 3rd link input logic high level of described the 4th mems switch device, described the 8th voltage is less than described the 7th voltage.

Above-described four input AND OR NOT gate of the present invention, the first mems switch device and the second mems switch device can stackedly share the first reference electrode or the second reference electrode, that is to say that the first mems switch device and the second mems switch device can stackedly arrange, can save the quantity of reference electrode like this, specifically sharing the first reference electrode or the second reference electrode will make a concrete analysis of according to actual circuit.The second mems switch device and the 3rd mems switch device can stackedly share the first reference electrode or the second reference electrode, that is to say that the 3rd mems switch device and the 4th mems switch device can stackedly arrange, can save the quantity of reference electrode like this, specifically sharing the first reference electrode or the second reference electrode will make a concrete analysis of according to actual circuit.The 3rd mems switch device and the 4th mems switch device can stackedly share the first reference electrode or the second reference electrode, that is to say that the 3rd mems switch device and the 4th mems switch device can stackedly arrange, can save the quantity of reference electrode like this, specifically sharing the first reference electrode or the second reference electrode will make a concrete analysis of according to actual circuit.Also other between two mems switch share the first reference electrode or the second reference electrode.

Four mems switch devices can be stacked, save three reference electrodes, for example, stacked first reference electrode that shares of the first mems switch device and the second mems switch device, stacked second reference electrode that shares of the second mems switch device and the 3rd mems switch device, stacked first reference electrode that shares of the 3rd mems switch device and the 4th mems switch device.

Below some examples of only having listed mems switch device common reference electrode, those skilled in the art, according to its spirit, can derive the mode of other common reference electrode.

While the following describes gate of the present invention for same or door, same or door embodiment.In conjunction with specific embodiments and accompanying drawing describe in detail of the present invention with or the embodiment of door.

Fig. 9 a be of the present invention with or the circuit diagram of the first specific embodiment of door; Fig. 9 b be of the present invention with or the circuit diagram of the second specific embodiment of door; Fig. 9 c be of the present invention with or the circuit diagram of the 3rd specific embodiment of door; Fig. 9 d be of the present invention with or the circuit diagram of the 4th specific embodiment of door.

With reference to figure 9a, same or the door of the present invention's the first specific embodiment comprises: two input (not shown), be respectively first input end, the second input, two mems switch devices, are respectively the first mems switch device 91, the second mems switch device 92.

Can being connected with described first input end by movable plate electrode of described the first mems switch device 91, in the specific embodiment of the invention, conductive layer that can movable plate electrode is connected with described first input end, for input signal A, the second link input logic low level of described the first mems switch device 91, the 3rd link input logic high level of described the first mems switch device 91, in the specific embodiment of the invention, the second link input voltage VCC-, the 3rd link input voltage VCC+, the value of voltage VCC-and voltage VCC+ is determined according to actual conditions, wherein VCC+ is greater than VCC-, the first link of described the first mems switch device 91 is connected with the second link of described the second mems switch device 92, the first reference electrode of described the first mems switch device 91 is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

Can being connected with described the second input by movable plate electrode of described the second mems switch device 92, in the specific embodiment of the invention, conductive layer by can movable plate electrode is connected with described the second input, for input signal B, the 3rd link of described the second mems switch device 92 and can being connected by movable plate electrode of described the first mems switch device 91, in the specific embodiment of the invention, be connected with conductive layer that can movable plate electrode; The first link of described the second mems switch device 92 is connected with described output, for output signal output OUT; The first reference electrode input tertiary voltage VCC1-of described the second mems switch device 92, described the second reference electrode input the 4th voltage VCC1+, described the 4th voltage is greater than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

With reference to figure 9b, same or the door of the second specific embodiment of the present invention is with the difference of the same of the first specific embodiment or door: the first reference electrode of the first mems switch device 91 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the first mems switch device 91 and the connected mode of the 3rd link are also exchanged.Be specially: the second link input logic high level of described the first mems switch device 91, the 3rd link input logic low level of described the first mems switch device 91, the second link input voltage VCC+ in the specific embodiment of the invention, the 3rd link input voltage VCC-, the value of voltage VCC+ and voltage VCC-is determined according to actual conditions, as long as meet VCC+, is greater than VCC-; The first reference electrode of described the first mems switch device 91 is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

Same or the door of same or door and second specific embodiment of above-described the first specific embodiment is the same of the present invention's the first embodiment or door.Same or door below in conjunction with the same of the 3rd specific embodiment of the present invention or door and the 4th specific embodiment describes the same of the present invention's the second embodiment or door in detail.

With reference to figure 9c and Fig. 9 d, the same or door of the second embodiment is with the difference of the same of the first embodiment or door: the first link of the first mems switch device 91 is connected with the 3rd link of described the second mems switch device 92; The second link of the second mems switch device 92 can be connected by movable plate electrode with described the first mems switch device 91.Below in conjunction with Fig. 9 c and Fig. 9 d, describe the same of the present invention's the second embodiment or door in detail.

With reference to figure 9c, same or the door of the present invention's the 3rd specific embodiment comprises: two input (not shown), be respectively first input end, the second input, two mems switch devices, are respectively the first mems switch device 91, the second mems switch device 92.

Described the first mems switch device 91 can movable plate electrode conductive layer be connected with described first input end, for input signal A, the second link input logic low level of described the first mems switch device 91, the 3rd link input logic high level of described the first mems switch device 91, in the specific embodiment of the invention, the second link input voltage VCC-, the 3rd link input voltage VCC+, the value of voltage VCC-and voltage VCC+ is definite according to actual conditions, and VCC+ is greater than VCC-; The first link of described the first mems switch device 91 is connected with the 3rd link of described the second mems switch device 92; The first reference electrode of described the first mems switch device 91 is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

Described the second mems switch device 92 can movable plate electrode conductive layer be connected with described the second input, for input signal B, the second link of described the second mems switch device 92 and described the first mems switch device 91 can movable plate electrode conductive layer be connected, the first link of described the second mems switch device 92 is connected with described output, for output signal output OUT; The first reference electrode input tertiary voltage VCC1+ of described the second mems switch device 92, described the second reference electrode input the 4th voltage VCC1-, described the 4th voltage is less than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

With reference to figure 9d, the difference same or door of same or Men Yu tri-specific embodiments of the present invention's the 4th specific embodiment is: the first reference electrode of the first mems switch device 91 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the first mems switch device 91 and the connected mode of the 3rd link are also exchanged.Be specially: the second link input logic high level of described the first mems switch device 91, the 3rd link input logic low level of described the first mems switch device 91, in the specific embodiment of the invention, the second link input voltage VCC+, the 3rd link input voltage VCC-, the value of voltage VCC+ and voltage VCC-is definite according to actual conditions, and VCC+ is greater than VCC-; The first reference electrode of described the first mems switch device 91 is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

Operation principle about the same of above-described the first specific embodiment of the present invention, the second specific embodiment, the 3rd specific embodiment and the 4th specific embodiment or door, at this, do not repeat, those skilled in the art is according to the operation principle of mems switch device of the present invention, and according to above to door, or door, not gate, the analysis of the operation principle of NAND gate and NOR gate, can derive its operation principle.

The first mems switch device of the specific embodiment of the invention same or door and the second mems switch device can stacked and shared the first reference electrode or the second reference electrodes, that is to say that the first mems switch device and the second mems switch device can stackedly arrange, can save the quantity of reference electrode like this, specifically sharing the first reference electrode or the second reference electrode will make a concrete analysis of according to actual circuit.

Same or door of the present invention also can realize by a mems switch device, its prerequisite is: logic level above has had the logic NOT signal of B signal,

Fig. 9 e is the circuit diagram of the same of the present invention's the 5th specific embodiment or door; Fig. 9 f is the circuit diagram of the same of the present invention's the 6th specific embodiment or door.

With reference to figure 9e, the present invention's the 5th specific embodiment same or door comprise: two input (not shown), be respectively first input end, the second input, described with or door by a mems switch device, realize; Can being connected with described first input end by movable plate electrode of described mems switch device, in specific embodiments of the invention, conductive layer that can movable plate electrode is connected with described first input end, for input signal A, the second link of described mems switch device is connected with described the second input, for input signal B, the 3rd link input signal contrary with the signal logic of described the second input of described mems switch device, i.e. the logic NOT signal of input signal B non-signal refers in front stage circuits and occurs, and this grade just in time will be used the non-signal of original signal, and signal B becomes the logic NOT signal of original signal B via front stage circuits the first link of described mems switch device is connected with described output, for output signal output OUT; The first reference electrode of described mems switch device is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

With reference to figure 9f, the difference same or door of same or Men Yu five specific embodiments of the present invention's the 6th specific embodiment is: the first reference electrode of mems switch device and the connected mode of the second reference electrode are exchanged, and corresponding the second link of mems switch device and the connected mode of the 3rd link are also exchanged.Be specially: the second link input signal contrary with the signal logic of described the second input of described mems switch device, non-signal refers in front stage circuits and occurs, and this grade just in time will be used the non-signal of original signal, and signal B becomes the logic NOT signal of original signal B via front stage circuits the 3rd link of described mems switch device is connected with described the second input, for input signal B; In this specific embodiment, the first reference electrode is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

About the same of the 5th specific embodiment or door and the 6th specific embodiment same or operation principle, at this, do not repeat, those skilled in the art is according to the operation principle of mems switch device of the present invention, and according to above to door, or door, not gate, the analysis of the operation principle of NAND gate and NOR gate, can derive its operation principle.

The truth table same or door of the same or door of above-described the first specific embodiment of the present invention, the same or door of the second specific embodiment, the same or door of the 3rd specific embodiment, the same or door of the same or door of the 4th specific embodiment, the 5th specific embodiment, the 6th specific embodiment is:

A B OUT

0(VCC-) 0(VCC-) 1(VCC+)

0(VCC-) 1(VCC+) 0(VCC-)

1(VCC+) 0(VCC-) 0(VCC-)

1(VCC+) 1(VCC+) 1(VCC+)

When the following describes gate of the present invention and being XOR gate, XOR gate embodiment.In conjunction with specific embodiments and accompanying drawing describe the embodiment of XOR gate of the present invention in detail.

Figure 10 a is the circuit diagram of the first specific embodiment of XOR gate of the present invention; Figure 10 b is the circuit diagram of the second specific embodiment of XOR gate of the present invention; Figure 10 c is the circuit diagram of the 3rd specific embodiment of XOR gate of the present invention; Figure 10 d is the circuit diagram of the 4th specific embodiment of XOR gate of the present invention.

With reference to figure 10a, the XOR gate of the present invention's the first specific embodiment comprises: two input (not shown), be respectively first input end, the second input, two mems switch devices, are respectively the first mems switch device 101, the second mems switch device 102.

Can being connected with described first input end by movable plate electrode of described the first mems switch device 101, in the specific embodiment of the invention, conductive layer that can movable plate electrode is connected with described first input end, for input signal A, the second link input logic low level of described the first mems switch device 101, the 3rd link input logic high level of described the first mems switch device 101, in the specific embodiment of the invention, the second link input voltage VCC-of the first mems switch device 101, the 3rd link input voltage VCC+, the value of voltage VCC+ and voltage VCC-is determined according to actual conditions, wherein, VCC+ is greater than VCC-, the first link of described the first mems switch device 101 is connected with the second link of described the second mems switch device 102, the first reference electrode of described the first mems switch device 101 is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

Can being connected with described the second input by movable plate electrode of described the second mems switch device 102, in the specific embodiment of the invention, conductive layer that can movable plate electrode is connected with described the second input, for input signal B, the 3rd link of described the second mems switch device 102 and can being connected by movable plate electrode of described the first mems switch device 101, in the specific embodiment of the invention, the 3rd link of the second mems switch device 102 and described the first mems switch device 101 can movable plate electrode conductive layer be connected; The first link of described the second mems switch device 102 is connected with described output, for output signal output OUT; The first reference electrode input tertiary voltage VCC1+ of described the second mems switch device 102, described the second reference electrode input the 4th voltage VCC1-, described the 4th voltage is less than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

With reference to figure 10b, the difference of the XOR gate of the XOR gate of the second specific embodiment of the present invention and the first specific embodiment is: the first reference electrode of the first mems switch device 101 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the first mems switch device 101 and the connected mode of the 3rd link are also exchanged.Be specially: the second link input logic high level of described the first mems switch device 101, the 3rd link input logic low level of described the first mems switch device 101, in the specific embodiment of the invention, the second link input voltage VCC+ of the first mems switch device 101, the 3rd link input voltage VCC-, the value of voltage VCC+ and voltage VCC-is definite according to actual conditions, and wherein, VCC+ is greater than VCC-; Described the first reference electrode is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

The XOR gate of the XOR gate of above-described the first specific embodiment and the second specific embodiment is the XOR gate of the present invention's the first embodiment.XOR gate below in conjunction with the XOR gate of the 3rd specific embodiment of the present invention and the XOR gate of the 4th specific embodiment detailed description the present invention the second embodiment.

With reference to figure 10c and Figure 10 d, the XOR gate of the second embodiment is with the difference of the XOR gate of the first embodiment: the first link of the first mems switch device 101 is connected with the 3rd link of described the second mems switch device 102; The second link of the second mems switch device 102 and described the first mems switch device 101 can movable plate electrode conductive layer be connected.XOR gate below in conjunction with Figure 10 c and Figure 10 d detailed description the present invention the second embodiment.

With reference to figure 10c, the XOR gate of the present invention's the 3rd specific embodiment comprises: two input (not shown), be respectively first input end, the second input, two mems switch devices, are respectively the first mems switch device 101, the second mems switch device 102.

Described the first mems switch device 101 can movable plate electrode conductive layer be connected with described first input end, for input signal A, the second link input logic low level of described the first mems switch device 101, the 3rd link input logic high level of described the first mems switch device 101, in the specific embodiment of the invention, the second link input voltage VCC-of the first mems switch device 101, the 3rd link input voltage VCC+, the value of voltage VCC+ and voltage VCC-is determined according to actual conditions, wherein, VCC+ is greater than VCC-; The first link of described the first mems switch device 101 is connected with the 3rd link of described the second mems switch device 102; The first reference electrode of described the first mems switch device 101 is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

Described the second mems switch device 102 can movable plate electrode conductive layer be connected with described the second input, for input signal B, the second link of described the second mems switch device 102 and described the first mems switch device 101 can movable plate electrode conductive layer be connected, the first link of described the second mems switch device 102 is connected with described output, for output signal output OUT; The first reference electrode input tertiary voltage VCC1-of described the second mems switch device 102, described the second reference electrode input the 4th voltage VCC1+, described the 4th voltage is greater than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

With reference to figure 10d, the difference of the XOR gate of the present invention's the 4th specific embodiment and the XOR gate of the 3rd specific embodiment is: the first reference electrode of the first mems switch device 101 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the first mems switch device 101 and the connected mode of the 3rd link are also exchanged.Be specially: the second link input logic high level of described the first mems switch device 101, the 3rd link input logic low level of described the first mems switch device 101, in the specific embodiment of the invention, the second link input voltage VCC+ of the first mems switch device 101, the 3rd link input voltage VCC-, the value of voltage VCC+ and voltage VCC-is definite according to actual conditions, and wherein, VCC+ is greater than VCC-; Described the first reference electrode is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

Operation principle about the XOR gate of above-described the first specific embodiment of the present invention, the second specific embodiment, the 3rd specific embodiment and the 4th specific embodiment, at this, do not repeat, those skilled in the art is according to the operation principle of mems switch device of the present invention, and according to above to door, or door, not gate, the analysis of the operation principle of NAND gate and NOR gate, can derive its operation principle.

The first mems switch device of the XOR gate of the specific embodiment of the invention and the second mems switch device can stacked and shared the first reference electrode or the second reference electrodes, that is to say that the first mems switch device and the second mems switch device can stackedly arrange, can save the quantity of reference electrode like this, specifically sharing the first reference electrode or the second reference electrode will make a concrete analysis of according to actual circuit.

XOR gate of the present invention also can realize by a mems switch device, its prerequisite is: logic level above has had the logic NOT signal of B signal,

Figure 10 e is the circuit diagram of the XOR gate of the present invention's the 5th specific embodiment; Figure 10 f is the circuit diagram of the XOR gate of the present invention's the 6th specific embodiment.The third embodiment that the 5th specific embodiment and the 6th specific embodiment are XOR gate.

With reference to figure 10e, the XOR gate of the present invention's the 5th specific embodiment comprises: two input (not shown), be respectively first input end, the second input, and described XOR gate realizes by a mems switch device; Can being connected with described first input end by movable plate electrode of described mems switch device, in instantiation of the present invention, conductive layer that can movable plate electrode is connected with described first input end, for input signal A, the 3rd link of described mems switch device is connected with described the second input, for input signal B, the second link input signal contrary with the signal logic of described the second input of described mems switch device, i.e. the logic NOT signal of input signal B non-signal refers in front stage circuits and occurs, and this grade just in time will be used the non-signal of original signal, and signal B becomes the logic NOT signal of original signal B via front stage circuits the first link of described mems switch device is connected with described output, for output signal output OUT; The first reference electrode of described mems switch device is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

With reference to figure 10f, the difference of the XOR gate of the present invention's the 6th specific embodiment and the XOR gate of the 5th specific embodiment is: the first reference electrode of mems switch device and the connected mode of the second reference electrode are exchanged, and corresponding the second link of mems switch device and the connected mode of the 3rd link are also exchanged.Be specially: the second link of described mems switch device is connected with described the second input, for input signal B; The 3rd link input signal contrary with the signal logic of described the second input of described mems switch device, i.e. the logic NOT signal of signal B described the first reference electrode is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

Operation principle about the XOR gate of the 5th specific embodiment and the XOR gate of the 6th specific embodiment, at this, do not repeat, those skilled in the art is according to the operation principle of mems switch device of the present invention, and according to above to door, or door, not gate, the analysis of the operation principle of NAND gate and NOR gate, can derive its operation principle.

The truth table of the XOR gate of the XOR gate of the XOR gate of the XOR gate of the XOR gate of the XOR gate of above-described the first specific embodiment of the present invention, the second specific embodiment, the 3rd specific embodiment, the 4th specific embodiment, the 5th specific embodiment, the 6th specific embodiment is:

A B OUT

0(VCC-) 0(VCC-) 0(VCC-)

0(VCC-) 1(VCC+) 1(VCC+)

1(VCC+) 0(VCC-) 1(VCC+)

1(VCC+) 1(VCC+) 0(VCC-)

When the following describes gate and being MUX, the embodiment of MUX, describes the embodiment of MUX of the present invention in detail below in conjunction with accompanying drawing and specific embodiment.

Figure 11 a is the circuit diagram of alternative selector of the present invention, and Figure 11 b is the circuit diagram that the present invention four selects a selector.In conjunction with reference to figure 11a～Figure 11 b, the MUX of the specific embodiment of the invention, described multichannel is 2 ⁿroad, n is natural number, that is to say, alternative selector if, n is 1, four selects a selector if, n is 2, the like.Described input is 2 ⁿ+ n.Described MUX is divided into n level, and being respectively the 1st grade increases by 1 successively until increase to n level, and the mems switch device number comprising successively from described the 1st grade of every one-level of successively to the n level is 2 ⁰successively to 2 ^n-1, that is to say, MUX is divided into n level according to n value, and the number of the mems switch device that every one-level comprises is 2 ^mindividual, wherein m deducts 1 for level is inferior; For instance, 16 select a selector if, n 4, ten six selects a selector to be divided into 4 grades, and the 1st grade comprises one (2 ⁰) mems switch device, the 2nd grade comprises two (2 ¹) mems switch device, 3rd level comprises four (2 ²) mems switch device, the 4th grade comprises eight (2 ³) mems switch device.

The first link of the mems switch device in the 1st grade is connected with described output, for exporting selecteed signal; At n, be greater than at 1 o'clock, in the mems switch device of adjacent two-stage, the second link of the mems switch device of upper level and the 3rd link are connected with the first link of the mems switch device of next stage respectively; Can being connected with one of them input respectively by movable plate electrode of every one-level mems switch device, in the specific embodiment of the invention, every one-level mems switch device can movable plate electrode conductive layer be connected with one of them input respectively, input control signal, and, with the mems switch device of one-level, can input identical control signal by movable plate electrode; In n level, the second link of each mems switch device is connected with one of them input respectively with the 3rd link, input select signal.

MUX below in conjunction with specific embodiment and the accompanying drawing detailed description specific embodiment of the invention.

With reference to figure 11a, be the circuit diagram of alternative selector, in this specific embodiment, described n is 1, and input is three, is respectively first input end, the second input and the 3rd input (not shown); The number of mems switch device is also one, and the progression of alternative selector is 1 grade.

Can being connected with first input end by movable plate electrode of described mems switch device, in the specific embodiment of the invention, conductive layer that can movable plate electrode is connected with first input end, for input control signal S, the second link of described mems switch device is connected with the second input, the 3rd input respectively with the 3rd link, input select signal, be specially, the second link input select signal A, the 3rd link input select signal B, the first link of described mems switch device is connected with described output, and the output signal OUT of output is selecteed signal.In the specific embodiment shown in Figure 11 a, the first reference electrode is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

The choice relation of the alternative selector shown in Figure 11 a is: when control signal S is 0, can movable plate electrode to the direction of the first reference electrode, move, the first link and the 3rd link electrically conduct by conductive contact end, output signal OUT is signal B, and this signal B exports as selecteed signal.When control signal S is 1, can movable plate electrode to the direction of the second reference electrode, move, the first link and the second link electrically conduct by conductive contact end, and output signal OUT is signal A, and this signal A exports as selecteed signal.

It should be noted that, if the connected mode of the first reference electrode and the second reference electrode changes, the selection mode of selector changes.For example, when the first reference electrode meets VCC1-, when the second reference electrode meets VCC1+, VCC1+ is greater than VCC1-, the signal OUT of output is contrary, that is, when S is 0, output signal OUT is signal A, when S is 1, output signal OUT is signal B, and this signal B exports as selecteed signal.

Figure 11 b is the circuit diagram that four of the specific embodiment of the invention is selected a selector, with reference to figure 11b, in this specific embodiment, described n is 2, input is six, is respectively first input end, the second input, the 3rd input, four-input terminal, the 5th input and the 6th input; The number of mems switch device is three, four to select the progression of a selector be 2 grades, and the 1st grade comprises a mems switch device, is the first mems switch device 111, the 2nd grade comprises two mems switch devices, respectively the second mems switch device 112 and the 3rd mems switch device 113.

The first link of the first mems switch device 111 in the 1st grade is connected with described output, be used for exporting selecteed signal, the first link of the first mems switch device 111 is connected with described output, output signal OUT, this output signal OUT is selecteed signal, for signal A, signal B, signal C, signal D one of them.The second link of the first mems switch device 111 of the 1st grade is connected with the 3rd mems switch device 113 of the 2nd grade, the first link of the second mems switch device 112 respectively with the 3rd link; In diagram specific embodiment, the second link of the first mems switch device 111 is connected with the first link of the 3rd mems switch device 113, and the 3rd link of the first mems switch device 111 is connected with the first link of the second mems switch device 112; In other embodiments, also can be connected with the first link of the 3rd mems switch device 113 for the 3rd link of the first mems switch device 111, the second link of the first mems switch device 111 is connected with the first link of the second mems switch device 112.

Can being connected with first input end by movable plate electrode of the first mems switch device of the 1st grade, in the specific embodiment of the invention, conductive layer by can movable plate electrode is connected with first input end, input the first control signal, the first mems switch device 111 can movable plate electrode conductive layer be connected with first input end, input the first control signal S1; Can being connected with the second input by movable plate electrode of the second mems switch device 112 of the 2nd grade and the 3rd mems switch device 113, input the second control signal S2, in the specific embodiment of the invention, by the second mems switch device 112 and the 3rd mems switch device 113 can movable plate electrode conductive layer be connected with the second input, input the second control signal, the second mems switch device 112 can movable plate electrode conductive layer, the 3rd mems switch device 113 can movable plate electrode conductive layer be connected with the second input, input the second control signal S2.

In the 2nd grade, the second link of the second mems switch device is connected with the 3rd input, four-input terminal respectively with the 3rd link, the second link of the 3rd mems switch device is connected with the 5th input, the 6th input respectively with the 3rd link, input select signal.In the specific embodiment shown in Figure 11 b, the second link input select signal A of the second mems switch device 112, the 3rd link input select signal B of the second mems switch device 112, the second link input select signal C of the 3rd mems switch device 113, the 3rd link input select signal D of the 3rd mems switch device 113.

In specific embodiments of the invention, the first reference electrode of the first mems switch device 111 is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-; In other embodiments, also can be second voltage and be greater than the first voltage; The first concrete voltage and the relation of second voltage can be according to selecting the actual conditions of the selection signal of circuit to determine.

The first reference electrode input tertiary voltage VCC1+ of the second mems switch device 112, described the second reference electrode input the 4th voltage VCC1-, described the 4th voltage is less than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-; In other embodiments, also can be the 4th voltage and be greater than tertiary voltage; The relation of concrete tertiary voltage and the 4th voltage can be according to selecting the actual conditions of the selection signal of circuit to determine.

The first reference electrode input the 5th voltage VCC1+ of the 3rd mems switch device 113, described the second reference electrode input the 6th voltage VCC1-, described the 6th voltage is less than the 5th voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-; In other embodiments, also can be the 6th voltage and be greater than the 5th voltage; The 5th concrete voltage and the relation of the 6th voltage can be according to selecting the actual conditions of the selection signal of circuit to determine.

About this, four select the concrete principle of a selector not explain, those skilled in the art are according to the explanation of the principle of the principle of mems switch device of the present invention and above alternative selector, can know four operation principles of selecting a selector by inference.Four select the option table of a selector to be:

S1 S2 OUT

0 0 B

0 1 A

1 0 D

1 1 C

The alternative selector and four of take above selects a selector MUX to be illustrated as example, and those skilled in the art, according to above disclosed content, can unquestionablely know the circuit of other MUX by inference, at this, do not do explanation one by one.

MUX has many application, and wherein very typical application aspect, for being applied to look-up table, selects a selector to be applied to the application in look-up table of look-up table explanation MUX with 16 below.

Look-up table (look-up-table is called for short LUT), its essence is exactly a RAM (random accessmemory, random asccess memory), and its operation principle is that each LUT is regarded as to a RAM who has 4 bit address lines.Data write after RAM in advance, and like this, signal of every input carries out logical operation and just equals to input an address and table look-up, and finds out content corresponding to address, then output.

At this, to 16, do not select the concrete connected mode of a selector to introduce, those skilled in the art is according to the selector of above embodiment, can unquestionablely know 16 circuit connecting modes that select a selector by inference.It should be noted that, Figure 11 c is the schematic symbol diagram of the selector that represents of a mems switch device, and A1, B1 represent respectively the second link and the 3rd link, and S represents can movable plate electrode, and OUT represents output.

Figure 11 d is that 16 of the specific embodiment of the invention selects a selector to be applied to the schematic diagram of look-up table, and four inputs, for input control signal S1, S2, S3 and S4.According to the value of control signal S1, S2, S3 and S4, utilize 16 to select a selector 110, can in the content of storage, find corresponding address, and corresponding address content is exported via output OUT.The look-up table here is only lifted 4-lut look-up table, also has 6-lut look-up table etc.

MUX of the present invention, two adjacent mems switch devices also can stackedly share the first reference electrode or the second reference electrode, be that two adjacent mems switch devices can be stacked, share the first reference electrode or the second reference electrode, save electrode number, and can saving chip area, specifically share the first reference electrode or the second reference electrode definite according to side circuit.

When the following describes gate and being triple gate, the embodiment of triple gate, describes the embodiment of triple gate of the present invention in detail below in conjunction with accompanying drawing and specific embodiment.

Figure 12 a is the circuit diagram of the triple gate of the present invention's the first specific embodiment, Figure 12 b is the circuit diagram of the triple gate of the present invention's the second specific embodiment, in conjunction with reference to figure 12a and Figure 12 b, the triple gate of the specific embodiment of the invention comprises two input (not shown), be respectively first input end and the second input, first input end is as Enable Pin, a mems switch device.Can being connected with described first input end by movable plate electrode of described mems switch device, in the specific embodiment of the invention, conductive layer that can movable plate electrode is connected with described first input end, the second link of described mems switch device is connected with described the second input, the 3rd link of described mems switch device is high resistant, high resistant can be the materials such as polysilicon, and the first link of described mems switch device is connected with described output; Or the second link of described mems switch device is high resistant, the 3rd link of described mems switch device is connected with described the second input.

With reference to figure 12a, the triple gate of the present invention's the first specific embodiment, mems switch device can movable plate electrode conductive layer be connected with described first input end, for input signal A, the second link of described mems switch device is connected with described the second input, and for input signal B, the 3rd link of described mems switch device is high resistant, the first link of described mems switch device is connected with described output, output signal output OUT.The first reference electrode of described mems switch device is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.In other embodiments, the first voltage also can be less than second voltage.

When signal A is 1, the first link and the second link electrically conduct, and the signal OUT of output is signal B.When A is 0, the first link and the 3rd link electrically conduct, and the signal OUT of output is high resistant.

In this first specific embodiment, if the connected mode of the first reference electrode and the second reference electrode is exchanged,, when signal A is 1, the first link and the 3rd link conduct, and the signal OUT of output is high resistant.When A is 0, the first link and the second link conduct, and the signal OUT of output is signal B.

Triple gate based on the specific embodiment of the invention, triple gate of the present invention, also has other embodiment, for example, shown in Figure 12 b, the second link of described mems switch device is high resistant, and the 3rd link of described mems switch device is connected with described the second input.The first reference electrode meets VCC1-, and the second reference electrode meets VCC1+, and VCC1+ is greater than VCC1-.

When the following describes gate and being trigger, the embodiment of trigger, describes the embodiment of trigger of the present invention in detail below in conjunction with accompanying drawing and specific embodiment.

Figure 13 a is the circuit diagram of the trigger of the present invention's the first specific embodiment, Figure 13 b is the circuit diagram of the trigger of the present invention's the second specific embodiment, Figure 13 c is the circuit diagram of the trigger of the present invention's the 3rd specific embodiment, Figure 13 d is the circuit diagram of the trigger of the present invention's the 4th specific embodiment, with reference to the trigger of figure 13a～Figure 13 d explanation specific embodiment of the invention.

With reference to figure 13a, the trigger of the present invention's the first specific embodiment comprises: first input end, and the second input, two mems switch devices, are respectively the first mems switch device 131 and the second mems switch device 132.

Described the first mems switch device 131 can connect first input end by movable plate electrode, for input clock signal CLK, in the specific embodiment of the invention, by conductive layer input clock signal CLK that can movable plate electrode, the second link of described the first mems switch device 131 is connected with described the second input, input signal D, the 3rd link of described the first mems switch device 131 is high resistant, the first link of described the first mems switch device 131 and described the second mems switch device 132 can movable plate electrode conductive layer be connected, the first reference electrode of described the first mems switch device 131 is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device 131, described second voltage is less than described the first voltage, in this specific embodiment, the first reference electrode of the first mems switch device 131 is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

The second link input logic high level of described the second mems switch device 132, the 3rd link input logic low level of described the second mems switch device 132, in this specific embodiment of the present invention, the second link input voltage VCC+ of the second mems switch device 132, the 3rd link input voltage VCC-, the value of voltage VCC+ and voltage VCC-is determined according to actual conditions, as long as meet VCC+, is greater than VCC-; The first link of described the second mems switch device is connected with described output (not shown), output signal OUT; The first reference electrode input tertiary voltage VCC1+ of described the second mems switch device 132, described the second reference electrode input the 4th voltage VCC1-, described the 4th voltage is less than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

When clock signal clk is high trigger signal, by the second input input signal D, within a clock cycle, if signal D is 1, output signal OUT is 1, if signal D is 0, output signal OUT is 0.

With reference to figure 13b, the difference of the trigger of the present invention's the second specific embodiment and the trigger of the first specific embodiment is: the first reference electrode of the second mems switch device 132 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the second mems switch device 132 and the connected mode of the 3rd link are also exchanged.Be specially: the second link input logic low level of described the second mems switch device 132, the 3rd link input logic high level of described the second mems switch device 132, in this specific embodiment of the present invention, the second link input voltage VCC-of the second mems switch device 132, the 3rd link input voltage VCC+, the value of voltage VCC+ and voltage VCC-is definite according to actual conditions, and VCC+ is greater than VCC-; The first reference electrode input tertiary voltage VCC1-of described the second mems switch device 132, described the second reference electrode input the 4th voltage VCC1+, described the 4th voltage is greater than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

The realization of the trigger of this second specific embodiment is identical with realizing of the first concrete trigger of implementing, and this does not repeat.

With reference to figure 13c, the difference of the trigger of the present invention's the 3rd specific embodiment and the trigger of the first specific embodiment is: the first reference electrode of the first mems switch device 131 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the first mems switch device 131 and the connected mode of the 3rd link are also exchanged.Be specially: the second link of described the first mems switch device 131 is high resistant, the 3rd link of described the first mems switch device 131 is connected with described the second input, input signal D, the first reference electrode of described the first mems switch device 131 is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

The realization of the trigger of the 3rd specific embodiment is identical with realizing of the first concrete trigger of implementing, and this does not repeat.

With reference to figure 13d, the difference of the trigger of the present invention's the 4th specific embodiment and the trigger of the first specific embodiment is: the first reference electrode of the first mems switch device 131 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the first mems switch device 131 and the connected mode of the 3rd link are also exchanged.The first reference electrode of the second mems switch device 132 and the connected mode of the second reference electrode are exchanged, and the second link of corresponding the second mems switch device 132 and the connected mode of the 3rd link are also exchanged.

Be specially: the second link of described the first mems switch device 131 is high resistant, the 3rd link of described the first mems switch device 131 is connected with described the second input, input signal D, the first reference electrode of described the first mems switch device 131 is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.The second link input logic low level of described the second mems switch device 132, the 3rd link input logic high level of described the second mems switch device 132, in this specific embodiment of the present invention, the second link input voltage VCC-of the second mems switch device 132, the 3rd link input voltage VCC+, the value of voltage VCC+ and voltage VCC-is definite according to actual conditions, and VCC+ is greater than VCC-; The first reference electrode input tertiary voltage VCC1-of described the second mems switch device 132, described the second reference electrode input the 4th voltage VCC1+, described the 4th voltage is greater than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.

The realization of the trigger of the 4th specific embodiment is identical with realizing of the first concrete trigger of implementing, and this does not repeat.

In addition, the specific embodiment of above-described trigger of the present invention, is all to using high level clock signal as triggering signal.Except the trigger of above-described specific embodiments of the invention, also can using low level clock signal as triggering signal, when clock signal clk is low level, output signal OUT is signal D, those skilled in the art are according to the operation principle of mems switch device of the present invention, and the principle of the trigger of above-described specific embodiment, can know by inference and using the circuit of low level clock signal as the trigger of triggering signal.

Circuit diagram with reference to the trigger that high level clock is triggered, for first mems switch device, the first reference electrode and the second reference electrode voltage input voltage size of the trigger that the trigger comparison low level clock triggering with high level clock triggers will be exchanged.Be specially:

Described input is two, is respectively first input end and the second input; Described mems switch device is two, is respectively the first mems switch device and the second mems switch device; Can being connected with described first input end by movable plate electrode of described the first mems switch device, for input clock signal, the second link of described the first mems switch device is connected with described the second input, the 3rd link of described the first mems switch device is high resistant, and the first link of described the first mems switch device can be connected by movable plate electrode with described the second mems switch device; The first reference electrode of described the first mems switch device is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device, and described second voltage is greater than described the first voltage; Or the second link of described the first mems switch device is high resistant, the 3rd link of described the first mems switch device is connected with described the second input, and described second voltage is less than described the first voltage;

The second link input logic high level of described the second mems switch device, the 3rd link input logic low level of described the second mems switch device, the first link of described the second mems switch device is connected with described output; The first reference electrode input tertiary voltage of described the second mems switch device, the second reference electrode input the 4th voltage of described the second mems switch device, described the 4th voltage is less than described tertiary voltage; Or, the second link input logic low level of described the second mems switch device, the 3rd link input logic high level of described the second mems switch device, described the 4th voltage is greater than described tertiary voltage.

The first mems switch device of the trigger of the specific embodiment of the invention and the second mems switch device can stacked and shared the first reference electrode or the second reference electrodes, that is to say that the first mems switch device and the second mems switch device can stackedly arrange, can save the quantity of reference electrode like this, and, can saving chip area, specifically sharing the first reference electrode or the second reference electrode will make a concrete analysis of according to actual circuit.

The present invention also provides the edge triggered flip flop in gate; Figure 14 a is the circuit diagram of the edge triggered flip flop of the present invention's the first specific embodiment, the edge triggered flip flop of the first specific embodiment is trailing edge edge-triggered device, with reference to figure 14a, and edge triggered flip flop of the present invention, described input is two, is respectively first input end and the second input; First input end input clock signal CLK, the second input input signal D.

Described mems switch device is four, is respectively the first mems switch device 141, the second mems switch device 142, the 3rd mems switch device 143 and the 4th mems switch device 144.

Described the first mems switch device 141 can movable plate electrode, can being connected with described first input end by movable plate electrode of the second mems switch device 142, for input clock signal CLK, in the specific embodiment of the invention, by the first mems switch device 141 can movable plate electrode conductive layer, the second mems switch device 142 can movable plate electrode to conductive layer, be connected with described first input end; The second link of described the first mems switch device 141 is connected with described the second input, input signal D, and the 3rd link of described the first mems switch device 141 is high resistant, high resistant can be the materials such as polysilicon; The first reference electrode of described the first mems switch device 141 is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than described the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.Or in other embodiments, the second link of described the first mems switch device is high resistant, the 3rd link of described the first mems switch device is connected with described the second input, and described second voltage is greater than described the first voltage.

The second link input logic high level of described the second mems switch device 142, the 3rd link input logic low level of described the second mems switch device, in this specific embodiment of the present invention, the second link input voltage VCC+ of the second mems switch device 142, the 3rd link input voltage VCC-, the value of voltage VCC+ and voltage VCC-is determined according to actual conditions, as long as meet VCC+, is greater than VCC-; The first link of described the second mems switch device 142 can be connected by movable plate electrode with described the 3rd mems switch device 143, in the specific embodiment of the invention, with the 3rd mems switch device 143 can movable plate electrode conductive layer be connected; The first reference electrode input tertiary voltage of described the second mems switch device 142, the second reference electrode input the 4th voltage of described the second mems switch device 142, described the 4th voltage is greater than described tertiary voltage; In the specific embodiment of the invention, the first reference electrode input tertiary voltage VCC1-of described the second mems switch device 142, described the second reference electrode input the 4th voltage VCC1+, described the 4th voltage is greater than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.Or, in other embodiments, the second link input logic low level of described the second mems switch device, the 3rd link input logic high level of described the second mems switch device, described the 4th voltage is less than described tertiary voltage.

The second link of described the 3rd mems switch device 143 is connected with the first link of described the first mems switch device 141, the 3rd link of described the 3rd mems switch device 143 is high resistant, high resistant can be the materials such as polysilicon, the first link of described the 3rd mems switch device 143 can be connected by movable plate electrode with described the 4th mems switch device 144, in the specific embodiment of the invention, with described the 4th mems switch device 144 can movable plate electrode conductive layer be connected; The first reference electrode input the 5th voltage VCC1+ of described the 3rd mems switch device 143, the second reference electrode input the 6th voltage VCC1-of described the 3rd mems switch device, described the 6th voltage is less than described the 5th voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.Or the second link of described the 3rd mems switch device is high resistant, the 3rd link of described the 3rd mems switch device is connected with the first link of described the first mems switch device, and described the 6th voltage is greater than described the 5th voltage.

The second link input logic high level of described the 4th mems switch device, the 3rd link input logic low level of described the 4th mems switch device, in this specific embodiment of the present invention, the second link input voltage VCC+ of the 4th mems switch device 144, the 3rd link input voltage VCC-, the value of voltage VCC+ and voltage VCC-is determined according to actual conditions, as long as meet VCC+, is greater than VCC-; The first link of described the 4th mems switch device is connected with described output, output signal OUT; The first reference electrode input the 7th voltage VCC1+ of described the 4th mems switch device, the second reference electrode input the 8th voltage VCC1-of described the 4th mems switch device, described the 8th voltage is less than described the 7th voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.Or, in other embodiments, the second link input logic low level of described the 4th mems switch device, the 3rd link input logic high level of described the 4th mems switch device, described the 8th voltage is greater than described the 7th voltage.

Edge triggered flip flop operation principle of the present invention: edge triggered flip flop of the present invention is host-guest architecture, the master flip-flop part that the first mems switch device 141 is this edge triggered flip flop, the second mems switch device 142, the 3rd mems switch device 143 and the 4th mems switch device 144 are slave flipflop part.Its work is also divided into two stages.

This edge triggered flip flop of the present invention is trailing edge trigger, when clock signal clk is 1, master flip-flop part the first mems switch device 141 input signal D, at this moment the 3rd mems switch device 143 of slave flipflop part is input as 0 via the second mems switch device 142, the 3rd mems switch device 143 can input at 0 o'clock by movable plate electrode, the 3rd mems switch device 143 of slave flipflop part is blocked, the input of the 3rd mems switch device 143 is signal D, output is high resistant, and the first link of the 4th mems switch device does not have output signal.

When clock signal clk is by 1 change 0, be that CLK is 0 o'clock, the first mems switch device 141 of master flip-flop part is blocked, the output end signal D of the first mems switch device 141 keeps, the signal D that the 3rd mems switch device 143 output the first mems switch devices 141 of slave flipflop part keep, the output signal OUT of the first link of the 4th mems switch device 144 is D.

Figure 14 b is the circuit diagram of the second specific embodiment of edge triggered flip flop of the present invention, knot is with reference to figure 14b and Figure 14 a, the difference of the trigger of the trigger of the second specific embodiment of the present invention and the first specific embodiment is, the edge triggered flip flop of the second specific embodiment is rising edge trigger, the first reference electrode of the first mems switch device 151 and the voltage relationship between the second reference electrode are contrary with the voltage relationship between the second reference electrode with the first reference electrode of the first mems switch device 141, the first reference electrode of the 3rd mems switch device 153 and the voltage relationship between the second reference electrode are contrary with the voltage relationship between the second reference electrode with the first reference electrode of the 3rd mems switch device 143.

With reference to figure 14b, the edge triggered flip flop of the second embodiment of the present invention, described input is two, is respectively first input end and the second input; First input end input clock signal CLK, the second input input signal D.

Described mems switch device is four, is respectively the first mems switch device 151, the second mems switch device 152, the 3rd mems switch device 153 and the 4th mems switch device 154.

Described the first mems switch device 151 can movable plate electrode, can being connected with described first input end by movable plate electrode of the second mems switch device 152, for input clock signal CLK, in the specific embodiment of the invention, by the first mems switch device 151 can movable plate electrode conductive layer, the second mems switch device 152 can movable plate electrode to conductive layer, be connected with described first input end; The second link of described the first mems switch device 151 is connected with described the second input, input signal D, and the 3rd link of described the first mems switch device 151 is high resistant, high resistant can be the materials such as polysilicon; The first reference electrode of described the first mems switch device 151 is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than described the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.Or in other embodiments, the second link of described the first mems switch device is high resistant, the 3rd link of described the first mems switch device is connected with described the second input, and described second voltage is less than described the first voltage.

The second link input logic high level of described the second mems switch device 152, the 3rd link input logic low level of described the second mems switch device, in this specific embodiment of the present invention, the second link input voltage VCC+ of the second mems switch device 152, the 3rd link input voltage VCC-, the value of voltage VCC+ and voltage VCC-is determined according to actual conditions, as long as meet VCC+, is greater than VCC-; The first link of described the second mems switch device 152 can be connected by movable plate electrode with described the 3rd mems switch device 153, in the specific embodiment of the invention, with the 3rd mems switch device 153 can movable plate electrode conductive layer be connected; The first reference electrode input tertiary voltage of described the second mems switch device 152, the second reference electrode input the 4th voltage of described the second mems switch device 152, described the 4th voltage is greater than described tertiary voltage; In the specific embodiment of the invention, the first reference electrode input tertiary voltage VCC1-of described the second mems switch device 152, described the second reference electrode input the 4th voltage VCC1+, described the 4th voltage is greater than tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.Or, in other embodiments, the second link input logic low level of described the second mems switch device, the 3rd link input logic high level of described the second mems switch device, described the 4th voltage is less than described tertiary voltage.

The second link of described the 3rd mems switch device 153 is connected with the first link of described the first mems switch device 151, the 3rd link of described the 3rd mems switch device 153 is high resistant, high resistant can be the materials such as polysilicon, the first link of described the 3rd mems switch device 153 can be connected by movable plate electrode with described the 4th mems switch device 154, in the specific embodiment of the invention, with described the 4th mems switch device 154 can movable plate electrode conductive layer be connected; The first reference electrode input the 5th voltage VCC1-of described the 3rd mems switch device 153, the second reference electrode input the 6th voltage VCC1+ of described the 3rd mems switch device, described the 6th voltage is greater than described the 5th voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.Or the second link of described the 3rd mems switch device is high resistant, the 3rd link of described the 3rd mems switch device is connected with the first link of described the first mems switch device, and described the 6th voltage is less than described the 5th voltage.

The second link input logic high level of described the 4th mems switch device, the 3rd link input logic low level of described the 4th mems switch device, in this specific embodiment of the present invention, the second link input voltage VCC+ of the 4th mems switch device 154, the 3rd link input voltage VCC-, the value of voltage VCC+ and voltage VCC-is determined according to actual conditions, as long as meet VCC+, is greater than VCC-; The first link of described the 4th mems switch device is connected with described output, output signal OUT; The first reference electrode input the 7th voltage VCC1+ of described the 4th mems switch device, the second reference electrode input the 8th voltage VCC1-of described the 4th mems switch device, described the 8th voltage is less than described the 7th voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.Or, in other embodiments, the second link input logic low level of described the 4th mems switch device, the 3rd link input logic high level of described the 4th mems switch device, described the 8th voltage is greater than described the 7th voltage.

Edge triggered flip flop operation principle of the present invention: edge triggered flip flop of the present invention is host-guest architecture, the master flip-flop part that the first mems switch device 151 is this edge triggered flip flop, the second mems switch device 152, the 3rd mems switch device 153 and the 4th mems switch device 154 are slave flipflop part.Its work is also divided into two stages.

This edge triggered flip flop of the present invention is rising edge trigger, when clock signal clk is 0, master flip-flop part the first mems switch device 151 input signal D, at this moment the 3rd mems switch device 153 of slave flipflop part is input as 1 via the second mems switch device 152, the 3rd mems switch device 153 can input 1 by movable plate electrode, the 3rd mems switch device 153 of slave flipflop part is blocked, the input of the 3rd mems switch device 153 is signal D, output is high resistant, and the first link of the 4th mems switch device does not have output signal.

When clock signal clk is by 0 change 1, be that CLK is 1 o'clock, the first mems switch device 151 of master flip-flop part is blocked, the output end signal D of the first mems switch device 151 keeps, the signal D that the 3rd mems switch device 153 output the first mems switch devices 151 of slave flipflop part keep, the output signal OUT of the first link of the 4th mems switch device 154 is D.

The edge triggered flip flop of the first specific embodiment of the present invention, the second specific embodiment, two adjacent mems switch devices can stackedly share the first reference electrode or the second reference electrode, for example, four mems switch devices can be stacked, saves three reference electrodes.

Figure 14 c is the circuit diagram of the 3rd specific embodiment of edge triggered flip flop of the present invention, with reference to figure 14c, the edge triggered flip flop of the 3rd specific embodiment is trailing edge trigger, and input is two described in the edge triggered flip flop of the 3rd specific embodiment, is respectively first input end and the second input; First input end input clock signal CLK, the second input input signal D.

Described mems switch device is three, is respectively the first mems switch device 161, the second mems switch device 162, the 3rd mems switch device 163.

Described the first mems switch device 161 can movable plate electrode, can being connected with described first input end by movable plate electrode of the second mems switch device 162, for input clock signal CLK, in the specific embodiment of the invention, by the first mems switch device 161 can movable plate electrode conductive layer, the second mems switch device 162 can movable plate electrode to conductive layer, be connected with described first input end; The second link of described the first mems switch device 161 is connected with described the second input, input signal D, and the 3rd link of described the first mems switch device 161 is high resistant, high resistant can be the materials such as polysilicon; The first reference electrode of described the first mems switch device 161 is inputted the first voltage VCC1+, described the second reference electrode input second voltage VCC1-, described second voltage is less than described the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.Or in other embodiments, the second link of described the first mems switch device is high resistant, the 3rd link of described the first mems switch device is connected with described the second input, and described second voltage is greater than described the first voltage.

The second link of described the second mems switch device 162 is connected with the first link of described the first mems switch device 161, the 3rd link of described the second mems switch device 162 is high resistant, high resistant can be the materials such as polysilicon, the first link of described the second mems switch device 162 can be connected by movable plate electrode with described the 3rd mems switch device 163, in the specific embodiment of the invention, with described the 3rd mems switch device 163 can movable plate electrode conductive layer be connected; The first reference electrode input tertiary voltage VCC1-of described the second mems switch device 162, the second reference electrode input the 4th voltage VCC1+ of described the second mems switch device, described the 4th voltage is greater than described tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.Or the second link of described the second mems switch device is high resistant, the 3rd link of described the second mems switch device is connected with the first link of described the first mems switch device, and described the 4th voltage is less than described tertiary voltage.

The second link input logic high level of described the 3rd mems switch device 163, the 3rd link input logic low level of described the 3rd mems switch device 163, in this specific embodiment of the present invention, the second link input voltage VCC+ of the 3rd mems switch device 163, the 3rd link input voltage VCC-, the value of voltage VCC+ and voltage VCC-is determined according to actual conditions, as long as meet VCC+, is greater than VCC-; The first link of described the 3rd mems switch device is connected with described output, output signal OUT; The first reference electrode input the 5th voltage VCC1+ of described the 3rd mems switch device, the second reference electrode input the 6th voltage VCC1-of described the 3rd mems switch device, described the 6th voltage is less than described the 5th voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.Or, in other embodiments, the second link input logic low level of described the 3rd mems switch device, the 3rd link input logic high level of described the 3rd mems switch device, described the 6th voltage is greater than described the 5th voltage.

Edge triggered flip flop operation principle of the present invention: edge triggered flip flop of the present invention is host-guest architecture, the master flip-flop part that the first mems switch device 161 is this edge triggered flip flop, the second mems switch device 162, the 3rd mems switch device 163 are slave flipflop part.Its work is also divided into two stages.

This edge triggered flip flop of the present invention is trailing edge trigger, when clock signal clk is 1, master flip-flop part the first mems switch device 161 input signal D, the second mems switch device 162 of slave flipflop part is blocked, the input of the second mems switch device 162 is signal D, output is high resistant, and the first link of the 3rd mems switch device 163 does not have signal output.

When clock signal clk is by 1 change 0, be that CLK is 0 o'clock, the first mems switch device 161 of master flip-flop part is blocked, the output end signal D of the first mems switch device 161 keeps, the signal D that second mems switch device 162 output the first mems switch devices 161 of slave flipflop part keep, the output signal OUT of the first link of the 3rd mems switch device 163 is D.

Figure 14 d is the circuit diagram of the 4th specific embodiment of edge triggered flip flop of the present invention, in conjunction with reference to figure 14c and Figure 14 d, the edge triggered flip flop difference of the edge triggered flip flop of the 4th specific embodiment and the 3rd specific embodiment is: the edge triggered flip flop of the 4th specific embodiment is rising edge trigger, the first reference electrode of the first mems switch device 171 and the voltage relationship between the second reference electrode are contrary with the voltage relationship between the second reference electrode with the first reference electrode of the first mems switch device 161, the first reference electrode of the second mems switch device 172 and the voltage relationship between the second reference electrode are contrary with the voltage relationship between the second reference electrode with the first reference electrode of the second mems switch device 162.

Described in the edge triggered flip flop of the 4th specific embodiment, input is two, is respectively first input end and the second input; First input end input clock signal CLK, the second input input signal D.

Described mems switch device is three, is respectively the first mems switch device 171, the second mems switch device 172, the 3rd mems switch device 173.

Described the first mems switch device 171 can movable plate electrode, can being connected with described first input end by movable plate electrode of the second mems switch device 172, for input clock signal CLK, in the specific embodiment of the invention, by the first mems switch device 171 can movable plate electrode conductive layer, the second mems switch device 172 can movable plate electrode to conductive layer, be connected with described first input end; The second link of described the first mems switch device 171 is connected with described the second input, input signal D, and the 3rd link of described the first mems switch device 171 is high resistant, high resistant can be the materials such as polysilicon; The first reference electrode of described the first mems switch device 171 is inputted the first voltage VCC1-, described the second reference electrode input second voltage VCC1+, described second voltage is greater than described the first voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.Or in other embodiments, the second link of described the first mems switch device is high resistant, the 3rd link of described the first mems switch device is connected with described the second input, and described second voltage is less than described the first voltage.

The second link of described the second mems switch device 172 is connected with the first link of described the first mems switch device 171, the 3rd link of described the second mems switch device 172 is high resistant, high resistant can be the materials such as polysilicon, the first link of described the second mems switch device 172 can be connected by movable plate electrode with described the 3rd mems switch device 173, in the specific embodiment of the invention, with described the 3rd mems switch device 173 can movable plate electrode conductive layer be connected; The first reference electrode input tertiary voltage VCC1+ of described the second mems switch device 172, the second reference electrode input the 4th voltage VCC1-of described the second mems switch device, described the 4th voltage is less than described tertiary voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.Or the second link of described the second mems switch device is high resistant, the 3rd link of described the second mems switch device is connected with the first link of described the first mems switch device, and described the 4th voltage is greater than described tertiary voltage.

The second link input logic high level of described the 3rd mems switch device 173, the 3rd link input logic low level of described the 3rd mems switch device 173, in this specific embodiment of the present invention, the second link input voltage VCC+ of the 3rd mems switch device 173, the 3rd link input voltage VCC-, the value of voltage VCC+ and voltage VCC-is determined according to actual conditions, as long as meet VCC+, is greater than VCC-; The first link of described the 3rd mems switch device is connected with described output, output signal OUT; The first reference electrode input the 5th voltage VCC1+ of described the 3rd mems switch device, the second reference electrode input the 6th voltage VCC1-of described the 3rd mems switch device, described the 6th voltage is less than described the 5th voltage, if VCC1+ is supply voltage, VCC1-is earthed voltage, it should be noted that VCC1-is not limited to earthed voltage, VCC1+ is not limited to supply voltage, as long as meet the condition that VCC1+ is greater than VCC1-.Or, in other embodiments, the second link input logic low level of described the 3rd mems switch device, the 3rd link input logic high level of described the 3rd mems switch device, described the 6th voltage is greater than described the 5th voltage.

Edge triggered flip flop operation principle of the present invention: edge triggered flip flop of the present invention is host-guest architecture, the master flip-flop part that the first mems switch device 171 is this edge triggered flip flop, the second mems switch device 172, the 3rd mems switch device 173 are slave flipflop part.Its work is also divided into two stages.

This edge triggered flip flop of the present invention is rising edge trigger, when clock signal clk is 0, master flip-flop part the first mems switch device 171 input signal D, the second mems switch device 172 of slave flipflop part is blocked, the input of the second mems switch device 172 is signal D, output is high resistant, and the first link of the 3rd mems switch device 173 does not have signal output.

When clock signal clk is by 0 change 1, be that CLK is 1 o'clock, the first mems switch device 171 of master flip-flop part is blocked, the output end signal D of the first mems switch device 171 keeps, the signal D that second mems switch device 172 output the first mems switch devices 171 of slave flipflop part keep, the output signal OUT of the first link of the 3rd mems switch device 173 is D.

The edge triggered flip flop of the 3rd specific embodiment of the present invention, the 4th specific embodiment, two adjacent mems switch devices can stackedly share the first reference electrode or the second reference electrode, for example, three mems switch devices can be stacked, saves two reference electrodes.

Based on above-described gate, the present invention also provides a kind of integrated circuit, comprises above-described logic gates.

Mems switch device of the present invention is single-pole double throw type, and mems switch device is become the 3rd link conducting or become the speed of the second link conducting from the 3rd link conducting fast from the second link conducting, and the leakage current of mems switch device is little.While utilizing the combination of mems switch device to realize certain logic function, the speed that realizes logic function by gate is fast.And the circuit that mems switch device of the present invention forms can be compatible with cmos circuit, that is to say and can form mems switch device in the substrate with cmos circuit, also can form cmos circuit in the substrate that has mems switch device.

Although the present invention with preferred embodiment openly as above; but it is not for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can utilize method and the technology contents of above-mentioned announcement to make possible change and modification to technical solution of the present invention; therefore; every content that does not depart from technical solution of the present invention; any simple modification, equivalent variations and the modification above embodiment done according to technical spirit of the present invention, all belong to the protection range of technical solution of the present invention.

Claims

1. a gate, comprises at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connects, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

The first link, the second link and the 3rd link, when described can movable plate electrode during near the second reference electrode, the first link and the second link are by electrically conducting by movable plate electrode; When described can movable plate electrode during near the first reference electrode, the first link and the 3rd link are by electrically conducting by movable plate electrode;

Described can comprising by movable plate electrode:

Conductive contact end with described conductive layer insulation, described can movable plate electrode during near the second reference electrode, the first link and the second link electrically conduct by described conductive contact end, described can movable plate electrode during near the first reference electrode, the first link and the 3rd link electrically conduct by described conductive contact end, described gate is two input nand gates, described at least one input is two inputs, be respectively first input end and the second input, described mems switch device is two, be respectively the first mems switch device and the second mems switch device,

Described the first mems switch device can movable plate electrode conductive layer be connected with described first input end, the second link of described the first mems switch device is connected with described the second input, the 3rd link input logic low level of described the first mems switch device, the first link of described the first mems switch device and described the second mems switch device can movable plate electrode conductive layer be connected, the first link of described the second mems switch device is connected with described output;

The first reference electrode of described the first mems switch device is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device, described second voltage is less than described the first voltage, the first reference electrode input tertiary voltage of described the second mems switch device, the second reference electrode input the 4th voltage of described the second mems switch device;

The second link input logic high level of described the second mems switch device, the 3rd link input logic low level of described the second mems switch device, described the 4th voltage is greater than described tertiary voltage; Or, the second link input logic low level of described the second mems switch device, the 3rd link input logic high level of described the second mems switch device, described the 4th voltage is less than described tertiary voltage.

2. a gate, comprises at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connects, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Described the first mems switch device can movable plate electrode conductive layer be connected with described first input end, the second link input logic low level of described the first mems switch device, the 3rd link of described the first mems switch device is connected with described the second input, the first link of described the first mems switch device and described the second mems switch device can movable plate electrode conductive layer be connected, the first link of described the second mems switch device is connected with described output;

The first reference electrode of described the first mems switch device is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device, described second voltage is greater than described the first voltage, the first reference electrode input tertiary voltage of described the second mems switch device, the second reference electrode input the 4th voltage of described the second mems switch device;

3. a gate, comprises at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connects, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Conductive contact end with described conductive layer insulation, described can movable plate electrode during near the second reference electrode, the first link and the second link electrically conduct by described conductive contact end, described can movable plate electrode during near the first reference electrode, the first link and the 3rd link electrically conduct by described conductive contact end, described gate is two input nand gates, described mems switch device is one, described at least one input is two inputs, be respectively first input end and the second input, described first input end input first signal, described the second input input secondary signal, described the first link is connected with described output, the described conductive layer input signal contrary with described first signal logic that can movable plate electrode, described the first reference electrode is inputted the first voltage, described the second reference electrode input second voltage,

Described the second link input signal contrary with described secondary signal logic, described the 3rd link input logic high level, described second voltage is greater than described the first voltage; Or, described the second link input logic high level, described the 3rd link input signal contrary with described secondary signal logic; Described second voltage is less than described the first voltage.

4. a gate, comprises at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connects, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Conductive contact end with described conductive layer insulation, described can movable plate electrode during near the second reference electrode, the first link and the second link electrically conduct by described conductive contact end, described can movable plate electrode during near the first reference electrode, the first link and the 3rd link electrically conduct by described conductive contact end, described gate is two input NOR gate, described at least one input is two inputs, be respectively first input end and the second input, described mems switch device is two, be respectively the first mems switch device and the second mems switch device,

Described the first mems switch device can movable plate electrode conductive layer be connected with described first input end, the second link of described the first mems switch device is connected with described the second input, the 3rd link input logic high level of described the first mems switch device, the first link of described the first mems switch device and described the second mems switch device can movable plate electrode conductive layer be connected, the first link of described the second mems switch device is connected with described output;

5. a gate, comprises at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connects, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Described the first mems switch device can movable plate electrode conductive layer be connected with described first input end, the second link input logic high level of described the first mems switch device, the 3rd link of described the first mems switch device is connected with described the second input, the first link of described the first mems switch device and described the second mems switch device can movable plate electrode conductive layer be connected, the first link of described the second mems switch device is connected with described output;

6. a gate, comprises at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connects, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Conductive contact end with described conductive layer insulation, described can movable plate electrode during near the second reference electrode, the first link and the second link electrically conduct by described conductive contact end, described can movable plate electrode during near the first reference electrode, the first link and the 3rd link electrically conduct by described conductive contact end, described gate is two input NOR gate, described mems switch device is one, described at least one input is two inputs, be respectively first input end and the second input, described first input end input first signal, described the second input input secondary signal, the described conductive layer input signal contrary with described first signal logic that can movable plate electrode, described the first link is connected with described output, described the first reference electrode is inputted the first voltage, described the second reference electrode input second voltage,

Described the second link input signal contrary with described secondary signal logic, described the 3rd link input logic low level, described second voltage is less than described the first voltage; Or, described the second link input logic low level, described the 3rd link input signal contrary with described secondary signal logic, described second voltage is greater than described the first voltage.

7. a gate, comprises at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connects, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Conductive contact end with described conductive layer insulation, described can movable plate electrode during near the second reference electrode, the first link and the second link electrically conduct by described conductive contact end, described can movable plate electrode during near the first reference electrode, the first link and the 3rd link electrically conduct by described conductive contact end, described gate is four input AND OR NOT gate, described at least one input is four inputs, be respectively first input end, the second input, the 3rd input and four-input terminal, described mems switch device is four, be respectively the first mems switch device, the second mems switch device, the 3rd mems switch device and the 4th mems switch device,

Described the first mems switch device can movable plate electrode conductive layer be connected with described first input end, the first reference electrode of described the first mems switch device is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device, the first link of described the first mems switch device is connected with the second link of described the 3rd mems switch device;

The second link of described the first mems switch device is connected with described the second input, the 3rd link input logic low level of described the first mems switch device, and described second voltage is less than described the first voltage; Or, the second link input logic low level of described the first mems switch device, the 3rd link of described the first mems switch device is connected with described the second input, and described second voltage is greater than described the first voltage;

Described the second mems switch device can movable plate electrode conductive layer be connected with described the 3rd input, the first reference electrode input tertiary voltage of described the second mems switch device, the second reference electrode input the 4th voltage of described the second mems switch device, the first link of described the second mems switch device and described the 3rd mems switch device can movable plate electrode conductive layer be connected;

The second link of described the second mems switch device is connected with described four-input terminal, the 3rd link input logic low level of described the second mems switch device, and described the 4th voltage is less than described tertiary voltage; Or, the second link input logic low level of described the second mems switch device, the 3rd link of described the second mems switch device is connected with described four-input terminal, and described the 4th voltage is greater than described tertiary voltage;

The 3rd link input logic high level of described the 3rd mems switch device, the first link of described the 3rd mems switch device and described the 4th mems switch device can movable plate electrode conductive layer be connected;

The first reference electrode input the 5th voltage of described the 3rd mems switch device, the second reference electrode input the 6th voltage of described the 3rd mems switch device, described the 6th voltage is greater than described the 5th voltage;

The first reference electrode input the 7th voltage of described the 4th mems switch device, the second reference electrode input the 8th voltage of described the 4th mems switch device, the first link of described the 4th mems switch device is connected with described output;

The second link input logic high level of described the 4th mems switch device, the 3rd link input logic low level of described the 4th mems switch device, described the 8th voltage is greater than described the 7th voltage; Or, the second link input logic low level of described the 4th mems switch device, the 3rd link input logic high level of described the 4th mems switch device, described the 8th voltage is less than described the 7th voltage.

8. a gate, comprises at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connects, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Described the first mems switch device can movable plate electrode conductive layer be connected with described first input end, the first reference electrode of described the first mems switch device is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device, the first link of described the first mems switch device is connected with the 3rd link of described the 3rd mems switch device;

The second link input logic high level of described the 3rd mems switch device, the first link of described the 3rd mems switch device and described the 4th mems switch device can movable plate electrode conductive layer be connected;

The first reference electrode input the 5th voltage of described the 3rd mems switch device, the second reference electrode input the 6th voltage of described the second mems switch device, described the 6th voltage is less than described the 5th voltage;

9. a gate, comprises at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connects, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Conductive contact end with described conductive layer insulation, described can movable plate electrode during near the second reference electrode, the first link and the second link electrically conduct by described conductive contact end, described can movable plate electrode during near the first reference electrode, the first link and the 3rd link electrically conduct by described conductive contact end, described gate is same or door

Described at least one input is two inputs, is respectively first input end, the second input, and described mems switch device is two, is respectively the first mems switch device, the second mems switch device;

Described the first mems switch device can movable plate electrode conductive layer be connected with described first input end, the first reference electrode of described the first mems switch device is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device, the first link of described the first mems switch device is connected with the second link of described the second mems switch device;

The second link input logic low level of described the first mems switch device, the 3rd link input logic high level of described the first mems switch device, described second voltage is less than described the first voltage; Or, the second link input logic high level of described the first mems switch device, the 3rd link input logic low level of described the first mems switch device, described second voltage is greater than described the first voltage;

Described the second mems switch device can movable plate electrode conductive layer be connected with described the second input, the 3rd link of described the second mems switch device and described the first mems switch device can movable plate electrode conductive layer be connected, the first link of described the second mems switch device is connected with described output;

The first reference electrode input tertiary voltage of described the second mems switch device, the second reference electrode input the 4th voltage of described the second mems switch device, described the 4th voltage is greater than described tertiary voltage.

10. a gate, comprises at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connects, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Described the first mems switch device can movable plate electrode conductive layer be connected with described first input end, the first link of described the first mems switch device is connected with the 3rd link of described the second mems switch device, the first reference electrode of described the first mems switch device is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device;

Described the second mems switch device can movable plate electrode conductive layer be connected with described the second input, the second link of described the second mems switch device and described the first mems switch device can movable plate electrode conductive layer be connected, the first link of described the second mems switch device is connected with described output;

The first reference electrode input tertiary voltage of described the second mems switch device, the second reference electrode input the 4th voltage of described the second mems switch device, described the 4th voltage is less than described tertiary voltage.

11. 1 kinds of gates, comprise at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connect, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Conductive contact end with described conductive layer insulation, described can movable plate electrode during near the second reference electrode, the first link and the second link electrically conduct by described conductive contact end, described can movable plate electrode during near the first reference electrode, the first link and the 3rd link electrically conduct by described conductive contact end, described gate is same or door, described at least one input is two inputs, be respectively first input end, the second input, described with or door by a mems switch device, realize;

Described mems switch device can movable plate electrode conductive layer be connected with described first input end, the first reference electrode of described mems switch device is inputted the first voltage, the second reference electrode input second voltage of described mems switch device, the first link of described mems switch device is connected with described output;

The second link of described mems switch device is connected with described the second input, the 3rd link input signal contrary with the signal logic of described the second input of described mems switch device, and described second voltage is less than described the first voltage; Or, the second link input signal contrary with the signal logic of described the second input of described mems switch device, the 3rd link of described mems switch device is connected with described the second input, and described second voltage is greater than described the first voltage.

12. 1 kinds of gates, comprise at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connect, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Conductive contact end with described conductive layer insulation, described can movable plate electrode during near the second reference electrode, the first link and the second link electrically conduct by described conductive contact end, described can movable plate electrode during near the first reference electrode, the first link and the 3rd link electrically conduct by described conductive contact end, described gate is XOR gate

Described the first mems switch device can movable plate electrode conductive layer be connected with described first input end, the first link of described the first mems switch device is connected with the second link of described the second mems switch device, the first reference electrode of described the first mems switch device is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device;

13. 1 kinds of gates, comprise at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connect, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Conductive contact end with described conductive layer insulation, described can movable plate electrode during near the second reference electrode, the first link and the second link electrically conduct by described conductive contact end, described can movable plate electrode during near the first reference electrode, the first link and the 3rd link electrically conduct by described conductive contact end, described gate is XOR gate, described at least one input is two inputs, be respectively first input end, the second input, described mems switch device is two, is respectively the first mems switch device, the second mems switch device;

14. 1 kinds of gates, comprise at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connect, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Conductive contact end with described conductive layer insulation, described can movable plate electrode during near the second reference electrode, the first link and the second link electrically conduct by described conductive contact end, described can movable plate electrode during near the first reference electrode, the first link and the 3rd link electrically conduct by described conductive contact end, described gate is XOR gate, described at least one input is two inputs, be respectively first input end, the second input, described XOR gate realizes by a mems switch device;

Described mems switch device can movable plate electrode conductive layer be connected with described first input end, the first link of described mems switch device is connected with described output, the first reference electrode of described mems switch device is inputted the first voltage, the second reference electrode input second voltage of described mems switch device;

The 3rd link of described mems switch device is connected with described the second input, the second link input signal contrary with the signal logic of described the second input of described mems switch device, and described second voltage is less than described the first voltage; Or the second link of described mems switch device is connected with described the second input, the 3rd link input signal contrary with the signal logic of described the second input of described mems switch device, described second voltage is greater than described the first voltage.

15. 1 kinds of gates, comprise at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connect, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Conductive contact end with described conductive layer insulation, described can movable plate electrode during near the second reference electrode, the first link and the second link electrically conduct by described conductive contact end, described can movable plate electrode during near the first reference electrode, the first link and the 3rd link electrically conduct by described conductive contact end, described gate is trigger

Described input is two, is respectively first input end and the second input; Described mems switch device is two, is respectively the first mems switch device and the second mems switch device;

Described the first mems switch device can movable plate electrode conductive layer be connected with described first input end, for input clock signal, the first link of described the first mems switch device and described the second mems switch device can movable plate electrode conductive layer be connected, the second link of described the first mems switch device is connected with described the second input, and the 3rd link of described the first mems switch device is high resistant;

The first reference electrode of described the first mems switch device is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device, and described second voltage is less than described the first voltage;

The first link of described the second mems switch device is connected with described output, the first reference electrode input tertiary voltage of described the second mems switch device, the second reference electrode input the 4th voltage of described the second mems switch device;

The second link input logic high level of described the second mems switch device, the 3rd link input logic low level of described the second mems switch device, described the 4th voltage is less than described tertiary voltage; Or, the second link input logic low level of described the second mems switch device, the 3rd link input logic high level of described the second mems switch device, described the 4th voltage is greater than described tertiary voltage.

16. 1 kinds of gates, comprise at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connect, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Described the first mems switch device can movable plate electrode conductive layer be connected with described first input end, for input clock signal, the first link of described the first mems switch device and described the second mems switch device can movable plate electrode conductive layer be connected, the second link of described the first mems switch device is high resistant, and the 3rd link of described the first mems switch device is connected with described the second input;

The first reference electrode of described the first mems switch device is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device, and described second voltage is greater than described the first voltage;

17. 1 kinds of gates, comprise at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connect, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Conductive contact end with described conductive layer insulation, described can movable plate electrode during near the second reference electrode, the first link and the second link electrically conduct by described conductive contact end, described can movable plate electrode during near the first reference electrode, the first link and the 3rd link electrically conduct by described conductive contact end, described gate is edge triggered flip flop, and described input is two, is respectively first input end and the second input; Described mems switch device is four, is respectively the first mems switch device, the second mems switch device, the 3rd mems switch device and the 4th mems switch device;

Described the first mems switch device can movable plate electrode conductive layer, the second mems switch device can movable plate electrode conductive layer be connected with described first input end, for input clock signal, the first reference electrode of described the first mems switch device is inputted the first voltage, the second reference electrode input second voltage of described the first mems switch device;

The second link of described the first mems switch device is connected with described the second input, and the 3rd link of described the first mems switch device is high resistant, and described second voltage is less than described the first voltage; Or the second link of described the first mems switch device is high resistant, the 3rd link of described the first mems switch device is connected with described the second input, and described second voltage is greater than described the first voltage;

The first link of described the second mems switch device and described the 3rd mems switch device can movable plate electrode conductive layer be connected, the first reference electrode input tertiary voltage of described the second mems switch device, the second reference electrode input the 4th voltage of described the second mems switch device;

The second link input logic high level of described the second mems switch device, the 3rd link input logic low level of described the second mems switch device, described the 4th voltage is greater than described tertiary voltage; Or, the second link input logic low level of described the second mems switch device, the 3rd link input logic high level of described the second mems switch device, described the 4th voltage is less than described tertiary voltage;

The first reference electrode input the 5th voltage of described the 3rd mems switch device, the second reference electrode input the 6th voltage of described the 3rd mems switch device, the first link of described the 3rd mems switch device and described the 4th mems switch device can movable plate electrode conductive layer be connected;

The second link of described the 3rd mems switch device is connected with the first link of described the first mems switch device, and the 3rd link of described the 3rd mems switch device is high resistant, and described the 6th voltage is less than described the 5th voltage; Or the second link of described the 3rd mems switch device is high resistant, the 3rd link of described the 3rd mems switch device is connected with the first link of described the first mems switch device, and described the 6th voltage is greater than described the 5th voltage;

The first link of described the 4th mems switch device is connected with described output, the first reference electrode input the 7th voltage of described the 4th mems switch device, and the second reference electrode input the 8th voltage of described the 4th mems switch device,

The second link input logic high level of described the 4th mems switch device, the 3rd link input logic low level of described the 4th mems switch device, described the 8th voltage is less than described the 7th voltage; Or, the second link input logic low level of described the 4th mems switch device, the 3rd link input logic high level of described the 4th mems switch device, described the 8th voltage is greater than described the 7th voltage.

18. 1 kinds of gates, comprise at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connect, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

The second link of described the first mems switch device is connected with described the second input, and the 3rd link of described the first mems switch device is high resistant, and described second voltage is greater than described the first voltage; Or the second link of described the first mems switch device is high resistant, the 3rd link of described the first mems switch device is connected with described the second input, and described second voltage is less than described the first voltage;

The first link of described the second mems switch device and described the 3rd mems switch device can movable plate electrode conductive layer be connected, the first reference electrode input tertiary voltage of described the second mems switch device, the second reference electrode input the 4th voltage of described the second mems switch device

The first link of described the 3rd mems switch device and described the 4th mems switch device can movable plate electrode conductive layer be connected, the first reference electrode input the 5th voltage of described the 3rd mems switch device, the second reference electrode input the 6th voltage of described the 3rd mems switch device;

The second link of described the 3rd mems switch device is connected with the first link of described the first mems switch device, and the 3rd link of described the 3rd mems switch device is high resistant, and described the 6th voltage is greater than described the 5th voltage; Or the second link of described the 3rd mems switch device is high resistant, the 3rd link of described the 3rd mems switch device is connected with the first link of described the first mems switch device, and described the 6th voltage is less than described the 5th voltage;

19. 1 kinds of gates, comprise at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connect, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

Conductive contact end with described conductive layer insulation, described can movable plate electrode during near the second reference electrode, the first link and the second link electrically conduct by described conductive contact end, described can movable plate electrode during near the first reference electrode, the first link and the 3rd link electrically conduct by described conductive contact end, described gate is edge triggered flip flop, and described input is two, is respectively first input end and the second input; Described mems switch device is three, is respectively the first mems switch device, the second mems switch device, the 3rd mems switch device;

Described the first mems switch device can movable plate electrode conductive layer, the second mems switch device can movable plate electrode conductive layer be connected with described first input end, for input clock signal, the first reference electrode of described the first mems switch device is inputted the first voltage, described the second reference electrode input second voltage;

The first reference electrode input tertiary voltage of described the second mems switch device, the second reference electrode input the 4th voltage of described the second mems switch device, the first link of described the second mems switch device and described the 3rd mems switch device can movable plate electrode conductive layer be connected;

The second link of described the second mems switch device is connected with the first link of described the first mems switch device, and the 3rd link of described the second mems switch device is high resistant, and described the 4th voltage is greater than described tertiary voltage; Or the second link of described the second mems switch device is high resistant, the 3rd link of described the second mems switch device is connected with the first link of described the first mems switch device, and described the 4th voltage is less than described tertiary voltage;

The first link of described the 3rd mems switch device is connected with described output, the first reference electrode input the 5th voltage of described the 3rd mems switch device, and the second reference electrode input the 6th voltage of described the 3rd mems switch device,

The second link input logic high level of described the 3rd mems switch device, the 3rd link input logic low level of described the 3rd mems switch device, described the 6th voltage is less than described the 5th voltage; Or, the second link input logic low level of described the 3rd mems switch device, the 3rd link input logic high level of described the 3rd mems switch device, described the 6th voltage is greater than described the 5th voltage.

20. 1 kinds of gates, comprise at least one input, and an output, is characterized in that, between described input and described output, by least one mems switch device, connect, and to realize logic function, described mems switch device, comprising:

Can movable plate electrode;

Described can comprising by movable plate electrode:

The first link of described the second mems switch device and described the 3rd mems switch device can movable plate electrode conductive layer be connected; The first reference electrode input tertiary voltage of described the second mems switch device, the second reference electrode input the 4th voltage of described the second mems switch device;

The second link of described the second mems switch device is connected with the first link of described the first mems switch device, and the 3rd link of described the second mems switch device is high resistant, and described the 4th voltage is less than described tertiary voltage; Or the second link of described the second mems switch device is high resistant, the 3rd link of described the second mems switch device is connected with the first link of described the first mems switch device, and described the 4th voltage is greater than described tertiary voltage;

The first link of described the 3rd mems switch device is connected with described output, the first reference electrode input the 5th voltage of described the 3rd mems switch device, the second reference electrode input the 6th voltage of described the 3rd mems switch device;