CN102543196A - Data reading method, memory storing device and controller thereof - Google Patents
Data reading method, memory storing device and controller thereof Download PDFInfo
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- CN102543196A CN102543196A CN2010105882081A CN201010588208A CN102543196A CN 102543196 A CN102543196 A CN 102543196A CN 2010105882081 A CN2010105882081 A CN 2010105882081A CN 201010588208 A CN201010588208 A CN 201010588208A CN 102543196 A CN102543196 A CN 102543196A
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Abstract
The invention discloses a data reading method, a memory storing device and a controller thereof. The data reading method is used for a rewritable nonvolatile memory module, wherein the rewritable nonvolatile memory module has a plurality of entity pages. The data reading method comprises the steps of dividing the entity pages into a plurality of entity page groups and setting a corresponding valve value voltage group for each entity page group. The data reading method further comprises a step of reading data from the entity pages of the entity page groups by the corresponding valve value voltage groups. The data reading method further comprises a step of updating the valve value voltage group corresponding to an entity page group in case that the data read from one entity page of one entity page group cannot be corrected by an error correcting circuit. The correctness of the read data can be effectively ensured based on the data reading method.
Description
Technical field
The present invention relates to a kind of method for reading data that is used for to rewrite the formula nonvolatile memory; Particularly relate to a kind of when the data that from can rewrite the formula nonvolatile memory, read can't be corrected, readjusting and read voltage, and use the Memory Controller and the memorizer memory devices of the method with the method for reading of data correctly.
Background technology
Digital camera, mobile phone and MP3 are very rapid in growth over the years, make the consumer also increase rapidly the storage requirements of digital content.Because flash memory (Flash Memory) has that data are non-volatile, power saving, volume is little and the characteristic of no mechanical structure etc., suitable user carries the Storage Media as digital document transmission and exchange.(Solid State Drive is exactly with the example of flash memory as Storage Media SSD), and has been widely used in the computer host system as Primary Hard Drive solid state hard disc.
Present flash memory mainly is divided into two kinds, is respectively or/no type flash memory (NORFlash) and and non-type flash memory (NAND Flash).Flash memory also can be divided into multilayer storage unit (Multi-Level Cell, MLC) flash memory and individual layer storage unit (Single-Level Cell, SLC) flash memory according to the storable data bits of each storage unit.Each storage unit of SLC flash memory only can store 1 bit data, and each storage unit of MLC flash memory can store the bit data more than at least 2.For example, be example with 4 layers of storage unit flash memory, each storage unit can store 2 bit data (that is, " 11 ", " 10 ", " 00 " and " 01 ").
In flash memory, storage unit can be strung and formed a memory cell array (memory cell array) by bit line (Bit Line) and word line (Word Line).When the control circuit of control bit line and word line when reading or writing data to the designated memory cell of memory cell array; The floating voltage of other non-designated memory locations may be interfered (disturb); And then the position that makes the mistake (that is, the data (also being called reading of data) that from storage unit, read of control circuit and original data that write (also be called write data different).Perhaps, when flash memory also possibly cause abrasion (Wear) situation because of factor such as long-term idle, that storer leaks electricity or repeatedly wipe or write, the floating voltage in the storage unit also possibly change and the position that makes the mistake.
In general, memorizer memory devices can the configuration error correcting circuit.When writing data; Error-Correcting Circuit can produce error-correcting code for the data that write; And when reading of data, Error-Correcting Circuit can carry out error correcting/decoding (also being called error-correcting routine) for the data that read, the position of righting the wrong thus according to corresponding error-correcting code.Yet, Error-Correcting Circuit the wrong figure place that can proofread and correct be limited, in case when the number of the error bit of the data that read surpasses the number of the error bit that Error-Correcting Circuit can proofread and correct, the data that read can't be corrected.At this moment, host computer system can't correctly read proper data from memorizer memory devices.Because the characteristic of the evolution of technology or the hardware structure of storer itself makes the mistake position more and more (more its issuable error bits of the storable figure place of each storage unit like multilayer storage unit flash memory are many than SLC also); Therefore; The correctness of the data of how guaranteeing to be read becomes the subject under discussion that those skilled in the art pay close attention to.
Summary of the invention
The present invention provides a kind of method for reading data, Memory Controller and memorizer memory devices, and it can correctly read and be stored in the data that can rewrite in the formula nonvolatile memory.
Exemplary embodiment of the present invention proposes a kind of method for reading data, is used for one and can rewrites the formula non-volatile memory module, and wherein this can rewrite the formula non-volatile memory module and has a plurality of physical page.The notebook data read method comprises these physical page is grouped into a plurality of physical page crowds; And set a corresponding threshold voltage group for each physical page crowd, wherein each hyte data read power taking pressure group comprises a plurality of threshold voltages.The notebook data read method also comprises and uses corresponding threshold voltage group reading of data from these physical page crowd's physical page respectively.The notebook data read method also comprises, when the data that from one of them physical page of one of them physical page crowd, read can't be come timing by Error-Correcting Circuit, upgrades corresponding this physical page crowd's threshold voltage group.
Exemplary embodiment of the present invention proposes a kind of method for reading data, is used for one and can rewrites the formula non-volatile memory module, and wherein this can rewrite the formula non-volatile memory module and has in regular turn a plurality of physical page of arranging.The notebook data read method comprises: use first physical page of at least one threshold voltage among these physical page and obtain first data; And judge that whether these first data can proofread and correct by Error-Correcting Circuit and produce first correction data of corresponding first physical page.The notebook data read method also comprises; If first data can't be proofreaied and correct and when producing the correction data of corresponding first physical page by Error-Correcting Circuit; Obtain second data second physical page among these physical page; Wherein second physical page is contiguous first physical page, and second data can be proofreaied and correct and produce second correction data of corresponding second physical page by Error-Correcting Circuit.The notebook data read method also comprises: by comparison second data and corresponding second physical page second correction data obtain a corrupted bits of information; Calculate at least one bucking voltage according to this corrupted bits of information; By the bucking voltage of being calculated threshold voltage is adjusted to the adjusted threshold voltage; And use the adjusted threshold voltage to obtain another first data and proofread and correct this another first data to produce first correction data of corresponding first physical page by Error-Correcting Circuit from first physical page.
Exemplary embodiment of the present invention proposes a kind of Memory Controller, is used for control and can rewrites the formula non-volatile memory module, and wherein this can rewrite the formula non-volatile memory module and has a plurality of physical page.This Memory Controller comprises memory management circuitry and electrically connects HPI, memory interface, the Error-Correcting Circuit of memory management circuitry so far and read the voltage refresh circuit.Memory management circuitry is in order to be grouped into a plurality of physical page crowds with these physical page; For each physical page crowd sets corresponding threshold voltage group and uses corresponding these threshold voltage groups reading of data from these physical page crowd's physical page respectively, wherein each hyte data read power taking pressure group comprises a plurality of threshold voltages.Memory interface so far can rewrite the formula non-volatile memory module in order to electrically connect.At this, can't come timing by Error-Correcting Circuit when the data that memory management circuitry reads from one of them physical page of one of them physical page crowd, read the threshold voltage group that the voltage refresh circuit can upgrade corresponding this physical page crowd.
Exemplary embodiment of the present invention proposes a kind of Memory Controller, is used for control and can rewrites the formula non-volatile memory module, and wherein this can rewrite the formula non-volatile memory module and has in regular turn a plurality of physical page of arranging.This Memory Controller comprises memory management circuitry and electrically connects HPI, memory interface, the Error-Correcting Circuit of memory management circuitry so far and read the voltage refresh circuit.Memory interface can rewrite the formula non-volatile memory module in order to be electrically connected to.At this, memory management circuitry is obtained first data in order to use at least one threshold voltage from first physical page, and the misjudgment correcting circuit whether these first data of recoverable produce first correction data of corresponding first physical page.If Error-Correcting Circuit can't be proofreaied and correct first data when producing the correction data of corresponding first physical page; Memory management circuitry is also in order to obtain second data from second physical page; Wherein second physical page is contiguous first physical page, and second data can be proofreaied and correct and produce second correction data of corresponding second physical page by Error-Correcting Circuit.Read the voltage refresh circuit in order to compare second data and corresponding second physical page second correction data obtain a corrupted bits of information; Calculate at least one bucking voltage according to this corrupted bits of information, and threshold voltage is adjusted to the adjusted threshold voltage according to the bucking voltage of being calculated.In addition, memory management circuitry is also proofreaied and correct this another first data to produce first correction data of corresponding first physical page in order to use the adjusted threshold voltage to obtain another first data and Error-Correcting Circuit from first physical page.
Exemplary embodiment of the present invention proposes a kind of memorizer memory devices, and it comprises connector, duplicative non-volatile memory module and Memory Controller.Connector is in order to be electrically connected to host computer system.Can rewrite the formula non-volatile memory module and have a plurality of physical page.Memory Controller is electrically connected to connector and can rewrites the formula non-volatile memory module, and has Error-Correcting Circuit.Memory Controller is in order to be grouped into a plurality of physical page crowds with these physical page; For each physical page crowd sets corresponding threshold voltage group and uses corresponding threshold voltage group reading of data from these physical page crowd's physical page respectively, wherein each hyte data read power taking pressure group comprises a plurality of threshold voltages.The data that when one of them physical page of one of them the physical page crowd of Memory Controller among these physical page crowd, read can't be come timing by Error-Correcting Circuit, and Memory Controller can upgrade corresponding this physical page crowd's threshold voltage group.
Exemplary embodiment of the present invention proposes a kind of memorizer memory devices, and it comprises connector, can rewrite formula non-volatile memory module and Memory Controller.Connector is in order to be electrically connected to host computer system.Can rewrite the formula non-volatile memory module and have a plurality of physical page.Memory Controller is electrically connected to connector and can rewrites the formula non-volatile memory module, and has Error-Correcting Circuit.Memory Controller obtains first data in order to use first physical page of at least one threshold voltage among these physical page, and the misjudgment correcting circuit whether recoverable first data produce first correction data of corresponding first physical page.If Error-Correcting Circuit can't be proofreaied and correct first data when producing the correction data of corresponding first physical page; Memory Controller is also in order to obtain second data second physical page among these physical page; Wherein second physical page is contiguous first physical page, and second data can be proofreaied and correct and produce second correction data of corresponding second physical page by Error-Correcting Circuit.In addition; Memory Controller also in order to compare second data and corresponding second physical page second correction data obtain corrupted bits of information; Calculate at least one bucking voltage according to corrupted bits of information, and above-mentioned threshold voltage is adjusted to the adjusted threshold voltage according to the bucking voltage of being calculated.Moreover Memory Controller is also proofreaied and correct this another first data to produce first correction data of corresponding first physical page in order to use this adjusted threshold voltage to obtain another first data and Error-Correcting Circuit from first physical page.
Based on above-mentioned, the correctness of the data that the method for reading data of exemplary embodiment of the present invention, Memory Controller and memorizer memory devices can be guaranteed to be read effectively.
For making the above-mentioned feature and advantage of the present invention can be more obviously understandable, hereinafter is special lifts embodiment, and is described with reference to the accompanying drawings as follows.
Description of drawings
Figure 1A is host computer system and the memorizer memory devices that exemplary embodiment illustrated according to the present invention.
Figure 1B is the synoptic diagram of exemplary embodiment illustrated according to the present invention computing machine, input/output device and memorizer memory devices.
Fig. 1 C is another exemplary embodiment illustrated according to the present invention the host computer system and the synoptic diagram of memorizer memory devices.
Fig. 2 is the summary calcspar that illustrates the memorizer memory devices shown in Figure 1A.
Fig. 3 is the summary calcspar of the rewritten formula non-volatile memory module that exemplary embodiment illustrated according to the present invention.
Fig. 4 is that exemplary embodiment illustrates the statistical figure that writes the pairing floating voltage of data that is stored in the memory cell array according to the present invention.
What Fig. 5 was that first exemplary embodiment is illustrated according to the present invention reads the running synoptic diagram to one of them storage unit.
Fig. 6 be another exemplary embodiment illustrated according to the present invention 8 layers of storage unit read the running synoptic diagram.
Fig. 7 is the summary calcspar of the Memory Controller that exemplary embodiment illustrated according to the present invention.
Fig. 8 is the synoptic diagram that exemplary embodiment illustrated according to the present invention management can rewrite the formula non-volatile memory module.
Fig. 9 is the example of the reading of data that exemplary embodiment illustrates according to the present invention.
Figure 10 is the synoptic diagram of the type of error of the mistake of statistics position that exemplary embodiment illustrated according to the present invention.
Figure 11 is the process flow diagram of the method for reading data that exemplary embodiment illustrated according to the present invention.
The reference numeral explanation
1000: host computer system
1100: computing machine
1102: microprocessor
1104: RAS
1106: input/output device
1108: system bus
1110: data transmission interface
1202: mouse
1204: keyboard
1206: display
1208: printer
1212: coil with oneself
1214: storage card
1216: solid state hard disc
1310: digital camera
The 1312:SD card
The 1314:MMC card
1316: memory stick
The 1318:CF card
1320: embedded storage device
100: memorizer memory devices
102: connector
104: Memory Controller
106: can rewrite the formula non-volatile memory module
202: memory cell array
204: Word line control circuit
206: bit line control circuit
208: column decoder
210: the data input/output (i/o) buffer
212: control circuit
VA: first threshold voltage
VB: second threshold voltage
VC: the 3rd threshold voltage
VD: the 4th threshold voltage
VE: the 5th threshold voltage
VF: the 6th threshold voltage
VG: the 7th threshold voltage
702: memory management circuitry
704: HPI
706: memory interface
708: Error-Correcting Circuit
710: read the voltage refresh circuit
752: memory buffer
754: electric power management circuit
410 (0)～410 (N): physical page crowd
400 (0)-0～400 (0)～K: physical page
1002,1004,1006,1008,1010,1012: block
S1101, S1103, S1105, S1107, S1109, S1111, S1113, S1115: the step that data read
Embodiment
In exemplary embodiment of the present invention, the physical page that can rewrite the formula non-volatile memory module can be grouped into a plurality of physical page crowds, and each physical page crowd can dispose corresponding threshold voltage group.And the data in physical page crowd's the physical page can use corresponding threshold voltage group to read.Particularly, when the data that read can't be come timing by Error-Correcting Circuit, corresponding threshold voltage group can be adjusted according to the corrupted bits of information of from contiguous physical page, being obtained.Because the threshold voltage group is adjusted according to its corresponding physical page crowd's characteristic, therefore, the correctness of the feasible data that read more can be guaranteed.Below with detailed example embodiment, the present invention is described.
Generally speaking, memorizer memory devices (also claim, memory storage system) comprises and can rewrite formula non-volatile memory module and controller (also title, control circuit).Usually memorizer memory devices is to use with host computer system, so that host computer system can write to memorizer memory devices or reading of data from memorizer memory devices with data.
Figure 1A is host computer system and the memorizer memory devices that exemplary embodiment illustrated according to the present invention.
Please with reference to Figure 1A, host computer system 1000 generally comprises computing machine 1100 and I/O (input/output, I/O) device 1106.Computing machine 1100 comprise microprocessor 1102, RAS (random access memory, RAM) 1104, system bus 1108 and data transmission interface 1110.Input/output device 1106 comprises mouse 1202, keyboard 1204, the display 1206 and printer 1208 like Figure 1B.It must be appreciated, the unrestricted input/output device 1106 of the device shown in Figure 1B, input/output device 1106 can also comprise other devices.
In embodiments of the present invention, memorizer memory devices 100 is to electrically connect through data transmission interface 1110 other elements with host computer system 1000.Can data be write to memorizer memory devices 100 or reading of data from memorizer memory devices 100 by microprocessor 1102, RAS 1104 with the running of input/output device 1106.For example, memorizer memory devices 100 can be carry-on dish 1212, storage card 1214 or solid state hard disc (Solid State Drive, SSD) the rewritten formula non-volatile memory storage device of 1216 grades shown in Figure 1B.
Generally speaking, host computer system 1000 can be to cooperate any system with storage data with memorizer memory devices 100 substantially.Though in this exemplary embodiment; Host computer system 1000 is to explain with computer system; Yet host computer system 1000 can be systems such as digital camera, video camera, communicator, message player or video signal player in another exemplary embodiment of the present invention.For example; In host computer system is digital camera (video camera) 1310 o'clock, can rewrite formula non-volatile memory storage device and then be its employed SD card 1312, mmc card 1314, memory stick (memory stick) 1316, CF card 1318 or embedded storage device 1320 (shown in Fig. 1 C).Embedded storage device 1320 comprise the built-in multimedia card (Embedded MMC, eMMC).What deserves to be mentioned is that the built-in multimedia card is directly to be electrically connected on the substrate of host computer system.
Fig. 2 is the summary calcspar that illustrates the memorizer memory devices shown in Figure 1A.
Please with reference to Fig. 2, memorizer memory devices 100 comprises connector 102, Memory Controller 104 and can rewrite formula non-volatile memory module 106.
In this exemplary embodiment, connector 102 is to be compatible to sequence advanced annex (Serial AdvancedTechnology Attachment, SATA) standard.Yet; It must be appreciated, the invention is not restricted to this, connector 102 can also be to meet Institute of Electrical and Electric Engineers (Institute of Electrical andElectronic Engineers; IEEE) 1394 standards, high-speed peripheral component connecting interface (PeripheralComponent Interconnect Express; PCI Express) standard, universal serial bus (UniversalSerial Bus, USB) standard, secure digital (Secure Digital, SD) interface standard, memory stick (Memory Stick; MS) interface standard, Multi Media Card (Multi Media Card; MMC) interface standard, compact flash (Compact Flash, CF) interface standard, integrated driving electrical interface (IntegratedDevice Electronics, IDE) standard or other standards that is fit to.
Can rewrite formula non-volatile memory module 106 is to be electrically connected to Memory Controller 104, and in order to store the data that host computer system 1000 is write.In this exemplary embodiment, can rewrite formula non-volatile memory module 106 and be multi-level cell memory (Multi Level Cell, MLC) NAND type flash memory module.Yet, the invention is not restricted to this, also other flash memory module or other have the memory module of identical characteristics can to rewrite formula non-volatile memory module 106.
Fig. 3 is the summary calcspar of the rewritten formula non-volatile memory module that exemplary embodiment illustrated according to the present invention.
Formula non-volatile memory module 106 be can rewrite and memory cell array 202, Word line control circuit 204, bit line control circuit 206, column decoder (column decoder) 208, data input/output (i/o) buffer 210 and control circuit 212 comprised.
Memory cell array 202 comprises a plurality of storage unit in order to storage data (figure does not show), connects the multiple bit lines (figure does not show) of these storage unit, many word lines and shared source electrode line (scheming not show).Storage unit is to be configured on the point of crossing of bit line and word line with array way.Write instruction or during reading of data when receiving from Memory Controller 130; Control circuit 212 can control word line control circuit 204, bit line control circuit 206, column decoder 208, data input/output (i/o) buffer 210 write data to memory array 202 or reading of data from memory array 202; Wherein Word line control circuit 204 is imparted to the word line voltage of word line in order to control; Bit line control circuit 206 is in order to the control bit line; Decoding column address in the column decoder 208 foundation instructions is with the selection corresponding bit lines, and data input/output (i/o) buffer 210 is in order to temporal data.
In this exemplary embodiment, can rewrite formula non-volatile memory module 106 and be MLC NAND type flash memory module, it uses a plurality of floating voltages to represent the data of multidigit (bits).Specifically, each storage unit of memory cell array 202 has a plurality of storing states, and these storing states are to distinguish with a plurality of threshold voltages.
Fig. 4 is that exemplary embodiment illustrates the statistical figure that writes the pairing floating voltage of data that is stored in the memory cell array according to the present invention.
Please with reference to Fig. 4; With 4 rank storage unit NAND type flash memories is example; Floating voltage in each storage unit can be divided into 4 kinds of storing states according to first threshold voltage VA, the second threshold voltage VB and the 3rd threshold voltage VC, and these storing states are represented " 11 ", " 10 ", " 00 " and " 01 " respectively.In other words, each storing state comprise least significant bit (LSB) (Least Significant Bit, LSB) and highest significant position (Most Significant Bit, MSB).In this exemplary embodiment, the value of the 1st position of counting from the left side in the storing state (that is, " 11 ", " 10 ", " 00 " and " 01 ") is LSB, and the value of the 2nd position of counting from the left side is MSB.Therefore, in first exemplary embodiment, each storage unit can store 2 bit data.It must be appreciated that the floating voltage that Fig. 3 illustrated and the correspondence of storing state thereof are merely an example.In another exemplary embodiment of the present invention, floating voltage and storing state corresponding also bigger and with " 11 ", " 10 ", " 01 " and " 00 " arrangement along with floating voltage.Perhaps; The pairing storing state of floating voltage also can be to the physical holding of the stock value shine upon or anti-phase after value, in addition, when another example in the instance; Also the value of the 1st position counting from the left side of definable is MSB, and the value of the 2nd position of counting from the left side is LSB.
Therefore in this exemplary embodiment, each storage unit can store 2 bit data, and the storage unit on same word line can constitute the storage area of 2 physical page (that is, the lower page and the last page).That is to say that the LSB of each storage unit is corresponding lower page, and the MSB of each storage unit is the corresponding page of going up.In addition, several physical page can constitute a physical blocks in memory cell array 202, and physical blocks is for carrying out the least unit of wiping running.That is each physical blocks contains the storage unit that is wiped free of in the lump of minimal amount.
It is to utilize injecting voltage to change the floating voltage of storage unit that the data of the storage unit of memory cell array 202 write, to present different storing states.For example, page data is 1 and to go up page data be 1 o'clock instantly, the floating voltage that control circuit 212 can control word line control circuits 204 change in the storage unit, and the storing state of storage unit is remained " 11 ".Instantly page data is 1 and to go up page data be 0 o'clock, Word line control circuit 204 can be under the control of control circuit 212 floating voltage in the change storage unit, and the storing state of storage unit is changed into " 10 ".Instantly page data is 0 and to go up page data be 0 o'clock, Word line control circuit 204 can be under the control of control circuit 212 floating voltage in the change storage unit, and the storing state of storage unit is changed into " 00 ".And page data is 0 and to go up page data be 1 o'clock instantly, Word line control circuit 204 can be under the control of control circuit 212 floating voltage in the change storage unit, and the storing state of storage unit is changed into " 01 "
What Fig. 5 was that first exemplary embodiment is illustrated according to the present invention reads the running synoptic diagram to one of them storage unit.
Please with reference to Fig. 5, the data of the storage unit of memory cell array 202 read the floating voltage that then is to use threshold voltage to distinguish storage unit.In the running of reading lower page of data, Word line control circuit 204 can bestow the second threshold voltage VB to storage unit and by the control gate (controlgate) of storage unit whether conducting and corresponding arithmetic expression (1) judge the value of lower page of data:
LSB＝(VB)Lower_pre1 (1)
Wherein (VB) Lower_pre1 representes through bestowing the 1st nextpage validation value that the second threshold voltage VB obtains.
For example, as the second threshold voltage VB during less than the floating voltage of storage unit, the control gate of storage unit (control gate) can conducting and output valve ' 0 ' the 1st nextpage validation value, LSB can be identified as 0 thus.For example, as the second threshold voltage VB during greater than the floating voltage of storage unit, the control gate of storage unit can conducting and output valve ' 1 ' the 1st nextpage validation value, this LSB can be identified as 1 thus.That is to say, in order to present LSB be 1 floating voltage and be that 0 floating voltage can be distinguished through the second threshold voltage VB in order to present LSB.
On reading in the running of page data, Word line control circuit 204 can bestow respectively the 3rd threshold voltage VC and first threshold voltage VA to storage unit and by the control gate of storage unit whether conducting and corresponding arithmetic expression (2) judge the value that goes up page data:
MSB＝((VA)Upper_pre2)xor(～(VC)Upper_pre1)(2)
Wherein (VC) Upper_pre1 represent through bestow that the 3rd threshold voltage VC obtains the 1st on the page or leaf validation value, and (VA) Upper_pre2 represent through bestow that first threshold voltage VA obtains the 2nd on page or leaf validation value, wherein symbol "～" represent anti-phase.In addition; In this exemplary embodiment; As the 3rd threshold voltage VC during less than the floating voltage of storage unit; The control gate of storage unit can conducting and output valve ' 0 ' the 1st on page or leaf validation value ((VC) Upper_pre1), as first threshold voltage VA during less than the floating voltage of storage unit, the control gate of storage unit can conducting and output valve ' 0 ' the 2nd on page or leaf validation value ((VA) Upper_pre2).
Therefore; In this exemplary embodiment; According to arithmetic expression (2); As the 3rd threshold voltage VC and first threshold voltage VA during all less than the floating voltage of storage unit, the control gate of storage unit under the 3rd threshold voltage VC can conducting and output valve ' 0 ' the 1st on the page or leaf validation value and the control gate of storage unit under the first threshold voltage VA can conducting and output valve ' 0 ' the 2nd on the page or leaf validation value.At this moment, MSB can be identified as 1.
For example; When the 3rd threshold voltage VC greater than the floating voltage of storage unit and first threshold voltage VA less than the floating voltage of storage unit during less than the floating voltage of storage unit; The control gate of storage unit under the 3rd threshold voltage VC can conducting and output valve ' 1 ' the 1st on the page or leaf validation value, and the control gate of storage unit under the first threshold voltage VA can conducting and output valve ' 0 ' the 2nd on the page or leaf validation value.At this moment, MSB can be identified as 0.
For example; As the 3rd threshold voltage VC and first threshold voltage VA during all greater than the floating voltage of storage unit; Under the 3rd threshold voltage VC; The control gate of storage unit can conducting and output valve ' 1 ' the 1st on the page or leaf validation value, and the control gate of storage unit under the first threshold voltage VA can conducting and output valve ' 1 ' the 2nd on the page or leaf validation value.At this moment, MSB can be identified as 1.
It must be appreciated, although the present invention explains with 4 rank storage unit NAND type flash memories.Yet, the invention is not restricted to this, other multilayer storage unit NAND type flash memory also can carry out reading of data according to above-mentioned principle.
For example; With 8 rank storage unit NAND type flash memories is example (as shown in Figure 6); Each storing state comprise the least significant bit (LSB) LSB of the 1st position counting, left side, middle the significance bit of the 2nd position counting from the left side (Center Significant Bit, CSB) and the highest significant position MSB of the 3rd position of counting from the left side, wherein LSB correspondence lower page; The page in the CSB correspondence, the page on the MSB correspondence.In this example; Floating voltage in each storage unit can be divided into 8 kinds of storing states (that is, " 111 ", " 110 ", " 100 ", " 101 ", " 001 ", " 000 ", " 010 " and " 011 ") according to first threshold voltage VA, the second threshold voltage VB, the 3rd threshold voltage VC, the 4th threshold voltage VD, the 5th threshold voltage VE, the 6th threshold voltage VF and the 7th threshold voltage VG.
Fig. 7 is the summary calcspar of the Memory Controller that exemplary embodiment illustrated according to the present invention.
Please with reference to Fig. 7, Memory Controller 104 comprises memory management circuitry 702, HPI 704, memory interface 706, Error-Correcting Circuit 708 and reads voltage refresh circuit 710.
In this exemplary embodiment, the steering order of memory management circuitry 702 is to come real the work with the firmware pattern.For example, memory management circuitry 702 has microprocessor unit (not illustrating) and ROM (read-only memory) (not illustrating), and these steering orders are to be burned onto in this ROM (read-only memory).When memorizer memory devices 100 runnings, these steering orders can be carried out by microprocessor unit.
In another exemplary embodiment of the present invention; The steering order of memory management circuitry 702 can also the source code pattern be stored in the specific region (for example, being exclusively used in the system region of storage system data in the memory module) that can rewrite formula non-volatile memory module 106.In addition, memory management circuitry 702 has microprocessor unit (not illustrating), ROM (read-only memory) (not illustrating) and RAS (not illustrating).Particularly; This ROM (read-only memory) has the sign indicating number of driving section; And when Memory Controller 104 is enabled, this driving sign indicating number section of microprocessor unit execution earlier will be stored in the steering order that can rewrite in the formula non-volatile memory module 106 and be loaded in the RAS of memory management circuitry 702.Afterwards, microprocessor unit can turn round these steering orders to carry out reading, write and wiping of data.In addition, in another exemplary embodiment of the present invention, the steering order of memory management circuitry 702 can also a hardware pattern be come real the work.
Error-Correcting Circuit 708 be electrically connected to memory management circuitry 702 and in order to execution error inspection and correction program to guarantee the correctness of data.Specifically; When receiving, memory management circuitry 702 writes when instruction from host computer system 1000; Error-Correcting Circuit 708 can produce corresponding bug check and correcting code (Error Checking and Correcting Code for the corresponding data that this writes instruction; ECC Code), and memory management circuitry 702 can the corresponding data that this writes instruction be write to corresponding bug check and correcting code and can rewrite in the formula non-volatile memory module 106.Afterwards; When memory management circuitry 702 can read these data corresponding bug check and correcting code during reading of data simultaneously from can rewrite formula non-volatile memory module 106, and Error-Correcting Circuit 708 can be according to this bug check and data execution error inspection and the correction program of correcting code to being read.
Read voltage refresh circuit 710 and be the threshold voltage group that is electrically connected to memory management circuitry 702 and is adopted from can rewrite formula non-volatile memory module 106 time in order to adjustment memory management circuitry 702.The method of adjustment threshold voltage group conjunction with figs. is described in detail as after.
In the present invention's one exemplary embodiment, Memory Controller 104 also comprises memory buffer 752.Memory buffer 752 is to be electrically connected to memory management circuitry 702 and to come from the data and instruction of host computer system 1000 or come from the data that can rewrite formula non-volatile memory module 106 in order to temporary.
In the present invention's one exemplary embodiment, Memory Controller 104 also comprises electric power management circuit 754.Electric power management circuit 754 is to be electrically connected to memory management circuitry 702 and in order to the power supply of control store storage device 100.
Fig. 8 is the synoptic diagram that exemplary embodiment illustrated according to the present invention management can rewrite the formula non-volatile memory module.
Please with reference to Fig. 8, the physical page that memory management circuitry 702 can be able to rewrite formula non-volatile memory module 106 is grouped into physical page crowd 400 (0)～400 (N).In this exemplary embodiment, memory management circuitry 702 is that the physical page that belongs to same physical blocks is grouped into a physical page crowd.That is to say that in this example was implemented, the interior physical page of physical page crowd just in time was the physical page of a physical blocks.Yet; The invention is not restricted to this; In another exemplary embodiment of the present invention, memory management circuitry 702 also can be grouped into the physical page that belongs to same block face (plane) a physical page crowd or each physical page is regarded as single entities page crowd.
In this exemplary embodiment, memory management circuitry 702 can be each physical page group configuration threshold voltage group independently.For example, be in the example of 4 rank storage unit nand type memory modules with duplicative non-volatile memory module 106, each threshold voltage group comprises first threshold voltage VA, the second threshold voltage VB and the 3rd threshold voltage VC.And memory management circuitry 702 can adopt corresponding threshold voltage group to read the data in the physical page that is stored in corresponding physical page crowd.
For example, memory management circuitry 702 can be set up and read voltage table to write down corresponding each physical page crowd's threshold voltage group.And, whenever desire from physical page during reading of data, memory management circuitry 702 can be from read voltage table the threshold voltage group discerned of identification corresponding threshold voltage group and employing come reading of data.
That is to say; When in the physical page of desiring to be subordinated to physical page crowd 400 (0) during reading of data; Memory management circuitry 702 can adopt correspondent entity page crowd 400 (0) first threshold voltage VA, the second threshold voltage VB and the 3rd threshold voltage VC to come reading of data; And when in the physical page of desiring to be subordinated to physical page crowd 400 (N) during reading of data, memory management circuitry 702 can adopt first threshold voltage VA, the second threshold voltage VB and the 3rd threshold voltage VC of correspondent entity page crowds 400 (N) to come reading of data.
Particularly; In this exemplary embodiment; When data that Error-Correcting Circuit 708 can't patch memory management circuit 702 be read from a physical page; Memory management circuitry 702 can read the data that can be proofreaied and correct by Error-Correcting Circuit 708 from other physical page of same physical page crowd, and reads voltage refresh circuit 710 and can obtain corrupted bits of information with adjustment corresponding threshold voltage group according to the data that can be corrected.
Fig. 9 is the example of the reading of data that exemplary embodiment illustrates according to the present invention.
Please with reference to Fig. 9; If memory management circuitry 702 (for example desires to be subordinated to the first physical page crowd; Physical page crowd 400 (0)) first physical page (for example; Physical page 400 (0)-3) during reading of data, the step shown in the symbol among Fig. 9 (1), memory management circuitry 702 can adopt correspondent entity page crowds 400 (0) threshold voltage group to come from first physical page, to read not correction data (also being called first data).For example, if when first physical page is lower page, memory management circuitry 702 can adopt correspondent entity page crowds 400 (0) the second threshold voltage VB to discern in this physical page the value of each.For example, if when first physical page is the last page, memory management circuitry 702 can adopt correspondent entity page crowds 400 (0) first threshold voltage VA and the 3rd threshold voltage VC to discern in this physical page the value of each.
After accomplishing the reading of data; Error-Correcting Circuit 708 can carry out error-correcting routine according to bug check and the correcting code of the corresponding not correction data that is read, and whether the not correction data that can judgements be read of memory management circuitry 702 can be corrected and produce correction data.If when the not correction data that is read can't be corrected, memory management circuitry 702 can be from first physical page being the center diffusion, and reading of data from other contiguous physical page is till the data that read can be proofreaied and correct by Error-Correcting Circuit 708.
For example, the step shown in symbol among Fig. 9 (2), memory management circuitry 702 reads not correction data earlier from physical page 400 (0)-4.When if the not correction data that from physical page 400 (0)-4, reads still can't be corrected, the step shown in symbol among Fig. 9 (3), memory management circuitry 702 can read not correction data again from physical page 400 (0)-2.When if the not correction data that from physical page 400 (0)-2, is read still can't be corrected, the step shown in symbol among Fig. 9 (3), memory management circuitry 702 can read not correction data again from physical page 400 (0)-5, by that analogy.At last; If (for example from second physical page; Physical page 400 (0)-5) the not correction data that is read in (also being called second data) can be corrected and when producing the correction data of corresponding second physical page, and memory management circuitry 702 can send the not correction data of corresponding second physical page and correction data to and read voltage refresh circuit 710.
Afterwards, reading voltage refresh circuit 710 can produce bucking voltage and the threshold voltage of corresponding second physical page is updated to the adjusted threshold voltage according to the not correction data of corresponding second physical page and correction data.
Specifically, read each and the identification error bit wherein that voltage refresh circuit 710 can be compared the not correction data of corresponding second physical page and correction data in order.This so-called error bit be meant one should be a certain state the position and the erroneous judgement for belonging to another state.And the error bit type that reads 710 these error bits of meeting statistics of voltage refresh circuit produces bucking voltage with the adjustment threshold voltage as corrupted bits of information and according to corrupted bits of information.
Figure 10 is the synoptic diagram of the type of error of the mistake of statistics position that exemplary embodiment illustrated according to the present invention.
Please with reference to Figure 10; With 4 rank storage unit NAND type flash memories is example; It is in order to difference storing state " 11 " and storing state " 10 " that first information reads voltage VA, and the second threshold voltage VB is to be in order to difference storing state " 00 " and storing state " 01 " in order to difference storing state " 10 " with storing state " 00 " and the 3rd threshold voltage VC.At this, the state on the threshold voltage left side is called first storing state, and the state on threshold voltage the right is called second storing state.
Particularly; Read voltage refresh circuit 710 and can be each threshold voltage; Statistics should be first storing state and the storage unit position that is mistaken for second storing state (promptly; The first error bit type) number, and add up the number that should be second storing state and be mistaken for the storage unit (that is the second error bit type) of first storing state.
Shown in figure 10, block 1002 expression should be storing state " 10 " and is mistaken for the storage unit of storing state " 11 ", and block 1004 expressions should be storing state " 11 " and are mistaken for the storage unit of storing state " 10 ".Particularly, read the bucking voltage that voltage refresh circuit 710 can produce corresponding first threshold voltage VA according to the number of the error bit of the number of the error bit of corresponding block 1002 among the error bit of being discerned and corresponding block 1004.And reading voltage refresh circuit 710 can add first threshold voltage the bucking voltage of being calculated and become new first threshold voltage VA (that is adjusted threshold voltage).
For example, reading voltage refresh circuit 710 is to use following formula (3) to calculate bucking voltage:
Wherein x represents bucking voltage; G represents constant; Error2 represents the number that should be second storing state and be mistaken for the storage unit of first storing state, and error1 represents the number that should be first storing state and be mistaken for the storage unit position of second storing state.
Similarly, read the bucking voltage VB that voltage refresh circuit 710 can produce corresponding second threshold voltage according to the number of the error bit of the number of the error bit of corresponding block 1006 among the error bit of being discerned and corresponding block 1008.And reading voltage refresh circuit 710 can add the second threshold voltage VB bucking voltage of being calculated and become the second new threshold voltage VB.
Same, read the bucking voltage VC that voltage refresh circuit 710 can produce corresponding the 3rd threshold voltage according to the number of the error bit of the number of the error bit of corresponding block 1010 among the error bit of being discerned and corresponding block 1012.And reading voltage refresh circuit 710 can add the 3rd threshold voltage VC the bucking voltage of being calculated and become the 3rd new threshold voltage VC.
Then; Memory management circuitry 702 can adopt after upgrading threshold voltage (that is adjusted threshold voltage) once more from first physical page reading of data ((5) as shown in Figure 9) and Error-Correcting Circuit 708 can proofread and correct these data and obtain the correction data of corresponding first physical page.
Specifically; Because contiguous physical page has similar physical characteristics, therefore when data that a certain physical page read can't be corrected, by the corrupted bits of information of analyzing its vicinity physical page; Adjust threshold voltage, more correctly reading of data.
Figure 11 is the process flow diagram of the method for reading data that exemplary embodiment illustrated according to the present invention.
Please with reference to Figure 11, in step S1101, memory management circuitry 702 can from a target entity page, read not correction data according to reading in the voltage table corresponding threshold voltage group.And in step S1103, memory management circuitry 702 can judge this not correction data whether can proofread and correct and produce the correction data of this physical page of correspondence by Error-Correcting Circuit 708.
When if correction data can not be corrected, in step S1105, memory management circuitry 702 can be exported correction data.
When if correction data can't not be corrected, in step S1107, memory management circuitry 702 can read not correction data in contiguous physical page.How to select contiguous physical page to come reading of data, described as above, no longer be repeated in this description at this.
Afterwards, can judge in step S1109 whether the not correction data that is read can be proofreaied and correct by Error-Correcting Circuit 708.If when the not correction data that is read can't be corrected, step S1107 can be performed once more.
If when the not correction data that is read can be corrected, in step S1111, reading voltage refresh circuit 710 can these corresponding not correction data of comparison and correction data, and obtains corrupted bits of information.
Afterwards, in step S1113, read voltage refresh circuit 710 and can calculate bucking voltage, and adjust data bit according to the bucking voltage of being calculated and read voltage according to the corrupted bits of information that is produced.
Then, in step S1115, memory management circuitry 7002 can read voltage according to the adjusted data bit and upgrade and read data bit corresponding in the voltage table and read the voltage group.
Then, step S1101 can be performed, to attempt reading of data from the target entity page once more.
For example; In the present invention's one exemplary embodiment; Memory management circuitry 7002 can read the voltage group and attempt reading again the data in the target entity page according to the data bit of constantly adjustment; And in the time of after reading a pre-determined number, can't obtaining the correction data of corresponding this target entity page, the output error message.
In sum, the method for reading data of exemplary embodiment of the present invention and use memorizer memory devices and the Memory Controller of the method to read voltage and come more correctly reading of data according to appropriate data position more.In addition; When Error-Correcting Circuit can't be with the timing successfully of correction data not; Read voltage by adjusting data bit, can obtain corresponding correction data, promote the degree of stability of data storing thus according to the corrupted bits of information of obtaining from its contiguous physical page.
Though the present invention discloses as above with embodiment; Right its is not in order to qualification the present invention, those skilled in the art, under the premise without departing from the spirit and scope of the present invention; Can do some changes and retouching, so protection scope of the present invention is to be as the criterion with claim of the present invention.
Claims (30)
1. a method for reading data is used for one and can rewrites the formula non-volatile memory module, and wherein this can rewrite the formula non-volatile memory module and has a plurality of physical page, and this method for reading data comprises:
These physical page are grouped into a plurality of physical page crowds;
For each these physical page crowd sets a threshold voltage group, wherein each these hyte data read power taking pressure group comprises a plurality of threshold voltages;
Use corresponding these threshold voltage groups reading of data from these physical page of these physical page crowd respectively; And
The data that when one of them physical page of one of them the physical page crowd among these physical page crowd, read can't be come timing by an Error-Correcting Circuit, upgrade this threshold voltage group that should one of them physical page crowd.
2. method for reading data as claimed in claim 1 also comprises:
Set up one and read voltage table, to write down pairing these threshold voltage groups of these physical page crowd.
3. method for reading data as claimed in claim 1, the step of wherein upgrading this threshold voltage group that should one of them physical page crowd comprises:
Use is obtained from another physical page of this one of them physical page crowd a correction data not that should another physical page this threshold voltage group that should one of them physical page crowd; This another contiguous this one of them physical page of physical page wherein, and to should another physical page this not correction data can proofread and correct and produce by this Error-Correcting Circuit a correction data that should another physical page;
By comparison to should another physical page this not correction data and this correction data obtain a corrupted bits of information;
Calculate at least one bucking voltage according to this corrupted bits of information; And
Adjust at least one threshold voltage in should this threshold voltage group of one of them physical page crowd by this at least one bucking voltage.
4. a method for reading data is used for one and can rewrites the formula non-volatile memory module, and wherein this can rewrite the formula non-volatile memory module and has in regular turn a plurality of physical page of arranging, and this method for reading data comprises:
Use one first physical page of at least one threshold voltage among these physical page and obtain one first data;
Judge that whether these first data can proofread and correct by an Error-Correcting Circuit and produce one first correction data that should first physical page;
If these first data can't by this Error-Correcting Circuit proofread and correct and produce to should first physical page this during correction data; Obtain one second data one second physical page among these physical page; Wherein contiguous this first physical page of this second physical page, and these second data can proofread and correct and produce one second correction data that should second physical page by this Error-Correcting Circuit;
By these second data of comparison with to should second physical page this second correction data obtain a corrupted bits of information;
Calculate at least one bucking voltage according to this corrupted bits of information;
By this at least one bucking voltage this at least one threshold voltage is adjusted at least one adjusted threshold voltage; And
Use this at least one adjusted threshold voltage to obtain another first data and proofread and correct this another first data to produce to this first correction data that should first physical page by this Error-Correcting Circuit from this first physical page.
5. method for reading data as claimed in claim 4, wherein these second data have a plurality of position, and each these to one of them of a plurality of storing states that should rewrite the formula non-volatile memory module,
Wherein these storing states comprise a first threshold voltage among one first storing state and one second storing state and this at least one threshold voltage in order to distinguishing this first storing state and this two storing state,
Wherein by these second data of comparison with to should second physical page this second the correction data step that obtains this corrupted bits of information comprise:
Find out among these of this second data and these second corresponding position a plurality of error bits inequality of correction data;
Add up the number that belongs to the error bit of one first error bit kenel among these error bits, the error bit that wherein belongs to this first error bit kenel is that reply should first storing state but be mistaken as position that should second storing state;
Add up the number that belongs to the error bit of one second error bit kenel among these error bits, the error bit that wherein belongs to this second error bit kenel is that reply should second storing state but be mistaken as position that should first storing state; And
Number and the number of error bit that belongs to this second error bit kenel of error bit that will belong to this first error bit kenel is as this corrupted bits of information.
6. method for reading data as claimed in claim 5, wherein the step according to this this at least one bucking voltage of corrupted bits of information calculating comprises:
Calculate one first bucking voltage among this at least one bucking voltage according to the number of the error bit that belongs to this first error bit kenel and the number that belongs to the error bit of this second error bit kenel.
7. method for reading data as claimed in claim 6 wherein comprises the step that this at least one threshold voltage is adjusted to this at least one adjusted threshold voltage by this at least one bucking voltage:
Use this first bucking voltage that this first threshold voltage is adjusted to one first adjusted threshold voltage among this at least one adjusted threshold voltage.
8. method for reading data as claimed in claim 4 also comprises:
Set up one and read voltage table, with this at least one adjusted threshold voltage of record.
9. method for reading data as claimed in claim 8 also comprises:
These physical page are grouped into a plurality of physical page crowds,
Wherein this first physical page and this second physical page belong to one first physical page crowd among these physical page crowd, and this at least one adjusted threshold voltage is to should the first physical page crowd.
10. method for reading data as claimed in claim 9 also comprises:
Reading voltage table according to this uses this at least one adjusted threshold voltage to read other physical page that belong to this first physical page crowd.
11. a Memory Controller is used to control one and can rewrites the formula non-volatile memory module, wherein this can rewrite the formula non-volatile memory module and has a plurality of physical page, and this Memory Controller comprises:
One memory management circuitry; In order to these physical page are grouped into a plurality of physical page crowds; For each these physical page crowd sets a threshold voltage group and uses corresponding these threshold voltage groups reading of data from these physical page of these physical page crowd respectively, wherein each these hyte data read power taking pressure group comprises a plurality of threshold voltages;
One HPI electrically connects this memory management circuitry;
One memory interface electrically connects this memory management circuitry, and can rewrite the formula non-volatile memory module in order to be electrically connected to this;
One Error-Correcting Circuit electrically connects this memory management circuitry; And
One reads the voltage refresh circuit, is electrically connected to this memory management circuitry,
The data that wherein read when one of them physical page of one of them physical page crowd of this memory management circuitry among these physical page crowd can't be come timing by this Error-Correcting Circuit, and this reads the voltage refresh circuit and can upgrade this threshold voltage group that should one of them physical page crowd.
12. Memory Controller as claimed in claim 11, wherein this memory management circuitry also reads voltage table in order to set up one, to write down pairing these threshold voltage groups of these physical page crowd.
13. Memory Controller as claimed in claim 11; Wherein this memory management circuitry is used this threshold voltage group that should one of them physical page crowd is obtained from another physical page of this one of them physical page crowd a correction data not that should another physical page; Wherein this another physical page is close to this one of them physical page
Wherein this Error-Correcting Circuit proofread and correct to should another physical page this not correction data proofread and correct a correction data that produces should another physical page,
Wherein this read voltage refresh circuit comparison to should another physical page this not correction data and this correction data obtain a corrupted bits of information,
Wherein this reads the voltage refresh circuit and calculates at least one bucking voltage according to this corrupted bits of information,
Wherein this reads the voltage refresh circuit and uses this at least one bucking voltage to adjust at least one threshold voltage in should this threshold voltage group of one of them physical page crowd.
14. a Memory Controller is used to control one and can rewrites the formula non-volatile memory module, wherein this can rewrite the formula non-volatile memory module and has in regular turn a plurality of physical page of arranging, and this Memory Controller comprises:
One memory management circuitry;
One HPI electrically connects this memory management circuitry;
One memory interface electrically connects this memory management circuitry, and can rewrite the formula non-volatile memory module in order to be electrically connected to this;
One Error-Correcting Circuit electrically connects this memory management circuitry; And
One reads the voltage refresh circuit, is electrically connected to this memory management circuitry,
Wherein this memory management circuitry is obtained one first data in order to use one first physical page of at least one threshold voltage among these physical page; And judge this Error-Correcting Circuit whether these first data of recoverable produce one first correction data that should first physical page
If wherein this Error-Correcting Circuit can't proofread and correct these first data produce to should first physical page this during correction data; This memory management circuitry is also in order to obtain one second data one second physical page among these physical page; Wherein this second physical page is close to this first physical page; And these second data can be proofreaied and correct by this Error-Correcting Circuit and produced one second correction data that should second physical page
Wherein this read the voltage refresh circuit in order to compare these second data with to should second physical page this second correction data obtain a corrupted bits of information, and calculate at least one bucking voltage according to this corrupted bits of information,
Wherein this reads the voltage refresh circuit and also in order to this at least one bucking voltage of basis this at least one threshold voltage is adjusted at least one adjusted threshold voltage,
Wherein this memory management circuitry is also proofreaied and correct this another first data to produce this first correction data that should first physical page in order to use this at least one adjusted threshold voltage to obtain another first data and this Error-Correcting Circuit from this first physical page.
15. Memory Controller as claimed in claim 14, wherein these second data have a plurality of position, and each these to one of them of a plurality of storing states that should rewrite the formula non-volatile memory module,
Wherein these storing states comprise a first threshold voltage among one first storing state and one second storing state and this at least one threshold voltage in order to distinguishing this first storing state and this two storing state,
Wherein this reads the voltage refresh circuit in order to find out among these of this second data and these second corresponding position a plurality of error bits inequality of correction data; Add up the number that belongs to the error bit of one first error bit kenel among these error bits; The number of number and the error bit that belongs to this second error bit kenel of error bit of adding up the number of the error bit that belongs to one second error bit kenel among these error bits and will belonging to this first error bit kenel is as this corrupted bits of information
The error bit that wherein belongs to this first error bit kenel is that reply should first storing state but be mistaken as position that should second storing state,
The error bit that wherein belongs to this second error bit kenel is that reply should second storing state but be mistaken as position that should first storing state.
16. Memory Controller as claimed in claim 15, wherein this reads the voltage refresh circuit and calculates one first bucking voltage among this at least one bucking voltage according to the number of the error bit that belongs to this first error bit kenel and the number that belongs to the error bit of this second error bit kenel.
17. Memory Controller as claimed in claim 16, wherein this reads the voltage refresh circuit and uses this first bucking voltage that this first threshold voltage is adjusted to one first adjusted threshold voltage among this at least one adjusted threshold voltage.
18. Memory Controller as claimed in claim 14, wherein this memory management circuitry also reads voltage table in order to set up one, with this at least one adjusted threshold voltage of record.
19. Memory Controller as claimed in claim 18, wherein this memory management circuitry is also in order to being grouped into a plurality of physical page crowds with these physical page,
Wherein this first physical page and this second physical page belong to one first physical page crowd among these physical page crowd, and to read in the voltage table this at least one adjusted threshold voltage at this be to should the first physical page crowd.
20. Memory Controller as claimed in claim 19, wherein this memory management circuitry reads this at least one adjusted threshold voltage of voltage table use according to this and reads other physical page that belong to this first physical page crowd.
21. a memorizer memory devices comprises:
A connector is in order to be electrically connected to a host computer system;
One can rewrite the formula non-volatile memory module, has a plurality of physical page; And
One Memory Controller is electrically connected to this connector and this can rewrite the formula non-volatile memory module and have an Error-Correcting Circuit,
Wherein this Memory Controller is in order to be grouped into a plurality of physical page crowds with these physical page; For each these physical page crowd sets a threshold voltage group and uses corresponding these threshold voltage groups reading of data from these physical page of these physical page crowd respectively, wherein each these hyte data read power taking pressure group comprises a plurality of threshold voltages;
The data that wherein read when one of them physical page of one of them physical page crowd of this Memory Controller among these physical page crowd can't be come timing by this Error-Correcting Circuit, and this Memory Controller can upgrade this threshold voltage group that should one of them physical page crowd.
22. memorizer memory devices as claimed in claim 21, wherein this Memory Controller also reads voltage table in order to set up one, to write down pairing these threshold voltage groups of these physical page crowd.
23. memorizer memory devices as claimed in claim 21; Wherein this Memory Controller uses this threshold voltage group that should one of them physical page crowd is obtained from another physical page of this one of them physical page crowd a correction data not that should another physical page; Wherein this another physical page is close to this one of them physical page
Wherein this Error-Correcting Circuit proofread and correct to should another physical page this not correction data proofread and correct a correction data that produces should another physical page,
Wherein the comparison of this Memory Controller to should another physical page this not correction data and this correction data obtain a corrupted bits of information; Calculate at least one bucking voltage according to this corrupted bits of information, and use this at least one bucking voltage to adjust at least one threshold voltage in should this threshold voltage group of one of them physical page crowd.
24. a memorizer memory devices comprises:
A connector is in order to be electrically connected to a host computer system;
One can rewrite the formula non-volatile memory module, has a plurality of physical page of arranging in regular turn; And
One Memory Controller is electrically connected to this connector and this can rewrite the formula non-volatile memory module and have an Error-Correcting Circuit,
Wherein this Memory Controller obtains one first data in order to use one first physical page of at least one threshold voltage among these physical page; And judge this Error-Correcting Circuit whether these first data of recoverable produce one first correction data that should first physical page
If wherein this Error-Correcting Circuit can't proofread and correct these first data produce to should first physical page this during correction data; This Memory Controller is also in order to obtain one second data one second physical page among these physical page; Wherein this second physical page is close to this first physical page; And these second data can be proofreaied and correct by this Error-Correcting Circuit and produced one second correction data that should second physical page
Wherein this Memory Controller also in order to compare these second data with to should second physical page this second correction data obtain a corrupted bits of information; Calculate at least one bucking voltage according to this corrupted bits of information; And this at least one threshold voltage is adjusted at least one adjusted threshold voltage according to this at least one bucking voltage
Wherein this Memory Controller is also proofreaied and correct this another first data to produce this first correction data that should first physical page in order to use this at least one adjusted threshold voltage to obtain another first data and this Error-Correcting Circuit from this first physical page.
25. memorizer memory devices as claimed in claim 24, wherein these second data have a plurality of position, and each these to one of them of a plurality of storing states that should rewrite the formula non-volatile memory module,
Wherein these storing states comprise a first threshold voltage among one first storing state and one second storing state and this at least one threshold voltage in order to distinguishing this first storing state and this two storing state,
Wherein this Memory Controller is in order to find out among these of this second data and these second corresponding position a plurality of error bits inequality of correction data; Add up the number that belongs to the error bit of one first error bit kenel among these error bits; The number of number and the error bit that belongs to this second error bit kenel of error bit of adding up the number of the error bit that belongs to one second error bit kenel among these error bits and will belonging to this first error bit kenel is as this corrupted bits of information
The error bit that wherein belongs to this first error bit kenel is that reply should first storing state but be mistaken as position that should second storing state,
The error bit that wherein belongs to this second error bit kenel is that reply should second storing state but be mistaken as position that should first storing state.
26. memorizer memory devices as claimed in claim 25, wherein this Memory Controller calculates one first bucking voltage among this at least one bucking voltage according to the number of the error bit that belongs to this first error bit kenel and the number that belongs to the error bit of this second error bit kenel.
27. memorizer memory devices as claimed in claim 26, wherein this Memory Controller uses this first bucking voltage that this first threshold voltage is adjusted to one first adjusted threshold voltage among this at least one adjusted threshold voltage.
28. memorizer memory devices as claimed in claim 24, wherein this Memory Controller also reads voltage table in order to set up one, with this at least one adjusted threshold voltage of record.
29. memorizer memory devices as claimed in claim 28, wherein this Memory Controller is also in order to being grouped into a plurality of physical page crowds with these physical page,
Wherein this first physical page and this second physical page belong to one first physical page crowd among these physical page crowd, and to read in the voltage table this at least one adjusted threshold voltage at this be to should its first physical page crowd.
30. memorizer memory devices as claimed in claim 29, wherein this Memory Controller reads this at least one adjusted threshold voltage of voltage table use according to this and reads other physical page that belong to this first physical page crowd.
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