CN102508726A - Memory parameter configuration method, processor and equipment - Google Patents
Memory parameter configuration method, processor and equipment Download PDFInfo
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Abstract
The invention provides a memory parameter configuration method, a processor and equipment. The method includes: configuration parameters are subjected to memory read-write testing by the aid of the processor according to preset step length and pre-stored initial values of the configuration parameters to acquire the maximum configuration value and the minimum configuration value of the configuration parameters; the processor numerically computes the maximum configuration value and the minimum configuration value to acquire the optimum configuration value of the configuration parameters; and the processor writes the optimum configuration value of the configuration parameters into a memory controller and a memory device respectively. The memory parameter configuration method solves the problem that configuration parameters higher in accuracy cannot be acquired due to limits of external tool technique, self-adaption configuration of the configuration parameters can be realized, and accuracy of the configured parameters is improved.
Description
Technical field
The present invention relates to the communication technology, relate in particular to a kind of memory parameters collocation method, processor and equipment.
Background technology
General communication system all needs the processor of integrated multiple peripheral control unit, is commonly referred to as flush bonding processor.Flush bonding processor needs mass storage, abbreviates internal memory as, is used to preserve the working procedure and the data of flush bonding processor.Storer commonly used at present has synchronous DRAM (Synchronous Dynamic Radom Access Memory; Abbreviate as: SDRAM), double data rate synchronous DRAM (Double Data Rate SDRAM; DDR SDRAM), second generation double data rate synchronous DRAM (DDR2 SDRAM), third generation double data rate synchronous DRAM (DDR3 SDRAM) abbreviate as:; The operation rate that these storeies allowed is increasingly high, and it controls action and also becomes increasingly complex.
Flush bonding processor is managed memory device through the Memory Controller Hub of relevant art.Adopt one group of electric signal line to connect between Memory Controller Hub and the memory devices, this organizes electric signal line generally has the clock signal of user's synchronous working rhythm, command-control signal, address signal, data-signal etc.In order to make Memory Controller Hub and the memory devices can collaborative work, defined the standard signal transformat of various strictnesses between the two, comprise the precedence relationship (abbreviating sequential as) that signal beat changes.The electrical specification that the sequential of these signals receives Memory Controller Hub, memory devices, connect both printed board cablings influences, and also receives Effect of Environmental such as outside temperature, humidity, electromagnetic interference (EMI) simultaneously.In order to eliminate these influences; Need in Memory Controller Hub with in the memory devices, dispose certain parameter; After this group parameter configuration, can make the sequential relationship operation of Memory Controller Hub and memory devices, thereby make correctly access memory device of Memory Controller Hub according to standard.It is often relatively more difficult that the time sequence parameter of correct allocate memory controller and memory devices makes it steady operation, and it is also relatively more difficult how to obtain the proper configuration parameter.
At present, obtain with the method for the configuration parameter of allocate memory controller and memory devices often: in specific embedded system,, choose specific memory devices and cooperate with it to specific flush bonding processor.Choose multiple possible memory configurations parameter then; By external tool (like oscillograph); Test memory controller and the memory devices time sequential routine under each possible configuration parameter; Contrast these time sequential routine graphs of a relation, choose pairing that set of configuration parameters of timing diagram of standard.Store this set of configuration parameters into non-volatile ROM (read-only memory) (Read-Only Memory; Abbreviate as: ROM).Flush bonding processor is each start after, this group parameter read from ROM be written in Memory Controller Hub and the memory devices, it is moved according to preset sequential relationship operation.
Said method is through repeatedly testing the configuration parameter that obtains Memory Controller Hub and internal memory by external tool (like oscillograph).Yet development along with technology; Frequency of operation between Memory Controller Hub and the memory devices is increasingly high; And the Oscillation Amplitude value of their electric signal is more and more lower, and has testing tool now owing to technical reason, and its sampling precision can't promote along with the fast lifting of memory techniques; Therefore can't accurately test out the configuration parameter that needs configuration, the parameter value that often tests out has bigger deviation with actual working condition.
Summary of the invention
The present invention provides a kind of memory parameters collocation method, processor and equipment, in order to solve because of receiving the external test tools technology limitation can't obtain the problem of the higher configuration parameter of accuracy, improves the accuracy of configuration parameter.
The present invention provides a kind of memory parameters collocation method, comprising:
Processor carries out memory read-write to said configuration parameter and tests according to the preset step-length and the initial value of stored configuration parameters in advance, obtains the maximum configured value and the minimal configuration value of said configuration parameter;
Said processor carries out numerical evaluation to said maximum configured value and said minimal configuration value, obtains the best configuration value of said configuration parameter;
Said processor is with the best configuration value difference write memory controller and the memory devices of said configuration parameter.
The present invention provides a kind of processor, comprising:
First acquisition module is used for said configuration parameter being carried out memory read-write testing according to the preset step-length and the initial value of stored configuration parameters in advance, obtains the maximum configured value and the minimal configuration value of said configuration parameter;
Second acquisition module is used for said maximum configured value and said minimal configuration value are carried out numerical evaluation, obtains the best configuration value of said configuration parameter;
Configuration module is used for best configuration value difference write memory controller and memory devices with said configuration parameter.
The present invention provides a kind of equipment, comprising: Memory Controller Hub, memory devices and arbitrary processor provided by the invention.
Memory parameters collocation method of the present invention, processor and equipment; By initial value and the preset step-length of processor according to configuration parameter; Configuration parameter is carried out the memory read-write test; Obtain maximum configured value and minimal configuration value according to the readwrite tests result, and, realize configuration configuration parameter with in maximum configured value and the best configuration value difference write memory controller and memory devices of minimal configuration value The numerical results as configuration parameter; Owing to do not re-use external tool; Solve the problem that receives the external tool technical limitation and can't get access to the higher configuration parameter of accuracy, realized the adaptive configuration of configuration parameter, improved the accuracy of the configuration parameter that is disposed.
Description of drawings
The process flow diagram of the memory parameters collocation method that Fig. 1 provides for one embodiment of the invention;
Fig. 2 A is the process flow diagram of a kind of embodiment of the step 101 that provides of one embodiment of the invention;
Fig. 2 B is that the processor that one embodiment of the invention provides is controlled Memory Controller Hub carries out a kind of embodiment of read-write operation to memory devices according to the configuration parameter after increasing progressively or according to the configuration parameter after successively decreasing process flow diagram;
Fig. 2 C is that the processor that one embodiment of the invention provides is controlled Memory Controller Hub carries out the another kind of embodiment of read-write operation to memory devices according to the configuration parameter after increasing progressively or according to the configuration parameter after successively decreasing process flow diagram;
The process flow diagram of the memory parameters collocation method that Fig. 3 provides for another embodiment of the present invention;
The process flow diagram of the memory parameters collocation method that Fig. 4 provides for further embodiment of this invention;
The structural representation of the processor that Fig. 5 provides for one embodiment of the invention;
The structural representation of the processor that Fig. 6 provides for another embodiment of the present invention;
The structural representation of the equipment that Fig. 7 provides for one embodiment of the invention.
Embodiment
The process flow diagram of the memory parameters collocation method that Fig. 1 provides for one embodiment of the invention.As shown in Figure 1, the method for present embodiment comprises:
In the present embodiment, processor can be flush bonding processor, but is not limited thereto.This processor comprises jumbo storer, i.e. memory devices, and through Memory Controller Hub memory devices is controlled.
Generally, behind the Memory Controller Hub electrification reset of processor, the configuration parameter of all in store one group of acquiescence, and each configuration parameter all has initial value.The configuration parameter of this group acquiescence is stored in advance.The initial value of each configuration parameter generally is to be obtained through statistical computation by the deviser of processor.The initial value of each configuration parameter generally all drops in the span of this configuration parameter; Can make Memory Controller Hub normal access memory devices; But can not guarantee Memory Controller Hub in any environment reliably the institute of access memory device have living space; That is to say that the initial value of each configuration parameter is not the best configuration value.
In the present embodiment, processor can be earlier be kept at the initial value of each default configuration parameter in the non-volatile ROM.So that carry out the memory read-write test.
In the present embodiment, processor all carries out memory read-write test to each configuration parameter, and for each configuration parameter all obtains the best configuration value, and it is identical that each configuration parameter is carried out the method for memory read-write test.In the present embodiment; In order to obtain the best configuration value of each configuration parameter, the step-length the when value that has preestablished configuration parameter gradually changes is based on this; Processor is beginning with the initial value of each configuration parameter; Increase or reduce the value of configuration parameter gradually according to preset step-length, and control Memory Controller Hub and when configuration parameter is got each value, memory devices is carried out read-write operation, promptly carry out the memory read-write test; According to the result of read-write operation, obtain the maximum configured value and the minimal configuration value of each configuration parameter.Processor can also store the maximum configured value and the minimal configuration value of each configuration parameter among the ROM into.
In the present embodiment, the maximum configured value of each configuration parameter is when carrying out the memory read-write test according to the value that step-length increases configuration parameter gradually, the value of configuration parameter corresponding when test crash occurring for the first time.The minimal configuration value of each configuration parameter is when carrying out the memory read-write test according to the value that step-length reduces configuration parameter gradually, the value of configuration parameter corresponding when test crash occurring for the first time.Wherein, The maximum configured value and the minimal configuration value of each configuration parameter are not limited to above-mentioned obtain manner; Can also be other obtain manners, for example can set the number of times of increasing or decreasing, and will arrive the increasing or decreasing number of times time value of configuration parameter as maximum configured value or minimal configuration value.
Wherein, Processor carries out numerical evaluation to maximum configured value and minimal configuration value; The method of obtaining the best configuration value of configuration parameter comprises: after the maximum configured value of obtaining each configuration parameter and minimal configuration value; Processor is made even all to maximum configured value and the minimal configuration value obtained, with the mean value of the maximum configured value of configuration parameter and the minimal configuration value best configuration value as this configuration parameter.This mode is simple, be easy to realize, and the best configuration value accuracy of being obtained is higher.
In this explanation; Processor carries out numerical evaluation to the maximum configured value and the minimal configuration value of configuration parameter; The mode of obtaining the best configuration value of configuration parameter is not limited to make even all a kind of; Can also be other modes, as obtaining the best configuration value, for example: best configuration value=maximum configured value x0.6+ minimal configuration value x0.4 through the method for maximum configured value and the weighted sum of minimal configuration value.
After obtaining the best configuration value of configuration parameter; Processor is with the best configuration value difference write memory controller and the memory devices of configuration parameter; Realization is to the configuration of the configuration parameter of Memory Controller Hub and memory devices; Thereby make Memory Controller Hub can according to the configuration parameter that is disposed correct memory devices is carried out read-write operation, improve the success ratio of Memory Controller Hub read/write memory device.
In the present embodiment, processor is according to the initial value of stored configuration parameters, the progressively value of increasing or decreasing configuration parameter in advance in preset step-length and the Memory Controller Hub; And the control Memory Controller Hub carries out read-write operation to memory devices under the situation of every kind of value; Realization is to the test of the memory read-write of configuration parameter, obtains the maximum configured value and the minimal configuration value of configuration parameter according to test result, and obtains the best configuration value according to maximum configured value and minimal configuration value; Completion is to the configuration of the parameter of Memory Controller Hub and memory devices; Realized the adaptive configuration of configuration parameter, no longer relied on external test tools, the accuracy that has solved configuration parameter receives the problem of external test tools restriction; Improve the accuracy of the configuration parameter value that is disposed, and then improved Memory Controller Hub carries out read-write operation to memory devices success ratio.
In addition; The sequential relationship of Memory Controller Hub and memory devices and environment have stronger correlativity, and under different environment, required configuration parameter value has than big-difference; In order to reach best sequential relationship; Prior art need be reused external test tools and test, and uses the method for the configuration parameter value that external test tools obtains quite inconvenient, and present embodiment can be accomplished the obtaining and disposing of best configuration value of configuration parameter voluntarily by processor; Do not receive the restriction of external test tools; When environment changes, can reconfigure at any time, improve Memory Controller Hub and memory devices are carried out the dirigibility of parameter configuration, guarantee is provided for the sequential relationship between Memory Controller Hub and the memory devices all reaches the best under varying environment.
Moreover because the update of internal memory technology is very fast, so the update of memory devices is also very fast; The memory devices of processor system also will often be changed; The electrical specification of the memory devices of changing is certain to produce difference, therefore, and memory devices of every replacing; Just need test again, confirm the value of configuration parameter again.Prior art is used the value of ROM storage configuration parameter, so memory devices of every replacing just needs to change a ROM, this operation is not only time-consuming but also require great effort.And present embodiment is owing to no longer rely on external test tools; Making becomes to the test of configuration parameter and configuration simply is easy to carry out; Make processor can be directly with the best configuration value write memory controller and the memory devices of the configuration parameter that obtains; Can test get final product with configuration operation carrying out once when needs reconfigure, with the operation compared of replacing ROM, be time saving and energy saving many.
Fig. 2 A is the process flow diagram of a kind of embodiment of the step 101 that provides of one embodiment of the invention.Shown in Fig. 2 A, this embodiment comprises:
Wherein, step 101a is used to obtain the maximum configured value of configuration parameter, so the value of configuration parameter is increased progressively according to a fixed step size (i.e. first step-length) gradually; Step 101b is used to obtain the minimal configuration value of configuration parameter, so the value of configuration parameter is successively decreased according to a fixed step size (i.e. second step-length) gradually.
In the present embodiment, second step-length of first step-length when configuration parameter increases progressively when successively decreasing can be identical, also can be different.
Wherein, In step 101a; Processor whenever increases progressively a step-length with configuration parameter by initial value; Configuration parameter write memory controller and memory devices after just will increasing progressively, and memory devices is carried out read-write operation at the configuration parameter that whenever writes after a configuration parameter after increasing progressively is just controlled increasing progressively that Memory Controller Hub writes according to this are then followed by judging the whether success of this read-write operation; When read-write operation unsuccessful (promptly read-write operation gets nowhere for the first time) occurring, with this moment configuration parameter value as its maximum configured value.
In addition; In step 101a; Processor begins configuration parameter to increase progressively gradually by initial value, obtains the configuration parameter behind a plurality of the increasing progressively, in configuration parameter behind a plurality of the increasing progressively write memory controller together and memory devices; And the control Memory Controller Hub according to the ascending order of the value of configuration parameter successively according to write increase progressively after configuration parameter memory devices is carried out read-write operation; And followed by judging the whether success of each read-write operation, when read-write operation unsuccessful (promptly read-write operation gets nowhere for the first time) occurring, with this moment configuration parameter value as its maximum configured value.In this embodiment, require processor can from the configuration parameter behind a plurality of the increasing progressively that is obtained, determine the maximum configured value of configuration parameter.
Wherein, In step 101b; Processor with configuration parameter by the initial value step-length of whenever successively decreasing; Configuration parameter write memory controller and memory devices after just will successively decreasing, and memory devices is carried out read-write operation at the configuration parameter that whenever writes after a configuration parameter after successively decreasing is just controlled successively decreasing that Memory Controller Hub writes according to this are then followed by judging the whether success of this read-write operation; When read-write operation unsuccessful (promptly read-write operation gets nowhere for the first time) occurring, with this moment configuration parameter value as its minimal configuration value.
In addition; In step 101b; Processor begins configuration parameter to successively decrease gradually by initial value, obtains the configuration parameter behind a plurality of the successively decreasing, in configuration parameter behind a plurality of the successively decreasing write memory controller together and memory devices; And the control Memory Controller Hub according to the descending order of the value of configuration parameter successively according to write successively decrease after configuration parameter memory devices is carried out read-write operation; And followed by judging the whether success of each read-write operation, when read-write operation unsuccessful (promptly read-write operation gets nowhere for the first time) occurring, with this moment configuration parameter value as its minimal configuration value.In this embodiment, require processor can from the configuration parameter behind a plurality of the successively decreasing that is obtained, determine the minimal configuration value of configuration parameter.
Present embodiment is the execution sequence of conditioning step 101a and step 101b not; Except the executive mode of present embodiment; The operation of all right first execution in step 101b, and then the operation of execution in step 101a are perhaps with parallel mode while execution in step 101a and the operation of step 101b.
Further, processor is controlled the configuration parameter after the Memory Controller Hub basis increases progressively or according to the configuration parameter after successively decreasing memory devices is carried out read-write operation and can use various through read-write operations detection memory access algorithm for reliability.
Shown in Fig. 2 B, the embodiment that the configuration parameter after the configuration parameter after a kind of processor control Memory Controller Hub increases progressively according to certain or certain are successively decreased carries out read-write operation to memory devices comprises:
In the present embodiment, processor can use any algorithm that can generate random number, and pseudo-random algorithm for example comes to generate at random the start address and the end address of MEMTEST address space.Present embodiment uses generating mode at random can make read-write operation meet the actual operating position of memory devices more, improves the accuracy of test.
Wherein, If processor increases progressively configuration parameter; Will be with configuration parameter write memory controller and the memory devices after increasing progressively; So processor starts or the triggering Memory Controller Hub; And inform that all memory headrooms that Memory Controller Hub defines start address and end address carry out read-write operation, and after informing the test data (i.e. first test data) that Memory Controller Hub need write, Memory Controller Hub will according to before processor write increase progressively after configuration parameter memory devices is carried out read-write operation.If processor successively decreases configuration parameter; Will be with configuration parameter write memory controller and the memory devices after successively decreasing; So processor starts or the triggering Memory Controller Hub; And inform that all memory headrooms that Memory Controller Hub defines start address and end address carry out read-write operation, and after informing the test data (i.e. first test data) that Memory Controller Hub need write, Memory Controller Hub will according to before processor write successively decrease after configuration parameter memory devices is carried out read-write operation.
In this step; All memory headrooms that Memory Controller Hub defines to start address and end address travel through; Write first test data successively, and then all memory headrooms that define from start address and end address are successively read first test data that writes.For example: suppose that all memory headrooms that define in start address and end address comprise the 1st address-N address; Then Memory Controller Hub writes first test data successively in the 1st address-N address, from the 1st address-N address, reads first test data successively then.
First test data that Memory Controller Hub will be read offers processor.Wherein, N is a natural number.
Concrete, processor compares through first test data that writes that each address is corresponding and first test data of reading, and judges whether identical; If first test data that on certain address, has occurred writing with reading is different, with regard to execution in step 1017; If first test data that writes with read of each address correspondence is all identical, then execution in step 1014.
In order to improve the accuracy of test; After the test shown in the step 1012 is passed through; Processor is further controlled Memory Controller Hub and is read and write second test data according to all memory headrooms that the configuration parameter behind the increasing or decreasing that writes before the processor defines to start address and end address again, promptly the configuration parameter behind the increasing or decreasing is carried out the second time and tests.
Wherein, All memory headrooms that Memory Controller Hub defines to start address and end address are read and write the process of second test data; The process of reading and writing first test data with all memory headrooms that define to start address and end address is identical, is not described in detail in this.
Wherein, in order further to improve the accuracy of test, first test data is different with second test data, but is not limited to difference.
This step and step 1013 are similar, and processor compares through second test data that writes that each address is corresponding and second test data of reading, and judges whether identical; If second test data that on certain address, has occurred writing with reading is different, with regard to execution in step 1017; If second test data that writes with read of each address correspondence is all identical, then execution in step 1016.
In this embodiment, do not limit the concrete numerical value of first test data and second test data.Wherein, Has the 0 and 1 continually varying numerical value sequential relationship between test memory controller and memory devices better for binary representation the time; So first test data and second test data have 0 and 1 continually varying numerical value, for example 0x55 (binary form of 0x55 is shown 0b ' 01010101) and 0xaa (the 0xaa binary form is shown 0b ' 10101010) when preferably adopting with binary representation.
Based on above-mentioned, more preferred, first test data is 0x55, and second test data is 0xaa; Perhaps first test data is 0xaa, and second test data is 0x55.
Further specify, in this embodiment, processor control Memory Controller Hub is earlier tested according to first test data, tests according to second test data then, but is not limited to this order; For example: processor control Memory Controller Hub is earlier tested according to second test data, tests according to first test data then.
Further, this embodiment can also be according to actual application environment, the mode of selecting to adopt a test data, two, three or more test datas to test.
The present embodiment mode is through adopting the method in calculated address space at random; Assurance is to the random test of any space arbitrary address; The actual operating position that meets internal memory; And then test through selecting to have 0 and 1 continually varying test data, can well the emulated memory controller and memory devices between sequential relationship, further improved the authenticity of testing; Through adopting the mode of twice test, improved test accuracy simultaneously.
Shown in Fig. 2 C, the embodiment that the configuration parameter after the configuration parameter after another kind of processor control Memory Controller Hub increases progressively according to certain or certain are successively decreased carries out read-write operation to memory devices comprises:
Above-mentioned steps 2011-step 2015 can repeat no more at this referring to the description of step 1011-step 1015.
In this embodiment; Processor is in order further to improve test accuracy; After test, further control all memory headrooms that the configuration parameter behind the increasing or decreasing that Memory Controller Hub writes according to processor before defines start address and end address and replace read-write operation through step 2012 and step 2014.
In this step; All memory headrooms that Memory Controller Hub defines to start address and end address travel through; Alternately in the address space that start address and end address are defined, write first test data and second test data, and then the address space that defines from start address and end address is successively read first test data and second test data that is write.For example: suppose that all memory headrooms that define in start address and end address comprise the 1st address-N address; Then Memory Controller Hub writes first test data and second test data respectively to the 1st address and the 2nd address; Write first test data and second test data respectively to the 3rd address and the 4th address;, write first test data and second test data respectively to n address and n+1 address, until writing all memory headrooms that define in full start address and end address.From the 1st address-N address, read first test data and second test data then successively.1≤n≤n+1≤N, N are natural numbers.
First test data and second test data that Memory Controller Hub will be read offer processor.
In the present embodiment mode, do not limit the concrete numerical value of first test data and second test data equally.Comparatively preferred, first test data is different with second test data.More preferred; First test data and second test data have 0 and 1 continually varying numerical value when preferably adopting with binary representation, for example 0x55 (binary form of 0x55 is shown 0b ' 01010101) and 0xaa (the 0xaa binary form is shown 0b ' 10101010).For example: first test data is 0x55, and second test data is 0xaa; Perhaps first test data is 0xaa, and second test data is 0x55.
In this explanation; In this embodiment, processor control Memory Controller Hub is earlier tested separately according to first test data, tests separately according to second test data then; Simultaneously carry out alternately testing again, but be not limited to this order according to first test data and second test data.For example: processor control Memory Controller Hub is earlier tested separately according to second test data, and then tests separately according to first test data, carries out alternately testing according to first test data and second test data simultaneously again.Again for example: processor control Memory Controller Hub earlier simultaneously carries out alternately testing according to first test data and second test data, tests separately according to first test data then, tests separately according to second test data again.Again for example: processor control Memory Controller Hub earlier simultaneously carries out alternately testing according to first test data and second test data, tests separately according to second test data then, tests separately according to first test data again.In addition, employed test data also is not limited to two.
The present embodiment mode is through adopting the method in calculated address space at random; Assurance is to the random test of any space arbitrary address; The actual operating position that meets internal memory; And then test through selecting to have 0 and 1 continually varying test data, can well the emulated memory controller and memory devices between sequential relationship, further improved the authenticity of testing; Repeatedly test through multiple test mode simultaneously, improved test accuracy.
The process flow diagram of the memory parameters collocation method that Fig. 3 provides for another embodiment of the present invention.As shown in Figure 3, the method for present embodiment comprises:
Wherein, processor can be selected the configuration parameter of Memory Controller Hub and memory devices according to the practical application scene, and configuration parameter is carried out initialization, then with configuration parameter and its initial value write memory controller and memory devices.
The concrete realization of this step 301 can be repeated no more at this referring to the description of Fig. 2 A-Fig. 2 C.
Wherein, numerical computation method can be the equal method of making even, and also can be the method for weighted sum.This step 302 can see the description of step 102 for details.
In the present embodiment, in order more accurately to find the best configuration value, can carry out above-mentioned steps 301 and step 320 through circulation, wherein the number of times of repetitive cycling is many more, and it is accurate more to obtain the best configuration value.So in the present embodiment, preestablish cycle index, and through judging that whether cycle index is decremented to 0, realizes repeatedly circulating.
Usually, the accuracy of the best configuration value that repeats to obtain for 2 times can be satisfied the demand basically, so cycle index can be set to 2, but is not limited thereto.
In the present embodiment, obtain the best configuration value, improved the accuracy of the best configuration value of obtaining through cycle index realization repetitive cycling is set.
The process flow diagram of the memory parameters collocation method that Fig. 4 provides for further embodiment of this invention.As shown in Figure 4, the method for present embodiment comprises:
In practical application, find through test, the combination that the parameter that Memory Controller Hub and internal memory can dispose is limited often, such as, have only m parameter { P
1, P
2, P
3P
m.In these parameter combinations, some configuration parameter is correlated with, and according to the characteristic or the effect of Memory Controller Hub and memory devices configuration parameter corresponding, can limited combination be reduced n independent incoherent configuration parameter { P
1, P
2, P
3P
n.For example, can summarize following incoherent configuration parameter according to the characteristic or the effect of configuration parameter: operational order is accomplished to the minimum interval controlled variable of next operation, sequential control parameter, bus driver ability and the termination Characteristics Control parameter etc. in the control command to interval controlled variable, the operational order of data input to the interval controlled variable of data output, an operation.These configuration parameters are the sequential relationship of independent effect bus operation all.Wherein, m, n are natural number, and n≤m.Each configuration parameter all has certain span, supposes that each configuration parameter has k value, and then the span of each configuration parameter can be expressed as: P
i={ p
I1, p
I2, p
I3..., p
Ir, p
I (r+1), p
I (r+2)..., p
I (k-2), p
I (k-1), p
Ik; 1≤i≤n wherein.And the Configuration Values of each parameter can not influence the influence of the Configuration Values of other parameter to the time sequential routine relation in this n independent incoherent configuration parameter.The incoherent configuration parameter of these several independences satisfies overlaying relation to the influence of sequential relationship.
In these combinations, each configuration parameter has only certain span can guarantee that Memory Controller Hub can the normal access memory devices, and often has only the Configuration Values of a combination, for example { p
1f, p
2f, p
3fP
NfCan make between Memory Controller Hub and the internal memory sequential relationship best, promptly have only a value can guarantee that Memory Controller Hub can visit access memory the most reliably.And with the big more Configuration Values of this best configuration value difference value, can make the sequential relationship between Memory Controller Hub and the internal memory become poor more, that is, the continuous variation of the value of each configuration parameter has the sequential relationship continually varying trend that makes between Memory Controller Hub and the internal memory.
In order from the span of each configuration parameter, to obtain the best configuration value, the processor of present embodiment carries out initialization respectively to the separate configuration parameter of selecting.Wherein, the selected initial value of initialization is in the span of each configuration parameter, and it can guarantee that Memory Controller Hub can the access memory device, but is not necessarily the best configuration value.
Whether step 410, processor judgment variable r are 0; If judged result is returned execution in step 403 for not; If judged result is for being execution in step 411.
Present embodiment has been described the best configuration value that processor obtains a plurality of configuration parameters simultaneously, and the process that is configured, and wherein the configuration flow for each configuration parameter is all identical, can be referring to the description of previous embodiment.In addition, present embodiment compared with prior art through obtaining separate a plurality of configuration parameters, both can satisfy the demand of sequential relationship between Memory Controller Hub and the memory devices, had reduced configuration operation again, helped improving allocative efficiency.
The structural representation of the processor that Fig. 5 provides for one embodiment of the invention.As shown in Figure 5, the processor of present embodiment comprises: first acquisition module 51, second acquisition module 52 and configuration module 53.
Wherein, first acquisition module 51 is used for configuration parameter being carried out memory read-write testing according to the preset step-length and the initial value of stored configuration parameters in advance, obtains the maximum configured value and the minimal configuration value of configuration parameter.Second acquisition module 52 is connected with first acquisition module 51, and the maximum configured value and the minimal configuration value that are used for first acquisition module 51 is obtained are carried out numerical evaluation, obtain the best configuration value of configuration parameter.Configuration module 53 is connected with second acquisition module 52, and the best configuration value of the configuration parameter that is used for second acquisition module 52 is obtained is write memory controller and memory devices respectively.
Wherein, the processor of present embodiment and memory devices, Memory Controller Hub belong to the different parts of same equipment, and processor can store relevant data in the memory devices into, and the control Memory Controller Hub carries out read operation to memory devices.
Each functional module of the processor of present embodiment can be used for the flow process of execution graph 1 said memory parameters collocation method, and its concrete principle of work repeats no more, and sees the description of method embodiment for details.
The processor of present embodiment is according to the initial value of stored configuration parameters, the progressively value of increasing or decreasing configuration parameter in advance in preset step-length and the Memory Controller Hub; And the control Memory Controller Hub carries out read-write operation to memory devices under the situation of every kind of value; Realization is to the test of the memory read-write of configuration parameter, obtains the maximum configured value and the minimal configuration value of configuration parameter according to test result, and obtains the best configuration value according to maximum configured value and minimal configuration value; Completion is to the configuration of the parameter of Memory Controller Hub and memory devices; Realized the adaptive configuration of configuration parameter, no longer relied on external test tools, the accuracy that has solved configuration parameter receives the problem of external test tools restriction; Improve the accuracy of the configuration parameter value that is disposed, and then improved Memory Controller Hub carries out read-write operation to memory devices success ratio.In addition; Best configuration value and the completion configuration of the processor of present embodiment through obtaining configuration parameter voluntarily; Do not receive the restriction of external test tools; When environment changes, can reconfigure at any time, improve Memory Controller Hub and memory devices are carried out the dirigibility of parameter configuration, guarantee is provided for the sequential relationship between Memory Controller Hub and the memory devices all reaches the best under varying environment.Simultaneously; The processor of present embodiment makes parameter configuration no longer rely on external test tools; Making becomes to the test of configuration parameter and configuration simply is easy to carry out; And processor can be directly with the best configuration value write memory controller and the memory devices of the configuration parameter that obtains; Can test get final product with configuration operation carrying out once when needs reconfigure, with the operation compared that need carry out the ROM of replacing storage configuration parameter in the prior art during each update configuration parameters, be time saving and energy saving many.
The structural representation of the processor that Fig. 6 provides for another embodiment of the present invention.Present embodiment is based on realization embodiment illustrated in fig. 6, and is as shown in Figure 6, and first acquisition module 51 of present embodiment comprises: maximal value is obtained submodule 511 and is obtained submodule 512 with minimum value.
Wherein, Maximal value is obtained submodule 511; Be used for configuration parameter is begun to increase progressively gradually according to first step-length of step-length by initial value, and configuration parameter write memory controller and memory devices after will increasing progressively, and the control Memory Controller Hub carries out read-write operation according to the configuration parameter after increasing progressively to memory devices; Obtain the maximum configured value of the value of the configuration parameter when read-write operation is unsuccessful for the first time, and offer second acquisition module 52 as configuration parameter.
Minimum value is obtained submodule 512; Be used for configuration parameter is begun to successively decrease gradually according to second step-length of step-length by initial value; And configuration parameter write memory controller and memory devices after will successively decreasing; And control Memory Controller Hub and according to the configuration parameter after successively decreasing memory devices is carried out read-write operation, obtain the minimal configuration value of the value of the configuration parameter when read-write operation is unsuccessful for the first time, and offer second acquisition module 52 as configuration parameter.
Above-mentioned each function sub-modules can be used for the flow process of execution graph 2A illustrated embodiment, and its concrete principle of work repeats no more, and sees the description of method embodiment for details.
Further, the maximal value of present embodiment is obtained submodule 511 and also comprised: first writing unit 5111, first generation unit 5112, first control module 5113, first are confirmed the unit 5114 and first acquiring unit 5115.
Wherein, first writing unit 5111 is used for configuration parameter is begun to increase progressively gradually according to first step-length of said step-length by initial value, and configuration parameter write memory controller after will increasing progressively and said memory devices.First generation unit 5112 is used for generating at random the start address and the end address of MEMTEST address space.First control module 5113; Be connected with first generation unit 5112 with first writing unit 5111; Be used for controlling Memory Controller Hub according to first writing unit 5111 write increase progressively after all memory headrooms of defining of the start address that generated to first generation unit 5112 of configuration parameter and end address write first test data successively; Read first test data then successively; And the control Memory Controller Hub writes second test data according to the configuration parameter after increasing progressively successively in all memory headrooms that start address and end address are defined, and reads second test data then successively.First confirms unit 5114; Be connected with first control module 5113, be used in first test data that writes identically with first test data of reading, and second test data that writes is when identical with second test data of reading; Confirm the read-write operation success; Inequality in first test data that writes with first test data of reading, when second test data that perhaps writes and second test data of reading are inequality, confirm that read-write operation is unsuccessful.First acquiring unit 5115 confirms that with first unit 5114 is connected, be used to obtain first confirm to determine unit 5114 the first time, read-write operation got nowhere the time the value of configuration parameter as the maximum configured value of configuration parameter.
Further, minimum value is obtained submodule 512 and comprised: second writing unit 5121, second generation unit 5122, second control module 5123, second are confirmed unit 5124 and second acquisition unit 5125.
Wherein, second writing unit 5121 is used for configuration parameter is begun to successively decrease gradually according to second step-length of said step-length by initial value, and configuration parameter write memory controller and memory devices after will successively decreasing.Second generation unit 5122 is used for generating at random the start address and the end address of MEMTEST address space.Second control module 5123; Be connected with second generation unit 5122 with second writing unit 5121; Be used for controlling Memory Controller Hub according to second writing unit 5121 write successively decrease after all memory headrooms of defining of the start address that generated to second generation unit 5122 of configuration parameter and end address write first test data successively; Read first test data then successively; And the control Memory Controller Hub writes second test data according to the configuration parameter after successively decreasing successively in all memory headrooms that start address and end address are defined, and reads second test data then successively.Second confirms unit 5124; Be connected with second control module 5123, be used in first test data that writes identically with first test data of reading, and second test data that writes is when identical with second test data of reading; Confirm the read-write operation success; Inequality in first test data that writes with first test data of reading, when second test data that perhaps writes and second test data of reading are inequality, confirm that read-write operation is unsuccessful.Second acquisition unit 5125 confirms that with second unit 5124 is connected, be used to obtain second confirm to determine unit 5124 the first time, read-write operation got nowhere the time the value of configuration parameter as the minimal configuration value of configuration parameter.
Above-mentioned each functional unit can be used for the corresponding flow process in execution graph 2A and Fig. 2 B illustrated embodiment, and its concrete principle of work repeats no more, and sees the description of method embodiment for details.
In addition; First control module 5113 of present embodiment also is used for controlling Memory Controller Hub and alternately writes first test data and second test data successively according to all memory headrooms that the configuration parameter after increasing progressively defines to start address and end address, read successively then alternately write first test the test data and second test data.
Wherein, Present embodiment is not done qualification to the concrete numerical value of first test data and second test data; But comparatively preferred, first test data and second test data have 0 and 1 continually varying numerical value, for example 0x55 and 0xaa when preferably adopting with binary representation.For example: first test data is 0x55, and second test data is 0xaa; Perhaps first test data is 0xaa, and second test data is 0x55.
Above-mentioned each functional unit can be used for the corresponding flow process in the execution graph 2C illustrated embodiment, and its concrete principle of work repeats no more, and sees the description of method embodiment for details.
Further, the processor of present embodiment also comprises: replacement trigger module 61.
This replacement trigger module 61 can be used for carrying out the corresponding flow process in the memory parameters collocation method shown in Figure 3, and its concrete principle of work repeats no more.
Further, the processor of present embodiment can also comprise: obtain memory module 62.
This obtains memory module 62; Use with first acquisition module 51 and be connected; In at first acquisition module according to the preset step-length and the initial value of stored configuration parameters in advance; Configuration parameter is carried out memory read-write test, obtain before the maximum configured value and minimal configuration value of configuration parameter, according to the characteristic of all configuration parameters of Memory Controller Hub and memory devices correspondence; From all configuration parameters, select a separate set of configuration parameters and storage, and institute's stored configuration parameters is offered first acquisition module 51.
This obtains memory module 62 can use the corresponding flow process of carrying out in the memory parameters collocation method shown in Figure 4, and its concrete principle of work repeats no more.
The processor of present embodiment; Through adopting the method in calculated address space at random; Assurance meets the actual operating position of internal memory to the random test of any space arbitrary address, and then tests through selecting to have 0 and 1 continually varying test data; Can well the emulated memory controller and memory devices between sequential relationship, further improved the authenticity of test; Through adopting the repeatedly mode of test, improved test accuracy simultaneously.
The structural representation of the equipment that Fig. 7 provides for one embodiment of the invention.As shown in Figure 7, the equipment of present embodiment comprises: processor 71, Memory Controller Hub 72 and memory devices 73.Processor 71 is connected with Memory Controller Hub 72, and Memory Controller Hub 72 is connected with memory devices 73.
Wherein, the processor that processor 71 provides for the above embodiment of the present invention, its implementation structure can be referring to Fig. 5 or shown in Figure 6, and its principle of work can all repeat no more at this referring to the description of Fig. 1-method embodiment shown in Figure 4.
In addition, the operative relationship between processor 71 and Memory Controller Hub 72 and the memory devices 73, and the operative relationship between Memory Controller Hub 72 and the memory devices 73 is also referring to the description among Fig. 1-method embodiment shown in Figure 4.
The equipment of present embodiment; Accomplish configuration voluntarily by processor to the configuration parameter of memory devices and Memory Controller Hub; No longer rely on external test tools; The accuracy that has solved configuration parameter receives the problem of external test tools restriction, improved the accuracy of the configuration parameter value that is disposed, and then has improved Memory Controller Hub carries out read-write operation to memory devices success ratio.In addition; The equipment of present embodiment is not owing to receive the restriction of external test tools;, environment can reconfigure at any time when changing; Improved Memory Controller Hub and memory devices have been carried out the dirigibility of parameter configuration, guarantee is provided for the sequential relationship between Memory Controller Hub and the memory devices all reaches the best under varying environment.And the equipment of present embodiment need not changed ROM when being configured parameter update, compared with prior art wants time saving and energy saving many.
One of ordinary skill in the art will appreciate that: all or part of step that realizes said method embodiment can be accomplished through the relevant hardware of programmed instruction; Aforesaid program can be stored in the computer read/write memory medium; This program the step that comprises said method embodiment when carrying out; And aforesaid storage medium comprises: various media that can be program code stored such as ROM, RAM, magnetic disc or CD.
What should explain at last is: above embodiment is only in order to explaining technical scheme of the present invention, but not to its restriction; Although with reference to previous embodiment the present invention has been carried out detailed explanation, those of ordinary skill in the art is to be understood that: it still can be made amendment to the technical scheme that aforementioned each embodiment put down in writing, and perhaps part technical characterictic wherein is equal to replacement; And these are revised or replacement, do not make the scope of the essence disengaging various embodiments of the present invention technical scheme of relevant art scheme.
Claims (14)
1. a memory parameters collocation method is characterized in that, comprising:
Processor carries out memory read-write to said configuration parameter and tests according to the preset step-length and the initial value of stored configuration parameters in advance, obtains the maximum configured value and the minimal configuration value of said configuration parameter;
Said processor carries out numerical evaluation to said maximum configured value and said minimal configuration value, obtains the best configuration value of said configuration parameter;
Said processor is with the best configuration value difference write memory controller and the memory devices of said configuration parameter.
2. memory parameters collocation method according to claim 1; It is characterized in that; Said processor carries out memory read-write to said configuration parameter and tests according to the preset step-length and the initial value of stored configuration parameters in advance, and maximum configured value and the minimal configuration value of obtaining said configuration parameter comprise:
Said processor begins said configuration parameter to increase progressively gradually according to first step-length in the said step-length by initial value; And the configuration parameter after will increasing progressively writes said Memory Controller Hub and said memory devices; And control the configuration parameter of said Memory Controller Hub after according to said increasing progressively said memory devices is carried out read-write operation, obtain the maximum configured value of the value of the configuration parameter when read-write operation is unsuccessful for the first time as said configuration parameter;
Said processor begins said configuration parameter to successively decrease gradually according to second step-length in the said step-length by initial value; And the configuration parameter after will successively decreasing writes said Memory Controller Hub and said memory devices; And control the configuration parameter of said Memory Controller Hub after according to said successively decreasing said memory devices is carried out read-write operation, obtain the minimal configuration value of the value of the configuration parameter when read-write operation is unsuccessful for the first time as said configuration parameter.
3. memory parameters collocation method according to claim 2 is characterized in that, said processor is controlled configuration parameter or the configuration parameter said successively decrease after of said Memory Controller Hub after according to said increasing progressively and said memory devices is carried out read-write operation comprised:
Said processor generates the start address and the end address of MEMTEST address space at random;
Said processor is controlled configuration parameter or the configuration parameter said successively decrease after of said Memory Controller Hub after according to said increasing progressively and in all memory headrooms that said start address and said end address are defined, is write first test data successively, reads said first test data then successively;
Said processor is controlled configuration parameter or the configuration parameter said successively decrease after of said Memory Controller Hub after according to said increasing progressively and in all memory headrooms that said start address and said end address are defined, is write second test data successively, reads said second test data then successively;
If first test data that writes is identical with first test data of reading, and second test data that writes is identical with second test data of reading, and said processor is confirmed the read-write operation success;
If first test data that writes is inequality with first test data of reading, second test data that perhaps writes is inequality with second test data of reading, and said processor confirms that read-write operation is unsuccessful.
4. memory parameters collocation method according to claim 2 is characterized in that, said processor is controlled configuration parameter or the configuration parameter said successively decrease after of said Memory Controller Hub after according to said increasing progressively and said memory devices is carried out read-write operation comprised:
Said processor generates the start address and the end address of MEMTEST address space at random;
Said processor is controlled configuration parameter or the configuration parameter said successively decrease after of said Memory Controller Hub after according to said increasing progressively and in all memory headrooms that said start address and said end address are defined, is write first test data successively, reads said first test data then successively;
Said processor is controlled configuration parameter or the configuration parameter said successively decrease after of said Memory Controller Hub after according to said increasing progressively and in all memory headrooms that said start address and said end address are defined, is write second test data successively, reads said second test data then successively;
Said processor is controlled configuration parameter or the configuration parameter said successively decrease after of said Memory Controller Hub after according to said increasing progressively and in all memory headrooms that said start address and said end address are defined, is alternately write said first test data and said second test data successively, reads said first test test data and said second test data that alternately writes then successively;
If first test data that writes is identical with first test data of reading, and second test data that writes is identical with second test data of reading, and said processor is confirmed the read-write operation success;
If first test data that writes is inequality with first test data of reading, second test data that perhaps writes is inequality with second test data of reading, and said processor confirms that read-write operation is unsuccessful.
5. according to claim 3 or 4 described memory parameters collocation methods, it is characterized in that said first test data is 0x55, said second test data is 0xaa; Perhaps, the said first test data 0xaa, said second test data is 0x55.
6. according to each described memory parameters collocation method of claim 1-4, it is characterized in that said processor comprises the best configuration value of said configuration parameter respectively before write memory controller and the memory devices:
Said processor is with the best configuration value of the said configuration parameter initial value as said configuration parameter; And again according to the initial value of presetting step-length and said configuration parameter; Said configuration parameter is carried out the memory read-write test; Obtain the maximum configured value and the minimal configuration value of said configuration parameter, and said maximum configured value and said minimal configuration value are carried out numerical evaluation, obtain the best configuration value of said configuration parameter.
7. according to each described memory parameters collocation method of claim 1-4; It is characterized in that; Said processor is according to the preset step-length and the initial value of stored configuration parameters in advance; Said configuration parameter is carried out the memory read-write test, and maximum configured value and the minimal configuration value of obtaining said configuration parameter comprise before:
Said processor is selected a separate set of configuration parameters and storage according to the characteristic of all configuration parameters of said Memory Controller Hub and said memory devices correspondence from all configuration parameters.
8. a processor is characterized in that, comprising:
First acquisition module is used for said configuration parameter being carried out memory read-write testing according to the preset step-length and the initial value of stored configuration parameters in advance, obtains the maximum configured value and the minimal configuration value of said configuration parameter;
Second acquisition module is used for said maximum configured value and said minimal configuration value are carried out numerical evaluation, obtains the best configuration value of said configuration parameter;
Configuration module is used for best configuration value difference write memory controller and memory devices with said configuration parameter.
9. processor according to claim 8 is characterized in that, said first acquisition module comprises:
Maximal value is obtained submodule; Be used for said configuration parameter is begun to increase progressively gradually according to first step-length of said step-length by initial value; And the configuration parameter after will increasing progressively writes said Memory Controller Hub and said memory devices; And control the configuration parameter of said Memory Controller Hub after according to said increasing progressively said memory devices is carried out read-write operation, obtain the maximum configured value of the value of the configuration parameter when read-write operation is unsuccessful for the first time as said configuration parameter;
Minimum value is obtained submodule; Be used for said configuration parameter is begun to successively decrease gradually according to second step-length of said step-length by initial value; And the configuration parameter after will successively decreasing writes said Memory Controller Hub and said memory devices; And control the configuration parameter of said Memory Controller Hub after according to said successively decreasing said memory devices is carried out read-write operation, obtain the minimal configuration value of the value of the configuration parameter when read-write operation is unsuccessful for the first time as said configuration parameter.
10. processor according to claim 9 is characterized in that, said maximal value is obtained submodule and comprised:
First writing unit be used for said configuration parameter is begun to increase progressively gradually according to first step-length of said step-length by initial value, and the configuration parameter after will increasing progressively writes said Memory Controller Hub and said memory devices;
First generation unit is used for generating at random the start address and the end address of MEMTEST address space;
First control module; Be used for controlling all memory headrooms that the configuration parameter of said Memory Controller Hub after according to said increasing progressively define to said start address and said end address and write first test data successively; Read said first test data then successively; And control the configuration parameter of said Memory Controller Hub after according to said increasing progressively and in all memory headrooms that said start address and said end address are defined, write second test data successively, read said second test data then successively;
First confirms the unit; Be used in first test data that writes identical with first test data of reading; And when second test data that writes is identical with second test data of reading, confirm the read-write operation success, inequality in first test data that writes with first test data of reading; When second test data that perhaps writes and second test data of reading are inequality, confirm that read-write operation is unsuccessful;
First acquiring unit is used to obtain the maximum configured value of the value of the configuration parameter when read-write operation is unsuccessful for the first time as said configuration parameter;
Said minimum value is obtained submodule and is comprised:
Second writing unit be used for said configuration parameter is begun to successively decrease gradually according to second step-length of said step-length by initial value, and the configuration parameter after will successively decreasing writes said Memory Controller Hub and said memory devices;
Second generation unit is used for generating at random the start address and the end address of MEMTEST address space;
Second control module; Be used for controlling all memory headrooms that the configuration parameter of said Memory Controller Hub after according to said successively decreasing define to said start address and said end address and write first test data successively; Read said first test data then successively; And control the configuration parameter of said Memory Controller Hub after according to said successively decreasing and in all memory headrooms that said start address and said end address are defined, write second test data successively, read said second test data then successively;
Second confirms the unit; Be used in first test data that writes identical with first test data of reading; And when second test data that writes is identical with second test data of reading, confirm the read-write operation success, inequality in first test data that writes with first test data of reading; When second test data that perhaps writes and second test data of reading are inequality, confirm that read-write operation is unsuccessful;
Second acquisition unit is used to obtain the minimal configuration value of the value of the configuration parameter when read-write operation is unsuccessful for the first time as said configuration parameter.
11. processor according to claim 10; It is characterized in that; Said first control module also alternately writes said first test data and said second test data with the configuration parameter of the said Memory Controller Hub of control after according to said increasing progressively successively in all memory headrooms that said start address and said end address are defined, read said first test test data and said second test data that alternately writes then successively;
Said second control module also is used for controlling all memory headrooms that the configuration parameter of said Memory Controller Hub after according to said successively decreasing define to said start address and said end address and alternately writes said first test data and said second test data successively, reads said first test test data and said second test data that alternately writes then successively.
12. each described processor is characterized in that according to Claim 8-11, also comprises:
The replacement trigger module; Be used for before the best configuration value difference write memory controller and memory devices of said configuration module said configuration parameter; With the best configuration value of said configuration parameter initial value, send to said first acquisition module, and trigger said first acquisition module again according to the initial value of preset step-length and said configuration parameter as said configuration parameter; Said configuration parameter is carried out the memory read-write test, obtain the maximum configured value and the minimal configuration value of said configuration parameter.
13. each described processor is characterized in that according to Claim 8-11, also comprises:
Obtain memory module; Be used at said first acquisition module according to the preset step-length and the initial value of stored configuration parameters in advance; Said configuration parameter is carried out the memory read-write test; Obtain before the maximum configured value and minimal configuration value of said configuration parameter,, from all configuration parameters, select a separate set of configuration parameters and storage according to the characteristic of all corresponding configuration parameters of said Memory Controller Hub and said memory devices.
14. an equipment is characterized in that, comprising: each described processor of Memory Controller Hub, memory devices and claim 8-13.
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Address after: 350002 19 Building, Citrus Industrial Park, 618 Jinshan Road, Cangshan District, Fuzhou, Fujian. Patentee after: RUIJIE NETWORKS Co.,Ltd. Address before: 350002 19 Building, Citrus Industrial Park, 618 Jinshan Road, Cangshan District, Fuzhou, Fujian. Patentee before: Fujian Star Network Ruijie Networks Co.,Ltd. |