CN102508452A - Fault injection simulation board capable of simulating multiple faults - Google Patents

Fault injection simulation board capable of simulating multiple faults Download PDF

Info

Publication number
CN102508452A
CN102508452A CN2011103497027A CN201110349702A CN102508452A CN 102508452 A CN102508452 A CN 102508452A CN 2011103497027 A CN2011103497027 A CN 2011103497027A CN 201110349702 A CN201110349702 A CN 201110349702A CN 102508452 A CN102508452 A CN 102508452A
Authority
CN
China
Prior art keywords
resistance
relay
line
fault
module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2011103497027A
Other languages
Chinese (zh)
Other versions
CN102508452B (en
Inventor
石君友
吕凯悦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beihang University
Original Assignee
Beihang University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beihang University filed Critical Beihang University
Priority to CN 201110349702 priority Critical patent/CN102508452B/en
Publication of CN102508452A publication Critical patent/CN102508452A/en
Application granted granted Critical
Publication of CN102508452B publication Critical patent/CN102508452B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

The invention discloses a fault injection simulation board capable of simulating multiple faults. The appearance structure of the fault injection simulation board consists of 48 relay units, a fixed level port, an external resistor port, an external signal port and a main input/output interface; the 48 relays are arranged to form six columns and eight rows according to sequential numbers; the fixed level port, the external resistor port, the external signal port and the main input/output interface are positioned below the simulation board from left to right; the internal structures of the 48 relay units form five modules, namely a fixed high level module, a fixed low level module, an output mistake module, a line-connected-in-series-with-resistor, resistor-connected-between-two-line and resistor-connected-between-line-and-ground module and a resistor network module; the input ports of the previous four modules are connected to four branches of the same input signal line I1/I2; the resistor network module is connected to the line-connected-in-series-with-resistor, resistor-connected-between-two-line and resistor-connected-between-line-and-ground module; and the respective modules are connected with control signal lines of a fault injection control board. The fault injection simulation board has an application prospect in the technical field of fault simulation test.

Description

A kind of fault that can simulate various faults is injected analog board
(1) technical field
The present invention relates to a kind of fault that can simulate various faults and inject analog board, belong to the testability technical field that fault is injected analogue technique.
(2) technical background
It is a kind of reliability demonstration technology that fault is injected, and in system, painstakingly introduces fault through controlled experiment, and the behavior when having fault in the observing system.Failure Injection Technique generally is divided at present: hardware based fault is injected, is injected and inject based on the fault of emulation based on the fault of software.
Hardware based fault is injected in the physical level completion, disturbs hardware or imports the effect that reaches the fault injection through changing the IC chip pin through changing environmental parameter.What adopt among the present invention is exactly this kind mode, comes the break-make of pilot relay through the conversion of high-low level, injects thereby simulate different faults.
The present most of functions of fault input equipment are perfect inadequately, often can only simulate one to two kind of fault, are difficult to satisfy the requirement of people to equipment dependability.Just seem very important so develop a kind of equipment that can carry out various faults injection simulation.
(3) summary of the invention
1, purpose:
The object of the present invention is to provide a kind of fault that can simulate various faults to inject analog board, satisfy the requirement of people the equipment dependability aspect.Its gordian technique is how to simulate different line fault through the break-make of control signal pilot relay.
2, technical scheme:
(1) contour structures
A kind of fault that can simulate various faults of the present invention is injected analog board; Its contour structures is with 48 relays relay unit that is core and fixed level socket, outer meeting resistance socket, external signal socket; The total interface of input and output is formed; Their position relation is as shown in Figure 1, and 48 relays are arranged to 6 row, 8 rows by sequence number, and fixed level socket, outer meeting resistance socket, external signal socket and the total interface of input and output are positioned at the lower position of this analog board from left to right.A1~A48 is a relay unit among the figure, and the label of each relay unit is identical with the label of the relay that it contains.After correctly connecting relay unit,, just can accomplish the fault simulation on the unlike signal line through the break-make of control signal pilot relay.Admittedly the function of this fixed level socket is to insert height/low level required when carrying out solid height/low fault simulation; The function of this outer meeting resistance socket is to insert an outer meeting resistance; The function of this external signal socket is to insert the required external signal of simulation output error fault; External input signal cable I1/I2, output signal line O1/O2, control signal C1~C48 are through the total interface entering/outgoing failure of input and output injection plate, and the total interface of input and output simultaneously also provides the interface of high level VDD and earth terminal GND.The detailed structure of each socket is seen shown in Fig. 2 (a)-Fig. 2 (d).
(2) relay unit
In 48 relay A1~A48, be connected in series a resistance between A2, A6, A12, the A16, the pin separately 8 of the relay R ELAY2 of these four unit, RELAY6, RELAY12, RELAY16 and pin 9; The relay R ELAY39-RELAY46 of these 8 unit of A39~A46 forms resistor network, compares other unit and wants each many resistance; The circuit structure of all the other 36 relay units is identical---the circuit structure that is the A1 unit is made up of relay R ELAY1, diode Q, LED light emitting diode, triode D, resistance R 1, R2, R3.Shown in Figure 3 is the circuit connecting mode of each parts among the A1.The pin 1 of relay is connected to+the 5V high level, series resistor R1 between the collector C of pin 16 and triode D, the output emitter E ground connection of triode; Series resistor R2 between the base stage B of triode D and the C1, C1 is connected to the I/O output port that fault is injected control panel through the total interface of input and output, after resistance of LED serial connection, is connected across 16 of pin 1 and the pins of relay.All the other by that analogy.
The fault injection control panel of mentioning in the preceding text is applied for a patent in addition, and its effect is to resolve the steering order that host computer transmits, and is converted into the input port high-low level of respective signal line, just the control signal of C1 port.If what the C1 end was given is high level, then triode conducting, this moment, pin 4 was connected with pin 6, and pin 13 is connected with pin 11, gives tacit consent to state for this reason when relay does not move.C1 holds given low level the time, and the LED conducting is shinny, is convenient to find the relay that has moved; The effect of diode Q is to prevent inverse current, and the effect of resistance R 1 is that the electric current in the circuit is excessive and surpass the tolerance limit of components and parts when preventing the triode conducting.
Shown in Figure 4 is each position component relation among the relay unit A1; R wherein? Other parts in expression and the incomplete same relay unit in A1 unit.Because each control circuit structure is formed all identical with connected mode with diode Q, LED; So in the figure of back, explaining; For simplicity, draw no longer one by one control circuit and diode Q, LED, relay and important resistance etc. only draw.
Wherein, the model specification of relay is the G6AU series that Omron Corp produces;
Wherein, the resistance of relay R ELAY2, RELAY6 serial connection is HIGH_RES1, HIGH_RES2, and its Standard resistance range is 25K~35K Ω;
Wherein, the resistance of relay R ELAY12, RELAY16 serial connection is LOW_RES1, LOW_RES2, and its Standard resistance range is 25K~30K Ω;
Wherein, the resistance of relay R ELAY39-RELAY42 serial connection is A_R1~A_R4, and its Standard resistance range is respectively 1K~2K Ω, 10K~12K Ω, 30K~35K Ω, 70K~80K Ω;
Wherein, the resistance of relay R ELAY43-RELAY46 serial connection is B_R1~B_R4, and its Standard resistance range is that its Standard resistance range is respectively 1K~2K Ω, 10K~12K Ω, 30K~35K Ω, 70K~80K Ω;
Wherein, the Standard resistance range of resistance R 1, R2, R3 is respectively 10~15 Ω, 2.3K~3K Ω and 1K~1.5K Ω.(3) inner structure is the connection between each relay unit
48 relay units are formed 5 big modules by inner structure and function.They are respectively crosstalk resistance---overlap resistance between line and the line---these five modules of overlap resistance between line and the ground on solid height, solid low, output error, resistor network and the line.Annexation between each module is as shown in Figure 5.
Gu on high, solid low, output error, the line crosstalk resistance---overlap resistance between line and the line---between line and the ground input port of these four modules of overlap resistance receive in four branches of same input signal cable I1/I2; Output port is received in four branches of same output signal line O1/O2; The resistor network module is connected on the line crosstalk resistance---overlap resistance between line and the line---between line and the ground on the overlap resistance mould; Each module is connected with the control signal wire of fault injection control panel again separately.Input signal cable I1/I2, output signal line O1/O2, control signal wire all are connected to the total interface of input and output.
[1] solid high module
Should solid high module contain 8 relay units, it is divided into identical two parts, as shown in Figure 6.Relay R ELAY1~RELAY4 and resistance HIGH_RES1 form the fault simulation circuit of the solid high module of input signal cable I1, I2, and relay R ELAY11~RELAY14 and resistance HIGH_RES2 form the fault simulation circuit of the solid high module of output signal line O1, O2.The pin 16 of each relay all is connected to relay drive circuit, and pin one is then unified to be connected to+the 5V high level.The fixedly high level of UUT_POWER for being inserted through the fixed level socket.Gu the function of high module be the break-make through pilot relay just can the analog input signal line and output signal line on fixedly high level fault.Wherein the effect of resistance HIGH_RES1, HIGH_RES2 is that the electric current in the circuit is excessive when preventing the circuit connection.If realize that the relay that solid high fault simulation then need be moved on the I1 line is RELAY3, RELAY2 (selecting internal resistance for use) or RELAY3, RELAY1 (selecting non-essential resistance for use); If select internal resistance for use; Then after RELAY3, the RELAY2 action; Internal bus I1 links to each other with UUT_POWER through HIGH_RES1, and wherein UUT_POWER is the high level of measurand output.The solid high fault simulation similar process of other signal wire.
[2] low admittedly module
This low admittedly module contains 8 relay units, and it is divided into identical two parts, as shown in Figure 7.Relay R ELAY5~RELAY8 and resistance LOW_RES1 form the fault simulation circuit of low module admittedly of input signal cable I1, I2, and relay R ELAY15~RELAY18 and resistance LOW_RES2 form the former fault simulation circuit of low module admittedly of output signal line O1, O2.The pin 16 of each relay all is connected to relay drive circuit, the then unified one+5V high level that is connected to of pin one.UUT_GND is an earth terminal.Admittedly the function of low module is analog input signal line I1, I2 and output signal line O1, the last fixedly low level fault of O2.Wherein the effect of resistance LOW_RES1, LOW_RES2 is that the electric current in the circuit is excessive when preventing the circuit connection.If realize that the relay that the low admittedly fault simulation on the I1 line need be moved is RELAY7, RELAY6 (selecting internal resistance for use) or RELAY7, RELAY5 (selecting non-essential resistance for use).If select non-essential resistance for use, then after RELAY7, the RELAY6 action, input signal cable I1 is connected with ground wire through LOW_RES1, and ground wire is the low level of measurand output.Admittedly the low fault simulation similar process of other signal wire.
[3] output error module
This output error module is made up of A9, A10, A19, these 4 relay units of A20, and it is divided into identical two parts, and its circuit structure is as shown in Figure 8.External signal line EX_SIGNAL1/EX_SIGNAL2 is connected to 13 pins of relay, and input signal cable I1/I2, output signal line O1/O2 are connected to the pin 9 of relay.With the I1 output error is example, needs the RELAY9 action during simulation output error, and then external signal is connected with I1, replaces original input signal with external signal, thereby realizes the fault simulation of output error.
[4] resistor network module
This resistor network module contains 8 relay units.It is divided into identical two parts, as shown in Figure 11.Relay R ELAY43~RELAY46, resistance B_R1~B_R4 form the resistance BRES that size can be regulated; Relay R ELAY39~RELAY42, resistance A_R1~A_R4 form the resistance ARES that size can be regulated.When the function of resistor network module provides on the artificial line between crosstalk resistance, line and the ground between overlap resistance, line and the line these three kinds of faults of overlap resistance required in connecting resistance.Just can obtain the interior connecting resistance of different sizes through the break-make of pilot relay.For example: if regulate the size of BRES, B_R1 is excised from circuit, relay R ELAY43 action is got final product.In simulated fault signal, signal gets into from ARES1/BRES1, flows out from ARES2/BRES2, has so just accomplished the fault simulation of series resistor.
[5] crosstalk resistance---overlap resistance between line and the line---overlap resistance module between line and the ground on the line
On this line crosstalk resistance---overlap resistance between line and the line---between line and the ground overlap resistance module contain 20 relay units, the circuit connecting mode between each relay such as Fig. 9 and shown in Figure 10 altogether.This module can artificial line on these three kinds of faults of overlap resistance between overlap resistance, line and the ground between crosstalk resistance, line and the line.
When crosstalk hindered fault on the artificial line, needing the relay of action was RELAY21, RELAY23, RELAY37 (internal resistance) or RELAY21, RELAY23, RELAY35 (non-essential resistance).Realize that the relay that the crosstalk resistance needs to move on I1 and the O1 line is RELAY21, RELAY23, RELAY37 (internal resistance), perhaps RELAY21, RELAY23, RELAY35 (non-essential resistance).With string internal resistance between I1 and the O1 is example; Link to each other through resistance ARES between I1 and the O1 after RELAY21, RELAY23, these three actuatings of relay of RELAY37; Export from O1 from the signal that input signal cable I1 gets into, thereby realized the fault simulation that crosstalk hinders on the line.
The relay that need move during the overlap resistance fault simulation between artificial line and the ground is RELAY21, RELAY23, RELAY25, RELAY29, RELAY32, RELAY38 (internal resistance) or RELAY21, RELAY23, RELAY25, RELAY29, RELAY32, RELAY48 (non-essential resistance).Connecting the overlap joint internal resistance of back between ground with signal wire I1 and O1 is example; Relay R ELAY21, RELAY23, RELAY25 move later on then, and I1 is communicated with O1; The low level of O1 and measurand is connected through resistance BRES after RELAY29, RELAY32, the RELAY38 action, thereby has realized the fault simulation of overlap resistance between line and ground.
Overlap resistance is meant that I1 is communicated with O1 and I2 and O2 are communicated with back overlap resistance between the two between line and line.The relay that need move when simulating this fault is RELAY21, RELAY23, RELAY25, RELAY28, RELAY30, RELAY31, RELAY33 (internal resistance) or RELAY21, RELAY23, RELAY25, RELAY28, RELAY30, RELAY31, RELAY34 (non-essential resistance).Relay R ELAY21, RELAY23, RELAY25 action back I1 and O1 conducting; RELAY28, RELAY30, RELAY31 action back I2 and O2 conducting; RELAY33 moves and inserts resistance BRES between back two paths, thereby accomplishes the operation of overlap resistance between line and line.
3, advantage and effect:
Compared to like product, the failure mode that the present invention can simulate is greatly improved.The present invention can simulated failure various faults such as overlap resistance and output error between overlap resistance, line and line between crosstalk resistance on the solid height, solid low, line in the injected system, line and ground.The various faults that equipment possibly occur can both effectively obtain simulation, and then understands the situation of equipment under various different faults, so just can more effectively estimate the performance of equipment.
(4) description of drawings
Shown in Figure 1ly be that fault of the present invention injects analog board contour structures synoptic diagram;
Fig. 2 (a) is a fixed level socket synoptic diagram of the present invention;
Fig. 2 (b) is an outer meeting resistance socket synoptic diagram of the present invention;
Fig. 2 (c) is an external signal socket synoptic diagram of the present invention;
Fig. 2 (d) is the total interface synoptic diagram of input and output of the present invention;
Shown in Figure 3 is relay unit structural representation of the present invention;
Shown in Figure 4 is relay unit structural representation of the present invention;
Shown in Figure 5 is the present invention's five major break down module mutual relationship synoptic diagram;
Shown in Figure 6 is solid high module relay connection method synoptic diagram;
Shown in Figure 7 is to hang down module relay connection method synoptic diagram admittedly;
Shown in Figure 8 is output error module relay connection method synoptic diagram;
Shown in Figure 9 is crosstalk resistance---overlap resistance between line and the line---overlap resistance module relay connection method synoptic diagram between line and the ground on the line;
Shown in Figure 10 is the relay connection method synoptic diagram of series resistor part in the fault simulation;
Shown in Figure 11 is resistor network module relay connection method synoptic diagram.
Symbol description is following among the figure:
A1~A48 representes relay unit; EX_RES representes outer meeting resistance; EX-SIGNAL representes external input signal, and C1~C48 representes the control signal of fault injection control panel input; I1/I2, O1/O2 represent input signal cable 1/2, output signal line O1/O2; UTT_POWER representes the high level in the high admittedly module;
RES1/RES2 representes that two of outer meeting resistance are inserted pin; UTT-GND representes the low level in the low admittedly module, i.e. earth terminal; EX_SIGNAL1/EX_SIGNAL2 is an external input signal 1/2; GND representes earth terminal; VDD representes high level signal;
RELAY1~RELAY48 is relay; LED representes light emitting diode; Q representes diode; D representes triode; C, E, B represent collector, emitter, the base stage of triode respectively; R1, R2, R3 represent resistance; Numeral 1,4,6,8,13,16,11,19 is all represented the pin of relay;
R? Miscellaneous part in expression and the incomplete same relay unit of A1 relay unit.
Resistance LOW-RES1/LOW_RES2 and HIGH-RES1/HIGH_RES2 represent the series resistor in low admittedly fault simulation and the solid high fault simulation respectively;
Previous among the RELAY##-## " ## " represents the numbering of relay, and back one " ## " representes the pin of this relay;
ARES, BRES, RES, A-R1~AR-4, BR-1~BR-4 are resistance, and (wherein ARES is that A-R1~AR-4 combines, and BRES is that B-R1~BR-4 combines.); ARES1, ARES2 represent two incoming ends of resistance ARES; BRES1, BRES2 represent two incoming ends of resistance BRES respectively;
(5) embodiment
A kind of fault that can simulate various faults of the present invention is injected analog board; Its contour structures is 48 G6AU series relays of producing with Omron Corp relay unit that is core and fixed level socket, outer meeting resistance socket, external signal socket; The total interface of input and output is formed, and their position relation is as shown in Figure 1.A1~A48 is a relay unit among the figure, and the label of each relay unit is identical with the label of the relay that it contains.After correctly connecting relay unit,, just can accomplish the fault simulation on the unlike signal line through the break-make of control signal pilot relay.Admittedly the function of fixed level socket is to insert height/low level required when carrying out solid height/low fault simulation; The function of outer meeting resistance socket is to insert an outer meeting resistance; The function of external signal socket is to insert the required external signal of simulation output error fault; Input signal cable I1/I2, output signal line O1/O2, control signal C1~C48 are through the total interface entering/outgoing failure of input and output injection plate, and IO interface also provides the interface of high level VDD and earth terminal GND simultaneously.The detailed structure of each socket is seen shown in Fig. 2 (a)-Fig. 2 (d).
In 48 relay A1~A48, be connected in series a resistance between A2, A6, A12, the A16, the pin separately 8 of the relay R ELAY2 of these four unit, RELAY6, RELAY12, RELAY16 and pin 9; Resistor network is formed in these 8 unit of A39~A46 in addition, compares other unit and wants each many resistance.The circuit structure of all the other 36 relay units is identical---be the A1 unit is made up of relay R ELAY1, diode Q, LED light emitting diode, triode D, resistance R 1, R2, R3.Shown in Figure 3 is the circuit connecting mode of each parts among the A1.The pin 1 of relay is connected to+the 5V high level, series resistor R1 between the collector C of pin 16 and triode D, the output emitter E ground connection of triode; Series resistor R2 between the base stage B of triode D and the C1, C1 is connected to the I/O output port that fault is injected control panel through the total interface of input and output, after resistance of LED serial connection, is connected across 16 of pin 1 and the pins of relay.All the other by that analogy.
The effect that the fault of mentioning in the preceding text is injected control panel is to resolve the steering order that host computer transmits, and is converted into the input port high-low level of respective signal line, just the control signal of C1 port.If what the C1 end was given is high level, then triode conducting, this moment, pin 4 was connected with pin 6, and pin 13 is connected with pin 11, gives tacit consent to state for this reason when relay does not move.C1 holds given low level the time, and the LED conducting is shinny, is convenient to find the relay that has moved; The effect of diode Q is to prevent inverse current, and the effect of resistance R 1 is that the electric current in the circuit is excessive and surpass the tolerance limit of components and parts when preventing the triode conducting.
Shown in Figure 4 is the position relation of inner each element among the relay unit A1; R wherein? Miscellaneous part in expression and the incomplete same relay unit in A1 unit.Because each control circuit structure is formed all identical with connected mode with diode Q, LED; So in the figure of back, explaining; For simplicity, draw no longer one by one control circuit and diode Q, LED, relay and important resistance etc. only draw.
Wherein, the model specification of relay is the G6AU series that Omron Corp produces;
Wherein, the resistance of relay R ELAY2, RELAY6 serial connection is HIGH_RES1, HIGH_RES2, and its resistance is 30K Ω;
Wherein, the resistance of relay R ELAY12, RELAY16 serial connection is LOW_RES1, LOW_RES2, and its resistance is 30K Ω;
Wherein, the resistance of relay R ELAY39-RELAY42 serial connection is A_R1~A_R4, and its resistance is respectively 1K Ω, 10K Ω, 30K Ω, 75K Ω;
Wherein, the resistance of relay R ELAY43-RELAY46 serial connection is B_R1~B_R4, and its resistance is respectively 1K Ω, 10K Ω, 30K Ω, 75K Ω;
Wherein, the resistance of resistance R 1, R2, R3 is respectively 12 Ω, 2.5K Ω and 1K Ω.
For the connected mode between the relay unit is described, 48 relay units are divided into 5 big modules according to function and inner structure.This 5 modules is respectively crosstalk resistance---overlap resistance between line and the line---these five modules of overlap resistance between line and the ground on solid height, solid low, output error, resistor network and the line.Relation between each module is as shown in Figure 5.
Gu on high, solid low, output error, the line crosstalk resistance---overlap resistance between line and the line---between line and the ground input port of these four modules of overlap resistance receive in four branches of same input signal cable I1/I2; Output port is received in four branches of same output signal line O1/O2; The resistor network module is connected on the line crosstalk resistance---overlap resistance between line and the line---between line and the ground on the overlap resistance mould; Each module is connected with the control signal wire of fault injection control panel again separately.Input signal cable I1/I2, output signal line O1/O2, control signal wire all are connected to the total interface of input and output.
Should solid high module contain 8 relay units, it can be divided into identical two parts again.As shown in Figure 6: relay R ELAY1~RELAY4 and resistance HIGH_RES1 form the fault simulation circuit of the solid high module of input signal cable I1, I2, and relay R ELAY11~RELAY14 and resistance HIGH_RES2 form the solid high fault simulation circuit of output signal line O1, O2.The pin 16 of each relay all is connected to relay drive circuit, and pin one is then unified to be connected to+the 5V high level.The fixedly high level of UUT_POWER for being inserted through the fixed level socket.Gu the effect of high module is that the break-make through pilot relay just can be the fixedly high level fault on analog input signal line and the output signal line.Wherein the effect of resistance HIGH_RES1, HIGH_RES2 is that the electric current in the circuit is excessive when preventing the circuit connection.If realize that the relay that solid high fault simulation then need be moved on the I1 line is RELAY3, RELAY2 (selecting internal resistance for use) or RELAY3, RELAY1 (selecting non-essential resistance for use); If select internal resistance for use; Then after RELAY3, the RELAY2 action; Internal bus I1 links to each other with UUT_POWER through HIGH_RES1, and wherein UUT_POWER is the high level of measurand output.The solid high fault simulation similar process of other signal wires.、
This low admittedly module contains 8 relay units, and it can be divided into identical two parts again.As shown in Figure 7: relay R ELAY5~RELAY8 and resistance LOW_RES1 form the fault simulation circuit of low module admittedly of input signal cable I1, I2, and relay R ELAY15~RELAY18 and resistance LOW_RES2 form the low admittedly fault simulation circuit of output signal line O1, O2.The pin 16 of each relay all is connected to relay drive circuit, the then unified one+5V high level that is connected to of pin one.UUT_GND is an earth terminal.Admittedly the effect of low module is analog input signal line I1, I2 and output signal line O1, the last fixedly low level fault of O2.Wherein the effect of resistance LOW_RES1, LOW_RES2 is that the electric current in the circuit is excessive when preventing the circuit connection.If realize that the relay that the low admittedly fault simulation on the I1 line need be moved is RELAY7, RELAY6 (selecting internal resistance for use) or RELAY7, RELAY5 (selecting non-essential resistance for use).If select non-essential resistance for use, then after RELAY7, the RELAY6 action, input signal cable I1 is connected with ground wire through LOW_RES1, and ground wire is the low level of measurand output.Admittedly the low fault simulation similar process of other signal wires.
This output error module is made up of A9, A10, A19, these 4 relay units of A20, and it also can be divided into identical two parts, and its circuit structure is as shown in Figure 8.External signal line EX_SIGNAL1/EX_SIGNAL2 is connected to 13 pins of relay, and input signal cable I1/I2, output signal line O1/O2 are connected to the pin 9 of relay.With the I1 output error is example, needs the RELAY9 action during simulation output error, and then external signal is connected with I1, replaces original input signal with external signal, thereby realizes the fault simulation of output error.
This resistor network module contains 8 relay units.It also can be divided into identical two parts.As shown in Figure 11, relay R ELAY43~RELAY46, resistance B_R1~B_R4 form the resistance BRES that size can be regulated; Relay R ELAY39~RELAY42, resistance A_R1~A_R4 form the resistance ARES that size can be regulated.When the effect of electricity group network provides on the artificial line between crosstalk resistance, line and the ground between overlap resistance, line and the line these three kinds of faults of overlap resistance required in connecting resistance.Just can obtain the interior connecting resistance of different sizes through the break-make of pilot relay.For example: if regulate the size of BRES, B_R1 is excised from circuit, relay R ELAY43 action is got final product.In simulated fault signal, signal gets into from ARES1/BRES1, flows out from ARES2/BRES2, has so just accomplished the fault simulation of series resistor.
On this line crosstalk resistance---overlap resistance between line and the line---between line and the ground overlap resistance module contain 20 relay units altogether.Circuit connecting mode between each relay such as Fig. 9 and shown in Figure 10.This module can artificial line on these three kinds of faults of overlap resistance between overlap resistance, line and the ground between crosstalk resistance, line and the line.
When crosstalk hindered fault on the artificial line, needing the relay of action was RELAY21, RELAY23, RELAY37 (internal resistance) or RELAY21, RELAY23, RELAY35 (non-essential resistance).Realize that the relay that the crosstalk resistance needs to move on I1 and the O1 line is RELAY21, RELAY23, RELAY37 (internal resistance), perhaps RELAY21, RELAY23, RELAY35 (non-essential resistance).With string internal resistance between I1 and the O1 is example; Link to each other through resistance ARES between I1 and the O1 after RELAY21, RELAY23, these three actuatings of relay of RELAY37; Export from O1 from the signal that input signal cable I1 gets into, thereby realized the fault simulation that crosstalk hinders on the line.
The relay that need move during the overlap resistance fault simulation between artificial line and the ground is RELAY21, RELAY23, RELAY25, RELAY29, RELAY32, RELAY38 (internal resistance) or RELAY21, RELAY23, RELAY25, RELAY29, RELAY32, RELAY48 (non-essential resistance).Connecting the overlap joint internal resistance of back between ground with signal wire I1 and O1 is example; Relay R ELAY21, RELAY23, RELAY25 move later on then, and I1 is communicated with O1; The low level of O1 and measurand is connected through resistance BRES after RELAY29, RELAY32, the RELAY38 action, thereby has realized the fault simulation of overlap resistance between line and ground.
Overlap resistance is meant that I1 is communicated with O1 and I2 and O2 are communicated with back overlap resistance between the two between line and line.The relay that need move when simulating this fault is RELAY21, RELAY23, RELAY25, RELAY28, RELAY30, RELAY31, RELAY33 (internal resistance) or RELAY21, RELAY23, RELAY25, RELAY28, RELAY30, RELAY31, RELAY34 (non-essential resistance).Relay R ELAY21, RELAY23, RELAY25 action back I1 and O1 conducting; RELAY28, RELAY30, RELAY31 action back I2 and O2 conducting; RELAY33 moves and inserts resistance BRES between back two paths, thereby accomplishes the operation of overlap resistance between line and line.
Embodiment one
Specify the pattern mode of high fault admittedly in conjunction with Fig. 6.So-called solid higher position is fixing high level.With solid height on the input signal cable I1 line is example; Realize that the solid high relay that then need move is RELAY3, RELAY2 (selecting internal resistance for use) or RELAY3, RELAY1 (selecting non-essential resistance for use) on the I1 line; If select internal resistance for use; Then after RELAY3, the RELAY2 action, internal bus I1 links to each other with UUT_POWER through HIGH_RES1, and wherein UUT_POWER is the high level of measurand output.The solid high fault simulation process of O1, O2 is identical.
Embodiment two
Specify the implementation of solid low circuit fault mode in conjunction with Fig. 7.Select on the input signal cable I1 line solid lowly explain for example for use.Realize that the solid low relay that needs to move on the I1 line is RELAY7, RELAY6 (selecting internal resistance for use) or RELAY7, RELAY5 (selecting non-essential resistance for use).If select non-essential resistance for use, then after RELAY7, the RELAY6 action, input signal cable I1 is connected with ground wire through LOW_RES1, and wherein ground wire is the low level of measurand output.
The low admittedly fault simulation process of O1, O2 is identical.
Embodiment three
Specify the simulation process of output error fault in conjunction with Fig. 8.With input signal cable I1 output error is example, and the relay that need move during the simulation output error is RELAY9.After the RELAY9 action, the pin 13 of RELAY9 is connected with pin 9, and this moment, external signal was connected with I1, replaced original input signal with external signal, thereby had realized the fault simulation of output error.The output error fault simulation process of I2, O1, O2 is identical.
Embodiment four
Come the fault simulation implementation of crosstalk resistance on the open-wire line specifically in conjunction with Fig. 9 and Figure 10.Realize that the relay that the crosstalk resistance needs to move on the line is RELAY21, RELAY23, RELAY37 (internal resistance) or RELAY21, RELAY23, RELAY35 (non-essential resistance).With string internal resistance on signal wire I1 and the O1 line is example, is serially connected with a resistance ARES between the pin 6 of RELAY37 and the pin 11.After RELAY21, RELAY23, these three relay execution of RELAY37; 13 pins from the signal of I1 input from RELAY21 get into, and pass through pin 9 successively, pin 4 and the pin 6 of RELAY25; The pin 13,11 of RELAY37, series resistor R, pin 6,4; The pin 11,13 of REALY25, the pin 9,13 of RELAY23 is got back to bus from the output of O1 port at last.Such process has just been accomplished the fault simulation process of crosstalk resistance on the line.
Embodiment five
In conjunction with Fig. 9 and Figure 10 fault simulation implementation of overlap resistance between open-wire line and the ground specifically.Realize that the relay that this kind fault simulation need be moved is RELAY21, RELAY23, RELAY25, RELAY29, RELAY32, RELAY38 (internal resistance) or RELAY21, RELAY23, RELAY25, RELAY29, RELAY32, RELAY48 (non-essential resistance).Connecting the overlap joint internal resistance of back between ground with signal wire I1 and O1 is example; Relay R ELAY21, RELAY23, these three relays of RELAY25 pass through pin 13, the pin 9 of RELAY21 from the signal of I1 input, because the pin 8 of RELAY25 is connected with 9 quilts successively after accepting the control signal action; So signal is through the pin 4,8,9,13 of REALY25; Get into the RELAY23 relay afterwards, get back to bus through pin 9,13, this moment, I1 and O1 were communicated with.Pin 9 ground connection of RELAY32, and after RELAY29, RELAY32, RELAY38 action, the pin 9,13 of RELAY32; The pin 4,6 of RELAY31; The pin 13,11 of RELAY38, series resistor BRES, pin 6,4, the pin 11,13 of RELAY31, the pin 9,13 of RELAY29; O1 to the last forms a path, has so just realized the fault simulation of the overlap resistance between line and the ground.
Embodiment six
In conjunction with Fig. 9 and Figure 10 fault simulation process of overlap resistance between open-wire line and the line specifically.Overlap resistance between so-called line and the line is meant that I1 and O1 connect, and I2 and O2 connect simultaneously, again the between overlap resistance.The relay of realizing this fault simulation process need action is RE IAY21, RELAY23, RELAY25, RELAY28, RELAY30, RELAY31, RELAY33 (internal resistance) or RELAY21, RELAY23, RELAY25, RELAY28, RELAY30, RELAY31, RELAY34 (non-essential resistance).With overlap joint internal resistance BRES between the pin 8 of RELAY33 and pin 9 is example.After relay R ELAY21, RELAY23, the RELAY25 action, I1 and O1 conducting, that is described in its course of action and the embodiment five is identical.I2 and O2 conducting after REALY28, RELAY30, the RELAY31 action.After the RELAY33 action, inserted resistance BRES between two paths, thereby accomplished the operation of overlap resistance between line and the line.

Claims (7)

1. the fault that can simulate various faults is injected analog board; It is characterized in that: its contour structures is with 48 relays relay unit that is core and fixed level socket, outer meeting resistance socket, external signal socket; The total interface of input and output constitutes; 48 relays are arranged to 6 row, 8 rows by sequence number, and fixed level socket, outer meeting resistance socket, external signal socket and the total interface of input and output are positioned at the lower position of this analog board from left to right; Admittedly the function of this fixed level socket is to insert height/low level required when carrying out solid height/low fault simulation; The function of this outer meeting resistance socket is to insert an outer meeting resistance; The function of this external signal socket is to insert the required external signal of simulation output error fault; The total interface of these input and output provides the interface of high level VDD and earth terminal GND; In 48 relay A1~A48, be connected in series a resistance between A2, A6, A12, the A16, the pin separately 8 of the relay R ELAY2 of these four unit, RELAY6, RELAY12, RELAY16 and pin 9; The relay R ELAY39-RELAY46 of these 8 unit of A39~A46 forms resistor network; Compare other unit wants each to connect a resistance more; The circuit structure of all the other 36 relay units is identical---the circuit structure that is the A1 unit is made up of relay R ELAY1, diode Q, LED light emitting diode, triode D, resistance R 1, R2, R3; Its connected mode is that the pin 1 of relay is connected to+the 5V high level; Series resistor R1 between the collector C of pin 16 and triode D, the output emitter E ground connection of triode; Series resistor R2 between the base stage B of triode D and the C1, C1 is connected to the I/O output port that fault is injected control panel through the total interface of input and output, after resistance of LED serial connection, is connected across 16 of pin 1 and the pins of relay, and all the other are by that analogy;
48 relay unit inner structures are formed 5 big modules, and it is respectively that crosstalk hinders---overlap resistance between line and the line---these five modules of overlap resistance between line and the ground on solid height, solid low, output error, resistor network and the line; Gu on high, solid low, output error, the line crosstalk resistance---overlap resistance between line and the line---between line and the ground input port of these four modules of overlap resistance receive in four branches of same input signal cable I1/I2; Output port is received in four branches of same output signal line O1/O2; The resistor network module is connected on the line crosstalk resistance---overlap resistance between line and the line---between line and the ground on the overlap resistance; Each module is connected with the control signal wire of fault injection control panel again separately, and input signal cable I1/I2, output signal line O1/O2, control signal wire all are connected to the total interface of input and output;
Should solid high module contain 8 relay units, it is divided into identical two parts; Relay R ELAY1~RELAY4 and resistance HIGH_RES1 form the fault simulation circuit of the solid high module of input signal cable I1, I2; Relay R ELAY11~RELAY14 and resistance HIGH_RES2 form the fault simulation circuit of the solid high module of output signal line O1, O2; The pin 16 of each relay all is connected to relay drive circuit, and pin one is then unified to be connected to+the 5V high level; The fixedly high level of UUT_POWER for being inserted through the fixed level socket; Gu the function of high module is that break-make through pilot relay is with regard to the fixedly high level fault on analog input signal line and the output signal line; Wherein the effect of resistance HIGH_RES1, HIGH_RES2 is that the electric current in the circuit is excessive when preventing the circuit connection;
This low admittedly module contains 8 relay units, and it is divided into identical two parts; Relay R ELAY5~RELAY8 and resistance LOW_RES1 form the fault simulation circuit of low module admittedly of input signal cable I1, I2; Relay R ELAY15~RELAY18 and resistance LOW_RES2 form the fault simulation circuit of low module admittedly of output signal line O1, O2; The pin 16 of each relay all is connected to relay drive circuit, the then unified one+5V high level that is connected to of pin one; UUT_GND is an earth terminal, admittedly the function of low module is analog input signal line I1, I2 and output signal line O1, the last fixedly low level fault of O2; Wherein the effect of resistance LOW_RES1, LOW_RES2 is that the electric current in the circuit is excessive when preventing the circuit connection;
This output error module is made up of A9, A10, A19, these 4 relay units of A20; It is divided into identical two parts; External signal line EX_SIGNAL1/EX_SIGNAL2 is connected to 13 pins of relay, and input signal cable I1/I2, output signal line O1/O2 are connected to the pin 9 of relay;
This resistor network module contains 8 relay units, and it is divided into identical two parts; Relay R ELAY43~RELAY46, resistance B_R1~B_R4 form the resistance BRES that size can be regulated; Relay R ELAY39~RELAY42, resistance A_R1~A_R4 form the resistance ARES that size can be regulated; When the function of resistor network module provides on the artificial line between crosstalk resistance, line and the ground between overlap resistance, line and the line these three kinds of faults of overlap resistance needed in connecting resistance, just obtain the interior connecting resistances of different sizes through the break-make of pilot relay;
On this line crosstalk resistance---overlap resistance between line and the line---between line and the ground overlap resistance module contain 20 relay units altogether, this module can artificial line on these three kinds of faults of overlap resistance between overlap resistance, line and the ground between crosstalk resistance, line and the line; During crosstalk resistance fault, the relay that internal resistance need move is RELAY21, RELAY23, RELAY37 on the artificial line, and perhaps the non-essential resistance relay that need move is RELAY21, RELAY23, RELAY35; When realizing on I1 and the O1 line crosstalk resistance, the relay that internal resistance need move is RELAY21, RELAY23, RELAY37, and perhaps the non-essential resistance relay that need move is RELAY21, RELAY23, RELAY35;
Between artificial line and the ground during overlap resistance fault simulation; The relay that internal resistance need move is RELAY21, RELAY23, RELAY25, RELAY29, RELAY32, RELAY38, and perhaps the non-essential resistance relay that need move is RELAY21, RELAY23, RELAY25, RELAY29, RELAY32, RELAY48;
Overlap resistance is meant that I1 is communicated with O1 and I2 and O2 are communicated with back overlap resistance between the two between line and line; When simulating this fault; The relay that internal resistance need move is RELAY21, RELAY23, RELAY25, RELAY28, RELAY30, RELAY31, RELAY33, and perhaps the non-essential resistance relay that need move is RELAY21, RELAY23, RELAY25, RELAY28, RELAY30, RELAY31, RELAY34; Relay R ELAY21, RELAY23, RELAY25 action back I1 and O1 conducting; RELAY28, RELAY30, RELAY31 action back I2 and O2 conducting; RELAY33 moves and inserts resistance BRES between back two paths, thereby accomplishes the operation of overlap resistance between line and line.
2. a kind of fault that can simulate various faults according to claim 1 is injected analog board, it is characterized in that: the resistance of relay R ELAY2, RELAY6 serial connection is HIGH_RES1, HIGH_RES2, and its Standard resistance range is 25K~35K Ω.
3. a kind of fault that can simulate various faults according to claim 1 is injected analog board, it is characterized in that: the resistance of relay R ELAY12, RELAY16 serial connection is LOW_RES1, LOW_RES2, and its Standard resistance range is 25K~35K Ω.
4. a kind of fault that can simulate various faults according to claim 1 is injected analog board; It is characterized in that: the resistance of relay R ELAY39-RELAY42 serial connection is A_R1~A_R4, and its Standard resistance range is respectively 1K~2K Ω, 10K~12K Ω, 30K~35K Ω, 70K~80K Ω.
5. a kind of fault that can simulate various faults according to claim 1 is injected analog board; It is characterized in that: the resistance of relay R ELAY43-RELAY46 serial connection is B_R1~B_R4, and its Standard resistance range is respectively 1K~2K Ω, 10K~12K Ω, 30K~35K Ω, 70K~80K Ω.
6. a kind of fault that can simulate various faults according to claim 1 is injected analog board, and it is characterized in that: the Standard resistance range of resistance R 1, R2, R3 is respectively 10~15 Ω, 2.3K~3K Ω and 1K~1.5K Ω.
7. a kind of fault that can simulate various faults according to claim 1 is injected analog board, it is characterized in that: the model specification of relay is the G6AU series that Omron Corp produces.
CN 201110349702 2011-11-08 2011-11-08 Fault injection simulation board capable of simulating multiple faults Expired - Fee Related CN102508452B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201110349702 CN102508452B (en) 2011-11-08 2011-11-08 Fault injection simulation board capable of simulating multiple faults

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201110349702 CN102508452B (en) 2011-11-08 2011-11-08 Fault injection simulation board capable of simulating multiple faults

Publications (2)

Publication Number Publication Date
CN102508452A true CN102508452A (en) 2012-06-20
CN102508452B CN102508452B (en) 2013-07-03

Family

ID=46220553

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 201110349702 Expired - Fee Related CN102508452B (en) 2011-11-08 2011-11-08 Fault injection simulation board capable of simulating multiple faults

Country Status (1)

Country Link
CN (1) CN102508452B (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105353755A (en) * 2015-12-15 2016-02-24 中国航空工业集团公司北京长城航空测控技术研究所 Multifunctional fault injection device based on PXI bus
CN109163602A (en) * 2018-07-06 2019-01-08 中国航空综合技术研究所 A kind of portable radio-frequency Fault Insertion Equipment for field testing verification test
CN111141501A (en) * 2019-12-13 2020-05-12 中国航空综合技术研究所 Test case generation system and method for testability test of airborne equipment
CN112858833A (en) * 2019-11-12 2021-05-28 中车株洲电力机车研究所有限公司 Test equipment and test method for simulating train communication cable fault

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5218307A (en) * 1990-11-02 1993-06-08 Alcan Aluminum Corporation Fault detection circuit and method for testing a multiple conductor cable having a shield
FR2817972A1 (en) * 2000-12-12 2002-06-14 France Telecom SYSTEM FOR DETECTING A CABLE FAILURE IN A TREE NETWORK
CN1450740A (en) * 2002-04-08 2003-10-22 华为技术有限公司 Multi-function fault implanting machine
CN1658215A (en) * 2004-02-20 2005-08-24 高放 Fault simulation system of electronic equipment
CN201804269U (en) * 2010-03-09 2011-04-20 上海固泰科技有限公司 Resistor and capacitor matrix
CN102092477A (en) * 2010-11-30 2011-06-15 中国民航大学 Device and method for automatic test and fault diagnosis of plane audio integrated system
CN201877066U (en) * 2009-11-11 2011-06-22 李峰 Automatic simulating device for faults of automobile electric system
CN202548577U (en) * 2011-11-08 2012-11-21 北京航空航天大学 A fault injection breadboard capable of simulating a plurality of faults

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5218307A (en) * 1990-11-02 1993-06-08 Alcan Aluminum Corporation Fault detection circuit and method for testing a multiple conductor cable having a shield
FR2817972A1 (en) * 2000-12-12 2002-06-14 France Telecom SYSTEM FOR DETECTING A CABLE FAILURE IN A TREE NETWORK
CN1450740A (en) * 2002-04-08 2003-10-22 华为技术有限公司 Multi-function fault implanting machine
CN1658215A (en) * 2004-02-20 2005-08-24 高放 Fault simulation system of electronic equipment
CN201877066U (en) * 2009-11-11 2011-06-22 李峰 Automatic simulating device for faults of automobile electric system
CN201804269U (en) * 2010-03-09 2011-04-20 上海固泰科技有限公司 Resistor and capacitor matrix
CN102092477A (en) * 2010-11-30 2011-06-15 中国民航大学 Device and method for automatic test and fault diagnosis of plane audio integrated system
CN202548577U (en) * 2011-11-08 2012-11-21 北京航空航天大学 A fault injection breadboard capable of simulating a plurality of faults

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
石君友等: "《自动控制故障注入设备的设计与实现》", 《航空学报》, vol. 28, no. 3, 31 May 2007 (2007-05-31), pages 556 - 560 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105353755A (en) * 2015-12-15 2016-02-24 中国航空工业集团公司北京长城航空测控技术研究所 Multifunctional fault injection device based on PXI bus
CN105353755B (en) * 2015-12-15 2018-05-01 中国航空工业集团公司北京长城航空测控技术研究所 Multi-functional fault injection device based on PXI buses
CN109163602A (en) * 2018-07-06 2019-01-08 中国航空综合技术研究所 A kind of portable radio-frequency Fault Insertion Equipment for field testing verification test
CN112858833A (en) * 2019-11-12 2021-05-28 中车株洲电力机车研究所有限公司 Test equipment and test method for simulating train communication cable fault
CN111141501A (en) * 2019-12-13 2020-05-12 中国航空综合技术研究所 Test case generation system and method for testability test of airborne equipment
CN111141501B (en) * 2019-12-13 2021-06-29 中国航空综合技术研究所 Test case generation system and method for testability test of airborne equipment

Also Published As

Publication number Publication date
CN102508452B (en) 2013-07-03

Similar Documents

Publication Publication Date Title
CN202548577U (en) A fault injection breadboard capable of simulating a plurality of faults
CN203405728U (en) Automatic test system of vehicle electronic control unit
CN204595599U (en) Based on the automobile electronic controller general-utility test platform of CANoe
CN102508452B (en) Fault injection simulation board capable of simulating multiple faults
CN102361346B (en) Master station full-digital scene testing method of power distribution automation system
CN101413990B (en) Method and system for testing on site programmable gate array
CN103186441A (en) Switching circuit
CN105353755B (en) Multi-functional fault injection device based on PXI buses
CN204116942U (en) Vehicle-mounted electronic control unit LIN bus communication automatic test device
CN105975369A (en) Automatic testing environment configuration device for vehicle-mounted network unit
CN103281226B (en) A kind of MVB device address configuration system and method based on TCN
CN104280648A (en) Automatic adapting cable test device and method
CN102901905A (en) Parallel bus testing device and method
CN106445857A (en) Master-slave system, configuration method of bus address in master-slave system, and slaves
CN204789920U (en) A FPGA disposes system for integrated circuit test
CN101140314A (en) On-site programmable gate array wire laying channel verification method and system thereof
CN203502534U (en) Circuit fault simulation device for automobile engine management system
CN210742925U (en) Simulator interface switching circuit board and development test system
CN102929651B (en) Chip-array-based on-line loading system and loading method thereof
CN109085489B (en) Back plate function test system, design method and test method
CN203825133U (en) VGA cable testing instrument
CN203773344U (en) Engine signal analog simulation test bench
CN107479411B (en) Device and method for field programmable control of chip IO
CN105676051A (en) Integrated line sequence testing device and method
CN113406478A (en) Many functional safety hardware test fixture

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20130703

Termination date: 20151108

EXPY Termination of patent right or utility model