CN102486992A - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor device Download PDFInfo
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- CN102486992A CN102486992A CN2010105771854A CN201010577185A CN102486992A CN 102486992 A CN102486992 A CN 102486992A CN 2010105771854 A CN2010105771854 A CN 2010105771854A CN 201010577185 A CN201010577185 A CN 201010577185A CN 102486992 A CN102486992 A CN 102486992A
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Abstract
The invention discloses a manufacturing method of a semiconductor device. The manufacturing method comprises the following steps of: a) preparing a wafer with a wafer front surface and a wafer back surface, and carrying out at least one part of procedures in the procedures of forming a back-electrode structure part on the wafer back surface; b) laminating a supporting substrate on the wafer back surface; c) carrying out thinning treatment on the wafer on the wafer front surface, and carrying out process treatment on a front-surface main body structure part and a front-surface electrode structure part which form the semiconductor device on the wafer front surface subjected to the thinning treatment; and d) removing the supporting substrate from the wafer back surface. According to the manufacturing method, since the at least one part of procedures in the procedures of forming the back-electrode structure part on the wafer back surface is carried out before the thinning treatment is carried out on the wafer and the supporting substrate is laminated on the wafer before the thinning treatment is carried out, almost all the procedures are carried out under the condition with larger thickness, so that the possibility that the wafer is broken during the process treatment can be reduced to an extremely-large extent.
Description
Technical field
The present invention relates to field of semiconductor manufacture, specifically, relate to a kind of manufacturing approach of semiconductor device.
Background technology
Current, electronics industry has surpassed traditional industries such as iron and steel, automobile on the industry total value.Along with the very fast development of human society, also increasingly high to the requirement of electronics industry, thereby continue to bring out out a lot of new materials, new technology, to obtain more high performance product.Yet, in any case the manufacturing of semiconductor device all is the basis of electronics industry.
The manufacture process of semiconductor device is comparatively ripe at present, and the manufacture process of traditional semiconductor device mainly comprises preparation wafer, oxidation, photoetching, etching, ion injection, Metal Deposition and encapsulation etc.
Generally, when making semiconductor device, the agent structure part and the electrode structure of semiconductor device partly all is formed on the same surface as the wafer of substrate, all is formed on the front of wafer usually.Here the electrode structure of so-called semiconductor device partly is meant the structure division that this semiconductor device is electrically connected with other elements, for example can comprise a plurality of electrodes, like base stage, emitter etc.; The agent structure part of so-called semiconductor device then is meant the remainder except the electrode structure part of this semiconductor device, as comprises source region, drain region, well region etc.
In addition, can also on the different surfaces of wafer, form the agent structure part and the electrode structure part of semiconductor device respectively.For example, can be processed to form the agent structure part and the front electrode structure division of semiconductor device, be processed to form the backplate structure division of semiconductor device simultaneously at the back side of wafer in the front of wafer.
Fig. 1 to Fig. 3 has just schematically illustrated the technology manufacturing process that is processed to form the electrode structure part at the front and back of wafer.
At first, as shown in Figure 1, the wafer 100 with thickness L is provided, this wafer 100 has wafer frontside 101 and wafer rear 102.Utilize traditional method of manufacturing technology to carry out PROCESS FOR TREATMENT, to form the agent structure part and the front electrode structure division of semiconductor device in the wafer frontside 101 of wafer 100.
Then, the wafer rear 102 of wafer 100 being processed, is attenuate wafer rear 102 ' with wafer rear 102 attenuates, and the thickness that makes wafer 100 is L ', and wherein L '＜L is as shown in Figure 2.
Next, attenuate wafer rear 102 ' is carried out PROCESS FOR TREATMENT (like ion injection, high annealing and plated metal etc.), form the backplate structure division to go up, thereby accomplish the manufacturing of semiconductor device at attenuate wafer rear 102 ', as shown in Figure 3.
Yet; The defective of this prior manufacturing method is: owing to form the technical process of backplate structure division is on the attenuate wafer rear 102 ' behind the attenuate, to carry out; When therefore on attenuate wafer rear 102 ', carrying out the PROCESS FOR TREATMENT of backplate structure division, the thickness of wafer is thin (being L ') relatively; And, in the process treatment process that carries out the backplate structure division, need move wafer usually, processing such as high temperature cooling, cleaning, drying, thereby cause vibratory impulse to wafer, it is cracked to cause wafer to occur easily, causes this wafer loss.
Therefore, when making semiconductor device according to traditional above-mentioned manufacturing approach, the rate of finished products of product is relatively low.
Summary of the invention
The purpose of this invention is to provide a kind of manufacturing approach that has than the semiconductor device of high finished product rate.
To achieve these goals; According to an aspect of the present invention; A kind of manufacturing approach of semiconductor device is provided; This manufacturing approach comprises: a) preparation has the wafer of wafer frontside and wafer rear, and on said wafer rear, forms at least a portion operation in the operation of backplate structure division; B) support substrates is layered on the said wafer rear; C) on said wafer frontside, said wafer is carried out reduction processing, on the wafer frontside after the reduction processing, form the positive agent structure part of said semiconductor device and the PROCESS FOR TREATMENT of front electrode structure division; D) said support substrates is removed from said wafer rear.
Preferably, in said step a), the operation of on said wafer rear, carrying out comprises that ion injects and high annealing.
Preferably, also comprise: after accomplishing the ion injection, in the enterprising row metal deposition of said wafer rear in the operation of carrying out on the said wafer rear.
Preferably, said step d) comprises, after removing said support substrates, in the enterprising row metal deposition of said wafer rear.
Preferably, said step b) comprises said support substrates is bonded on the said wafer rear.
Preferably, said step b) also comprises carries out annealing in process to said wafer and support substrates, to strengthen the bond strength between said support substrates and the said wafer rear.
Preferably, said step b) comprises said support substrates is adhered on the said wafer rear through adhesive that said step d) comprises utilizes lytic agent that said adhesive is dissolved, thereby said support substrates is removed from said wafer rear.
Preferably, said support substrates has through-hole structure, and after being adhered to said support substrates on the said wafer rear, this through-hole structure communicates with adhesive surface between this support substrates and the said wafer rear.
Preferably; Said step c) also is included in before the PROCESS FOR TREATMENT to positive agent structure part that forms said semiconductor device on the wafer frontside after the reduction processing and front electrode structure division, and the wafer frontside after the said reduction processing is carried out polishing.
Preferably, said step c) attaches diaphragm after also being included in and forming said positive agent structure part and front electrode structure division on said wafer frontside.
According to technical scheme of the present invention; Owing at least a portion operation in the operation that before wafer being carried out reduction processing, just on wafer rear, forms the backplate structure division; And; Carrying out before the attenuate also in wafer laminated support substrates, therefore nearly all operation all is under the thicker situation of thickness, to carry out, thereby has avoided under the situation of thinner thickness wafer rear to wafer to carry out the defective of PROCESS FOR TREATMENT (like the ion injection etc.); Can reduce wafer largely and broken possibility in process treatment process, occur, to realize the object of the invention.
Other features and advantages of the present invention will partly specify in embodiment subsequently.
Description of drawings
Accompanying drawing is to be used to provide further understanding of the present invention, and constitutes the part of specification, is used to explain the present invention with following embodiment, but is not construed as limiting the invention.In the accompanying drawings:
Fig. 1 to Fig. 3 is processed to form the sketch map of the traditional handicraft manufacturing process of electrode structure part for the front and back of wafer;
Fig. 4 to Fig. 8 is the sketch map of manufacturing approach according to the preferred embodiment of the present invention.
Embodiment
Be elaborated below in conjunction with the accompanying drawing specific embodiments of the invention.Should be understood that embodiment described herein only is used for explanation and explains the present invention, is not limited to the present invention.
In the present invention, so-called wafer rear and wafer frontside are relative notions, i.e. two opposite surfaces on wafer.If any surface in these two opposite surfaces is defined as wafer frontside, then another opposite surfaces is a wafer rear.
The invention provides a kind of manufacturing approach of semiconductor device, this manufacturing approach comprises:
A) preparation has the wafer 100 of wafer frontside 101 and wafer rear 102, and on said wafer rear 102, forms at least a portion operation in the operation of backplate structure division;
B) support substrates 103 is layered on the said wafer rear 102;
C) on said wafer frontside 101, said wafer 100 is carried out reduction processing, on the wafer frontside after the reduction processing 101, form the positive agent structure part of said semiconductor device and the PROCESS FOR TREATMENT of front electrode structure division;
D) said support substrates 103 is removed from said wafer rear 102.
As basic material in the semi-conductor industry, wafer 100 is the used silicon wafers of Si semiconductor production of integrated circuits.Wafer 100 can obtain through traditional manufacturing process, wafer 100 itself is not described in detail here.
As stated, wafer 100 has wafer frontside 101 and wafer rear 102.Wafer 100 is being carried out PROCESS FOR TREATMENT when making semiconductor device; Structural design to dissimilar semiconductor device; Can only carry out PROCESS FOR TREATMENT to wafer frontside 101 or wafer rear 102; Can also carry out PROCESS FOR TREATMENT to wafer frontside 101 and wafer rear 102, method provided by the present invention is applicable to the occasion of wafer frontside 101 and wafer rear 102 all being carried out PROCESS FOR TREATMENT.Be particularly useful for being processed to form the occasion of the backplate structure division of semiconductor device simultaneously at wafer rear 102 as be processed to form the agent structure part and the front electrode structure division of semiconductor device in wafer frontside 101.
In the manufacturing approach of semiconductor device provided by the present invention,, at first on the wafer rear 102 of wafer 100, form at least a portion operation in the operation of backplate structure division for the wafer that provides 100.That is to say that (promptly under the higher relatively state of the thickness of wafer 100) do not form at least a portion operation in the operation of backplate structure division before wafer 100 also carries out reduction processing.Therefore; In classical production process; The operation that forms the backplate structure division is that (promptly under the relatively thin state of the thickness of wafer 100) carries out after wafer 100 has carried out reduction processing; Compare thereby cause wafer 100 to occur cracked problem easily, obviously can reduce wafer 100 largely and cracked possibility occur.
The backplate structure division can be to carry out PROCESS FOR TREATMENT through the wafer rear 102 to wafer 100 to comprise like electrode structure parts such as base stage, emitters with formation.
As stated, can on the wafer rear 102 of wafer 100, form at least a portion operation in the operation of backplate structure division.That is to say, can form the part operation of the operation of backplate structure division, perhaps form whole operations (promptly accomplishing the backplate structure division) of the operation of backplate structure division.
Usually, the operation of formation backplate structure division mainly comprises ion injection, cleaning, drying, high annealing and Metal Deposition etc.Therefore, under the preferable case, in step a); On the wafer rear 102 of the wafer that is provided 100, carry out the bigger operation of structural strength influence to wafer 100; That is to say,, then be easy to cause the cracked of wafer 100 if after wafer 100 carries out attenuate, carry out this operation again.
For example, preferably, in said step a), the operation of on said wafer rear 102, carrying out can comprise that ion injects and high annealing.Inject through ion, can in said wafer rear 102, form impurity layer (shown in dotted portion among Fig. 4), after the completion ion injects; Wafer 100 is carried out high annealing; Thereby with said ion-activated, to help carrying out PROCESS FOR TREATMENT subsequently, like Metal Deposition.Certainly, between ion injection and high annealing, also can carry out other aided process,, no longer aided process commonly used in the field of semiconductor manufacture described in detail here like cleaning, drying etc.
Further preferably, also can comprise: after accomplishing the ion injection, in said wafer rear 102 enterprising row metals depositions in the operation of carrying out on the said wafer rear 102.In this case, before wafer 100 is carried out reduction processing, on wafer rear 102, accomplish the backplate structure division, for example, accomplished the formation of backplate (like emitter).
Certainly, as stated, also can after attenuate, finally accomplish the formation of backplate structure division, for example, said step d) comprises, after removing said support substrates 103, in said wafer rear 102 enterprising row metal depositions.This is because the operation of Metal Deposition is not very big for the influence of the structural strength of wafer 100, therefore, accomplishes the operation that the laggard row metal of reduction processing deposits when wafer 100, can not make wafer 100 cracked possibility occur yet and increase.And, be placed on (promptly as last operation) in the step d) owing to will finally accomplish the Metal Deposition of backplate structure division, therefore can obtain the more backplate structure of quality.
In step b); Promptly after the wafer rear 102 of wafer 100 has carried out forming at least a portion operation in the operation of backplate structure division; As shown in Figure 5; Support substrates 103 is layered on the wafer rear 102 (at this moment, this wafer rear 102 is to have carried out through after the processing of step a).
And support substrates 103 can be attached on the wafer rear 102 through various suitable methods, and for example, the substrate for silicon is processed can be bonded to this support substrates 103 on the wafer rear 102.Because the silicon substrate processing technology is comparatively ripe, so the planarization of bonding surface is better behind the bonding.
Preferably, said step b) also can comprise carries out annealing in process to wafer 100 and support substrates 103, to strengthen the bond strength between said support substrates 103 and the said wafer rear 102.For example, support substrates 103 can be bonded on the wafer rear 102 through dielectric layer 104, and dielectric layer 104 can be processed by silicon dioxide and/or silicon nitride, is preferably processed by silicon dioxide.
Perhaps; For the substrate of processing by the glass/quartz that like sapphire or main component is silicon dioxide; Can this support substrates 103 be adhered on the wafer rear 102 through adhesive, only otherwise can cause adverse effect to get final product the backplate structure division that wafer rear 102 has formed or tentatively accomplished.For this situation, adhesive can be selected various suitable bonding; For bonding support substrates 103; In steps d, can utilize lytic agent with adhesive solvent, thereby remove support substrates 103; Promptly realize separating of support substrates 103 and wafer rear 102, for example can support substrates 103 and wafer 100 be immersed in the lytic agent so that adhesive is dissolved.Here, adhesive can for example for the polyimides as adhesive, can utilize organic solvent of ketone as lytic agent, like acetone solvent for selecting to have the adhesive of corresponding lytic agent.
But the present invention is not limited to this, and adhesive can be double faced adhesive tape, therefore can support substrates 103 be separated in wafer 100 through the mode that machinery is torn.Perhaps, adhesive also can be resin material, can support substrates 103 be separated through the method for mechanical damage.Moreover, can select thermoplastic adhesives, make adhesive failure through heating, thereby support substrates 103 is separated.Can also change the character of adhesive through the method for ultraviolet irradiation, thereby make adhesive can be dissolved in (this technology is comparatively ripe in the PCB manufacturing process, is not described in detail) in the etching liquid here.
In addition; Preferably; In order to guarantee fully contacting of adhesive and lytic agent; Can adopt the support substrates 103 with through-hole structure, after being adhered to said support substrates 103 on the said wafer rear 102, this through-hole structure communicates with adhesive surface between this support substrates 103 and the wafer rear 102.Because support substrates 103 has through-hole structure, and this through-hole structure communicates with the adhesive surface of this support substrates 103 and wafer rear 102, so lytic agent can be in contact with one another with adhesive through said through-hole structure, dissolves to make adhesive effectively.
Through-hole structure can adopt multiple mode and process, and for example can form this through-hole structure through the mode of machining, perhaps integrally formed said through-hole structure when making support substrates 103.In addition, the set-up mode of through-hole structure also can be selected suitable manner, as long as can allow to lead to the adhesive surface of this support substrates 103 and wafer rear 102 after bonding with wafer rear 102.
For example, through-hole structure can comprise a plurality of through holes that run through support substrates 103.
After support substrates 103 is laminated to wafer rear 102, again wafer frontside 101 is carried out reduction processing, so that the thickness of wafer 100 is reduced to preset thickness.As shown in Figure 6, wafer frontside 101 forms attenuate wafer frontside 101 ' through behind the attenuate, in this case, on attenuate wafer frontside 101 ', forms the positive agent structure part of said semiconductor device and the PROCESS FOR TREATMENT of front electrode structure division.Can process attenuate wafer frontside 101 ' through traditional PROCESS FOR TREATMENT (like oxidation, photoetching, etching, ion injection, Metal Deposition etc.), thereby form positive agent structure part and front electrode structure division, therefore just be not described in detail here.
Owing to support substrates 103 arranged in that the wafer rear of wafer 100 102 is range upon range of, therefore, when attenuate wafer frontside 101 ' is carried out processes, can not cause adverse effect to wafer 100, the possibility that can not make wafer 100 defective such as cracked occur increases.In other words, also be to guarantee that manufacturing approach of the present invention can obtain one of factor than high finished product rate through range upon range of support substrates 103.
Preferably; Said step c) also is included in before the PROCESS FOR TREATMENT to positive agent structure part that forms said semiconductor device on the wafer frontside after the reduction processing 101 (being attenuate wafer frontside 101 ') and front electrode structure division, and the wafer frontside after the said reduction processing 101 is carried out polishing.
Through the wafer frontside after the reduction processing 101 is carried out polishing; Thereby make the wafer frontside 101 after this reduction processing have higher surface accuracy; To help the forming positive agent structure part of said semiconductor device and the technology of front electrode structure division, obtain higher quality.
Because in step d); Need support substrates 103 be removed from wafer rear 102; To expose the backplate structure division (as shown in Figure 7) that in wafer rear 102, forms, therefore, under the preferable case; Said step c) attaches diaphragm after also being included in and forming said positive agent structure part and front electrode structure division on said wafer frontside 101.Therefore, when in steps d, utilizing suitable method to remove support substrates 103, can protect positive agent structure part and the front electrode structure division accomplished.
As stated, if in step a), only carried out forming the part in the operation of backplate structure division, then step d) also need be in wafer rear 102 enterprising row metals depositions (as shown in Figure 8).And if in step a), accomplished the operation that forms the backplate structure division, then completing steps d) after, just do not need again wafer rear 102 to be formed the additional process of backplate structure division.
More than combine accompanying drawing to describe preferred implementation of the present invention in detail; But; The present invention is not limited to the detail in the above-mentioned execution mode; In technical conceive scope of the present invention, can carry out multiple simple variant to technical scheme of the present invention, these simple variant all belong to protection scope of the present invention.
Need to prove that in addition each the concrete technical characterictic described in above-mentioned embodiment under reconcilable situation, can make up through any suitable manner, and be not limited to the adduction relationship of each item claim in claims.For fear of unnecessary repetition, the present invention is to the explanation no longer separately of various possible compound modes.
In addition, also can carry out combination in any between the various execution mode of the present invention, as long as it is without prejudice to thought of the present invention, it should be regarded as the disclosed content of the present invention equally.
Claims (10)
1. the manufacturing approach of a semiconductor device, this manufacturing approach comprises:
A) preparation has the wafer (100) of wafer frontside (101) and wafer rear (102), and on said wafer rear (102), forms at least a portion operation in the operation of backplate structure division;
B) support substrates (103) is layered on the said wafer rear (102);
C) upward said wafer (100) is carried out reduction processing in said wafer frontside (101), on the wafer frontside after the reduction processing (101), form the positive agent structure part of said semiconductor device and the PROCESS FOR TREATMENT of front electrode structure division;
D) said support substrates (103) is removed from said wafer rear (102).
2. manufacturing approach according to claim 1, wherein, in said step a), the operation of on said wafer rear (102), carrying out comprises that ion injects and high annealing.
3. manufacturing approach according to claim 2 wherein, also comprises in the operation of carrying out on the said wafer rear (102): after accomplishing the ion injection, in the enterprising row metal deposition of said wafer rear (102).
4. manufacturing approach according to claim 2, wherein, said step d) comprises, after removing said support substrates (103), in the enterprising row metal deposition of said wafer rear (102).
5. according to any described manufacturing approach among the claim 1-4, wherein, said step b) comprises said support substrates (103) is bonded on the said wafer rear (102).
6. manufacturing approach according to claim 5, wherein, said step b) also comprises carries out annealing in process to said wafer (100) and support substrates (103), to strengthen the bond strength between said support substrates (103) and the said wafer rear (102).
7. according to any described manufacturing approach among the claim 1-4, wherein, said step b) comprises said support substrates (103) is adhered on the said wafer rear (102) through adhesive; Said step d) comprises utilizes lytic agent that said adhesive is dissolved, thereby said support substrates (103) is removed from said wafer rear (102).
8. manufacturing approach according to claim 7; Wherein, Said support substrates (103) has through-hole structure; After said support substrates (103) being adhered to said wafer rear (102) and going up, this through-hole structure communicates with adhesive surface between this support substrates (103) and the said wafer rear (102).
9. manufacturing approach according to claim 1; Wherein, Said step c) also is included in before the PROCESS FOR TREATMENT to positive agent structure part that forms said semiconductor device on the wafer frontside after the reduction processing (101) and front electrode structure division, and the wafer frontside after the said reduction processing (101) is carried out polishing.
10. manufacturing approach according to claim 1, wherein, said step c) goes up the attaching diaphragm in said wafer frontside (101) after also being included in and forming said positive agent structure part and front electrode structure division.
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| CN2010105771854A CN102486992A (en) | 2010-12-01 | 2010-12-01 | Manufacturing method of semiconductor device |
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| CN2010105771854A CN102486992A (en) | 2010-12-01 | 2010-12-01 | Manufacturing method of semiconductor device |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103094094A (en) * | 2013-02-04 | 2013-05-08 | 武汉电信器件有限公司 | Prepared method of ultrathin semiconductor chip |
| CN105390408A (en) * | 2014-09-03 | 2016-03-09 | 中芯国际集成电路制造(上海)有限公司 | Wafer structure and thinning method therefor |
| WO2017219817A1 (en) * | 2016-06-22 | 2017-12-28 | 厦门三安光电有限公司 | Upside-down light-emitting diode and manufacturing method therefor |
| CN109830458A (en) * | 2019-02-15 | 2019-05-31 | 长江存储科技有限责任公司 | Wafer support structure and forming method thereof |
| CN109830457A (en) * | 2019-02-15 | 2019-05-31 | 长江存储科技有限责任公司 | Semiconductor devices and forming method thereof |
| WO2020093228A1 (en) * | 2018-11-06 | 2020-05-14 | Shenzhen Xpectvision Technology Co., Ltd. | Packaging methods of semiconductor devices |
| WO2020211089A1 (en) * | 2019-04-19 | 2020-10-22 | 福建晶安光电有限公司 | Method for preparing optoelectronic semiconductor chip and bonding wafer used therein |
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Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103094094A (en) * | 2013-02-04 | 2013-05-08 | 武汉电信器件有限公司 | Prepared method of ultrathin semiconductor chip |
| CN103094094B (en) * | 2013-02-04 | 2015-03-25 | 武汉电信器件有限公司 | Prepared method of ultrathin semiconductor chip |
| CN105390408A (en) * | 2014-09-03 | 2016-03-09 | 中芯国际集成电路制造(上海)有限公司 | Wafer structure and thinning method therefor |
| WO2017219817A1 (en) * | 2016-06-22 | 2017-12-28 | 厦门三安光电有限公司 | Upside-down light-emitting diode and manufacturing method therefor |
| US11056669B2 (en) | 2016-06-22 | 2021-07-06 | Xiamen San'an Optoelectronics Co., Ltd. | Flip-chip light emitting diode and manufacturing method thereof |
| WO2020093228A1 (en) * | 2018-11-06 | 2020-05-14 | Shenzhen Xpectvision Technology Co., Ltd. | Packaging methods of semiconductor devices |
| CN112889130A (en) * | 2018-11-06 | 2021-06-01 | 深圳帧观德芯科技有限公司 | Packaging method of semiconductor device |
| US11581361B2 (en) | 2018-11-06 | 2023-02-14 | Shenzhen Xpectvision Technology Co., Ltd. | Packaging methods of semiconductor devices |
| TWI827688B (en) * | 2018-11-06 | 2024-01-01 | 大陸商深圳幀觀德芯科技有限公司 | Packaging methods of semiconductor devices |
| CN109830458A (en) * | 2019-02-15 | 2019-05-31 | 长江存储科技有限责任公司 | Wafer support structure and forming method thereof |
| CN109830457A (en) * | 2019-02-15 | 2019-05-31 | 长江存储科技有限责任公司 | Semiconductor devices and forming method thereof |
| WO2020211089A1 (en) * | 2019-04-19 | 2020-10-22 | 福建晶安光电有限公司 | Method for preparing optoelectronic semiconductor chip and bonding wafer used therein |
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Application publication date: 20120606 |