CN102479270A - Simulation analysis circuit for single electron upset of PDSOI (Partially Depleted Silicon-On-Insulator) device - Google Patents

Abstract

The invention discloses a simulation analysis circuit for single electron upset of a PDSOI (Partially Depleted Silicon-On-Insulator) device. The simulation analysis circuit comprises a triode model with a current source and an NMOS (N-channel Metal Oxide Semiconductor) tube, wherein the triode model is connected in parallel with the NMOS tube; the transmitter of a triode of the triode model is connected with a source electrode of the NMOS tube; and the base of the triode is led out after being connected with the NMOS tube body, and the collector of the triode is connected with a drain electrode of the NMOS tube. By using the triode model with the current source, the NMOS tube and the like to form the simulation analysis circuit, the invention provides the simulation analysis method aiming to the single electron upset of the PDSOI device so as to use circuit simulation to replace TCAD (Technology Computer Aided Design) two-dimensional simulation to analyze single electron upset effects. Therefore, the scale of the single electron upset analysis target is enlarged, the analysis is faster and the working efficiency is greatly improved.

Description

Simulation analysis circuit to PDSOI device single-particle inversion

Technical field

The present invention relates to semiconductor devices irradiation simulation analysis technical field, particularly a kind of simulation analysis circuit to PDSOI device single-particle inversion.

Background technology

At present, in aerospace level microprocessor and reservoir designs process, mainly consider single particle effect and total dose effect.By contrast, along with reducing of device size, the influence of single particle effect is increasing the weight of.Because the PDSOI cmos circuit has been realized media isolated completely, the existence of BOX (buried oxide) layer, there is a floating sky in device, makes it have the parasitic bipolar transistor effect.Pass PDSOI device tagma perhaps near the drain region part in tagma when high energy charged particles, off-energy produces electron hole pair along the incident path ionization.The electric charge that these electron hole pairs produce, part will flow out the drain terminal output node logical value of directly overturning; Another part will be deposited to the tagma, raise the tagma current potential, open PDSOI parasitic bipolar tube effect, increase the weight of the single-particle inversion effect of output.In a circuit unit, because the enlargement factor of the parasitic bipolar pipe NPN of NMOS pipe is big, the upset LET threshold value that makes NMOS manage is determining the upset LET threshold value of entire circuit.

Aspect the single-particle simulation calculation, to the circuit unit under the PDSOI technology, analysis means generally adopts the Two-dimensional numerical simulation of single-particle inversion.But this has seriously restricted the scale of evaluation object, has delayed the cycle of research and development of products greatly.

In order to address this problem, existing method is: adopt the two index current sources of MESSENGER are carried out the coefficient correction, the current source that obtains again directly is parallel to the metal-oxide-semiconductor drain terminal and the source end of concern, strengthens simulation scale thereby carry out circuit simulation, accelerates simulation velocity.Doing for the PDSOI device like this is not accurately; Reason has two: one of which, and the index coefficient of two index current sources obtains through curve fitting, and the positions different for particle hits can not change flexibly; Make final calculating object single, cause the result too optimistic or pessimistic.Its two, the electric current of two index current sources does not flow through the tagma of device, its distinctive triode is not opened, the output node upset charge ratio that calculates at last is actual wants the many of optimism.So for the simulation of PDSOI single-particle, the match of bipolar tube ghost effect is very important.Introduced several effects of parasitic triode among the BSIMSOI, still for the state of big electric current under the single particle effect, precision is not enough.

Summary of the invention

One of the object of the invention is to provide a kind of and replaces TCAD two Dimensional Simulation Analysis single-particle inversion effect with circuit simulation; Strengthen the scale of single-particle inversion analytic target; And make to analyze more fast, increase work efficiency and the simulation analysis circuit that produces to PDSOI device single-particle inversion.

The triode model and the NMOS pipe that provide a kind of simulation analysis circuit to comprise the belt current source according to an aspect of the present invention to PDSOI device single-particle inversion; The triode model is parallel on the NMOS pipe; The emitter of the triode of triode model connects NMOS pipe source electrode, and base stage connects the NMOS body draws, and collector connects the drain electrode of NMOS pipe.

The present invention provides a kind of PDSOI device single-particle inversion simulating analysis that is directed against through adopting the simulation analysis circuit that is made up of the triode model in belt current source and NMOS pipe etc.; Realized utilizing circuit simulation to replace TCAD two Dimensional Simulation Analysis single-particle inversion effect; Strengthened the scale of single-particle inversion analytic target; And make that analysis is more quick, largely increase work efficiency.

Description of drawings

Fig. 1 is the circuit diagram to the simulation analysis circuit of PDSOI device single-particle inversion that the embodiment of the invention provides;

Fig. 2 is the circuit diagram of simulation analysis circuit one specific embodiment to PDSOI device single-particle inversion provided by the invention;

Fig. 3 is a comparison diagram of collecting electric charge through the NMOS pipe output current and the output of TCAD two-dimensional analog and simulation analysis breadboardin provided by the invention respectively;

Fig. 4 is the NMOS pipe output voltage comparison diagram that passes through TCAD two-dimensional analog and simulation analysis breadboardin provided by the invention respectively.

Embodiment

Simulation analysis circuit to PDSOI device single-particle inversion as shown in Figure 1, that the embodiment of the invention provides.This simulation analysis circuit comprises triode model and the NMOS pipe of belt current source Ip; The triode model of belt current source Ip is parallel on the NMOS pipe, and the emitter of triode Q connects NMOS pipe source electrode, and the base stage of triode Q connects the NMOS body draws, and the collector of triode Q connects the drain electrode of NMOS pipe.

Draw parallelly connected two resistance at NMOS pipe source electrode with body.

The triode model structure of belt current source Ip is: capacitor C bc of parallel connection between the base stage of triode Q and collector, capacitor C be of parallel connection between base stage and emitter.

When carrying out simulation analysis, at first based on the model of SPICE transistor Gummel-Poon, extract the NMOS pipe parasitic triode direct current with exchange model.

Then, current source Ip of parallel connection between triode Q emitter and base stage.

Current source Ip and single-particle incident charge Q total, particle incidence point are apart from the position xs of drain junction, and electron diffusion coefficient Dn is relevant,

$I_p=\frac{12Q_{\mathrm{total}}}{t_T}[\exp (-3t/t_T)-\exp (-4t/t_T)],$

Wherein Ip is the current value of current source Ip.

At last; Be parallel to the triode model of above belt current source Ip on the responsive NMOS pipe of concern; The emitter of triode connects NMOS pipe source electrode; The base stage of triode connects the NMOS body draws, and the collector of triode connects the drain electrode of NMOS pipe, forms the final PDSOI device single-particle inversion model that is directed against.

Dual-polar triode can adopt NPN, and Cbe and Cbc are the junction capacity of triode in the BJT GP model.

For the ionic bombardment of more accurate match diverse location, xs＜L/2, wherein L is a channel length.

Being parallel to NMOS with the triode model of this belt current source Ip when managing three ends, need drain junction electric capacity and the source junction capacity that NMOS manages in the SOIBISM model be made as 0.And in the NMOSBSIMSOI model, need to guarantee that bulk resistor is not 0.

Fig. 2 shows the circuit diagram of simulation analysis circuit one specific embodiment to PDSOI device single-particle inversion provided by the invention.On the basis that Fig. 1 provides, draw at the body of the base stage serial connection nmos pass transistor of triode Q to the simulation analysis circuit structure of PDSOI device single-particle inversion; The emitter of triode Q is connected to the pipe source electrode of nmos pass transistor, ground connection again; The collector of triode Q is connected to the pipe drain electrode of nmos pass transistor, draws behind capacitor C L of a line serial connection also ground connection from intersection point.The drain electrode of the pipe of transistorized pipe source electrode of PMOS and nmos pass transistor is joined, the transistorized pipe drain electrode of PMOS be connected in series a power vd D between body is drawn.The grid of PMOS transistor and nmos pass transistor links to each other then, is connected with generation voltage signal end.

Fig. 3 and Fig. 4 show NMOS pipe drain terminal electric current among Fig. 3, electric charge sum that drain terminal is collected and output switching activity voltage shape and TCAD two-dimensional simulation result's contrast respectively.

Can find out from Fig. 3 and Fig. 4; This simulated data to PDSOI device single-particle inversion simulating analysis provided by the invention can reasonablely be coincide with the 2-D simulation result, thereby realization is more accurate, practicality; Efficiently, to circuit stages single-particle inversion effect analog.

The foregoing description is a preferred implementation of the present invention; But embodiment of the present invention is not restricted to the described embodiments; Other any do not deviate from change, the modification done under spirit of the present invention and the principle, substitutes, combination, simplify; All should be the substitute mode of equivalence, be included within protection scope of the present invention.

Claims (6)

1. the simulation analysis circuit to PDSOI device single-particle inversion is characterized in that, comprising:

The triode model in belt current source and NMOS pipe; Said triode model is parallel on the said NMOS pipe; The emitter of the triode of said triode model connects said NMOS pipe source electrode, and base stage connects said NMOS body draws, and collector connects the drain electrode of said NMOS pipe.

2. simulation analysis circuit according to claim 1 is characterized in that:

Said triode model structure is: electric capacity of parallel connection between the base stage of said triode and collector, an electric capacity of parallel connection and a current source respectively between base stage and emitter.

3. simulation analysis circuit according to claim 2 is characterized in that:

Said triode adopts the NPN triode, and two said electric capacity are the junction capacity of said triode.

4. simulation analysis circuit according to claim 1 is characterized in that:

The body of said NMOS pipe draw and source electrode between two resistance of parallel connection.

5. simulation analysis circuit according to claim 1 is characterized in that:

Said current source and single-particle incident charge Q total, particle incidence point are apart from the position xs of drain junction, and electron diffusion coefficient Dn is relevant,

Wherein

, Ip is the current value of said current source.

6. simulation analysis circuit according to claim 5 is characterized in that:

< L/>2, wherein L is a channel length to said particle incidence point apart from the position xs of drain junction.

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