CN102468865A - Method and device of cell search coarse synchronization - Google Patents
Method and device of cell search coarse synchronization Download PDFInfo
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- CN102468865A CN102468865A CN2010105498157A CN201010549815A CN102468865A CN 102468865 A CN102468865 A CN 102468865A CN 2010105498157 A CN2010105498157 A CN 2010105498157A CN 201010549815 A CN201010549815 A CN 201010549815A CN 102468865 A CN102468865 A CN 102468865A
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Abstract
The invention discloses a method of cell search coarse synchronization and a device of the cell search coarse synchronization. The device comprises a difference preprocessing module and a synchronous position estimation device, wherein the difference preprocessing module comprises a filter and an adding device, the filter processes a received signal r (n) in a delaying way and outputs the processed signal to the adding device, and the adding device processes the received signal r (n) and a delayed receipt signal r (n-M) by means of previous difference, and outputs a preprocessed receipt signal r' (n), to the synchronous position estimation device, wherein r' (n)=r (n)-r (n-M). Therefore, the influence of a direct current component on the cell search coarse synchronization can be greatly reduced, the method and the device can not be limited by the compensation ability of a radio frequency device and the nonideal characteristic of the radio frequency device under a nonsynchronous mode, and the robustness of the cell search coarse synchronization can be greatly improved.
Description
Technical field
The present invention relates to the mobile communication technology field, relate in particular to the thick synchronous method and apparatus of a kind of Cell searching in the GSM.
Background technology
TD-SCDMA technology (TD SDMA inserts, Time Division Synchronous Code Division Multiple Access) is one of three big mainstream standard of 3G (Third Generation) Moblie technology (3G), is with a wide range of applications.In the TD-SCDMA system, subscriber equipment (UE, User Equipment) needs to search the sub-district that possibly exist after initially powering on, and selects the proper cell login.Only after UE signs in to the sub-district, can obtain the more detailed information in this sub-district and obtain the information of adjacent cell, also only after signing in to the sub-district, just can monitor paging or make a call.Usually be cell initial searching process search the procedure definition that signs in to suitable cell from start, be called for short ICS (Initial Cell Search).
The cell initial searching process of TD-SCDMA system at first need be known and the rough position of synchronous code just carry out synchronizing sub-frame, abbreviates as synchronously thick.In the prior art, thick synchronous implementation method comprises two kinds: a kind of is the energy window method of searching for according to TD-SCDMA subframe power distribution characteristics; Another kind is in whole subframe scope, to make relevant correlation method with 32 Sync-DL sign indicating numbers (descending synchronous code).Wherein, correlation method because operand is huge and in the environment that multipath and co-frequency cell disturb performance obviously degenerate the shortage practical value.
As shown in Figure 1, in the frame structure of TD-SCDMA, there is the protection interval GP (Guard Period) of 32 chips (chips) on the left side of descending synchronous code (Sync-DL), and there is the protection interval GP of 96 chips on the right, and Sync-DL is originally as 64 chips.During applied energy window method,, therefore see that from the time distribution of received power the power of comparing the Sync-DL section with GP is bigger because the power of GP is very little.When during divided by 64 chips on both sides (each 32 chip of both sides) power sum, obtaining the bigger estimation factor with Sync-DL section power sum.Can judge the approximate location of descending pilot frequency time slot (DwPTS) with the method.Therefore, the approximate location that the method that can utilize the power shape that receives signal to set up power " characteristic window " is searched for DwPTS.
Because when carrying out the thick synchronizing process of Cell searching, synchronizing sub-frame is not set up as yet, automatic gain control (AGC) can't get into synchronous mode, and receives the influence of contiguous travelling carriage, and the power between the uplink and downlink timeslot possibly exist huge difference.For the down-going synchronous coded signal that obtains reasonable quantification on the digital baseband and near GP; Prior art is attempted multiple possible AGC gain; And under every kind of AGC gain scene; All carry out characteristic window search, with the characteristic window optimal value obtained under all AGC gain scenes estimated position as the synchronizing sub-frame code position.
In addition, DC component slightly has bigger influence synchronously to existing Cell searching.Radio-frequency devices considers with stability that from the cost of total solution mostly adopt based on the zero intermediate frequency design for scheme, DC component is the intrinsic problem that zero intermediate frequency radio frequency scheme is introduced in recent years.In order to reduce the influence of residual dc component to the base band receptivity, the internal configurations of the VGA modules such as (programmable gain amplifiers) in the general radio-frequency devices is useful on the device of the remaining compensation of direct current.But; Because the thick synchronizing process of Cell searching is not confirmed subframe regularly as yet, can not independently carry out the AGC gain controlling according to time slot, causes cell is searched in the thick synchronizing process; Baseband signal in the radio-frequency devices is in the saturation limiting state often, and the DC component compensating error can not effectively be worked more greatly.Launch the DC component compensation of radio frequency chip this moment, it is remaining excessive often to cause occurring under the application-specific scene direct current output, side effects such as the subsidiary burr of signal.
During Cell searching of the prior art is slightly synchronous, utilize the descending synchronous code power characteristic window method high to accomplish the judgement of position of downlink synchronous code than the power of front and back signal.The introducing of less residual dc component can make the equal numerical value of power of descending synchronous code and position, space rise, and can reduce the ratio that descending synchronous code calculates than space position feature value.When the residual dc component increase to cause the part signal saturation limiting after; Because and the signal limiter ratio of DC component homophase is greater than the signal limiter ratio reverse with direct current; Asymmetric amplitude limit causes the power calculation of signal to reduce to some extent, has further reduced the eigenvalue calculation ratio of descending synchronous code than the position, space.When residual dc very serious; When mostly being limited with the signal of DC component homophase; The power calculation value of descending synchronous code signal section even can cause the Cell searching coarse synchronization method complete failure of carrying out less than the power calculation value that only is direct current component based on the characteristic window.
Fig. 2 has provided under the different state of signal-to-noise, and DC component is to descending synchronous code timing position eigenvalue calculation result's influence.Wherein, the descending synchronous code signal amplitude is 1, and abscissa is the ratio (SNR) of signal power and noise power, and ordinate is the eigenvalue calculation result at position of downlink synchronous code place, and the amplitude limit amplitude is 1.Among Fig. 2, shown four curves are corresponding respectively no DC component and DC component amplitude are with respect to the characteristic value of full amplitude 0.2～0.6 o'clock.It is thus clear that when not having DC component, along with the raising of signal to noise ratio, eigenvalue calculation result increases gradually, under higher state of signal-to-noise, can calculate very obvious characteristics value.After having DC component; Result of calculation when eigenvalue calculation result does not have DC component is less than normal; Especially under the bigger scene of DC component; Even if under the very high situation of signal to noise ratio, also almost can't calculate effective characteristic value, cause Cell searching coarse synchronization method to lose efficacy based on the characteristic window.
Therefore, how to realize that Cell searching is slightly synchronous, become the technical issues that need to address.
Summary of the invention
Technical problem to be solved by this invention is, provides a kind of Cell searching thick synchronous method and apparatus, is used at GSM, eliminates the influence of DC component, realizes that Cell searching is slightly synchronous.
In order to address the above problem, the present invention proposes the thick synchronous method of a kind of Cell searching, comprising:
R (n) carries out preparatory difference processing to the received signal, and the mode of employing r (n)-r (n-M) is carried out preparatory difference processing and obtained pretreated reception signal r ' (n);
It is slightly synchronous (n) to carry out Cell searching according to pretreated reception signal r ', confirms the position of descending synchronous code;
Wherein, said n representes the chip sequence number, and M representes preparatory differential delay, and M is a natural number.
Saidly (n) carry out the thick position of confirming descending synchronous code synchronously of Cell searching according to pretreated reception signal r ', be to carry out according to following steps: will pass through pretreated signal is that unit calculates the signal power on each chip according to empty subframe; According to said signal power, descending synchronous code energy feature value is calculated in the descending synchronous code position of each supposition; The descending synchronous code position that slightly obtains synchronously as Cell searching with ceiling capacity characteristic value position.
The value of said preparatory differential delay M is 2.Said pretreated reception signal r ' (n) is expressed as:
r′(n)＝r(n)-r(n-M)
＝[x(n)+α+η
1(nT
s)]-[x(n-M)+α+η
1((n-M)T
s)]
＝[x(n)-x(n-M)]+η′
1(nT
s)
Wherein, signal the sampled value on n chip of r (n) for receiving; The preparatory differential delay of M; X (n) is through the sampled value of signal on n chip behind the channel; η
1(nT
s) be the sampled value of noise on n chip; DC component is expressed as α=α
x+ α
yJ.
The present invention also provides a kind of Cell searching thick synchronous device, comprising: the pretreated module of difference, and the sync bit estimation unit, wherein:
Said difference pretreatment module; Be used for the signal r (n) that receives is postponed to handle; The signal r (n) that utilize to receive with postpone to handle after reception signal r (n-M) carry out preparatory difference processing, obtain pretreated reception signal r ' and (n) export the sync bit estimation unit to;
Said sync bit estimation unit, it is slightly synchronous to be used for (n) carrying out Cell searching according to pretreated reception signal r ', confirms the position of descending synchronous code;
Wherein, said n representes the chip sequence number, and M representes preparatory differential delay, and M is a natural number.
Said difference pretreatment module comprises: filter and adder, and wherein: filter is used for the signal r (n) that receives is postponed to export adder to after the processing; Adder, the signal r (n) that is used to utilize reception with postpone after reception signal r (n-M) carry out preparatory difference processing, obtain pretreated reception signal r ' (n)=r (n)-r (n-M) exports the sync bit estimation unit to.
Said filter is a retarder group, and retarder group comprises one or more delayers of series connection successively.The value of said preparatory differential delay M is 2.
The present invention also provides a kind of difference pretreated module, comprising: filter and adder,
Said filter is used for the signal r (n) that receives is postponed to export adder to after the processing;
Said adder, the signal r (n) that is used to utilize reception with postpone after reception signal r (n-M) carry out preparatory difference processing, obtain pretreated reception signal r ' (n)=r (n)-r (n-M) exports the sync bit estimation unit to; Wherein, said n representes the chip sequence number, and M representes preparatory differential delay, and M is a natural number.Said filter is a retarder group, and retarder group comprises one or more delayers of series connection successively.The value of said preparatory differential delay M is 2.
Cell searching coarse synchronization method of the present invention and device are the thick synchronization scenarios of a kind of improved TD-SCDMA Cell searching.The present invention has increased and has carried out pretreated step to carrying out the thick data in synchronization of Cell searching; Being about to data carries out re-using behind the calculus of differences existing method and carries out that Cell searching is thick to be calculated synchronously; Because pretreated effect makes estimated result of the present invention not receive the influence of contained DC component in the data.The present invention has compared with prior art reduced DC component significantly to the thick synchronous influence of Cell searching, and does not receive the compensation ability of radio-frequency devices own and the restriction of non-ideal characteristic under Asynchronous Mode, has significantly improved the thick synchronous robustness of Cell searching.
Description of drawings
Fig. 1 is a descending synchronous code sketch map in the frame structure of TD-SCDMA system;
Fig. 2 is the influence sketch map of DC component to the eigenvalue calculation result;
Fig. 3 uses the characteristic value sketch map that calculates after the preparatory difference processing of the present invention;
Fig. 4 is the amplitude-frequency response sketch map after the application preparatory difference processing of the present invention;
Fig. 5 is the structure chart of the thick synchronizer of Cell searching of the present invention;
Fig. 6 is the structure chart of the specific embodiment of the thick synchronizer of Cell searching of the present invention.
Embodiment
For making the object of the invention, technical scheme and advantage clearer, the present invention is done to specify further below in conjunction with accompanying drawing.
The present invention is directed to available technology adopting energy window method when carrying out thick synchronization and estimation, influenced by DC component and the restriction of non-ideal characteristic under Asynchronous Mode.Improved TD-SCDMA Cell searching coarse synchronization method of the present invention; Increased and carried out pretreated step carrying out the thick data in synchronization of Cell searching; Being about to data carries out re-using behind the calculus of differences existing thick synchronous estimation method and carries out that Cell searching is thick to be calculated synchronously; Because pretreated effect makes estimated result of the present invention not receive the influence of contained DC component in the data.The present invention compares with existing method, has reduced DC component significantly to the thick synchronous influence of Cell searching, has significantly improved the thick synchronous robustness of Cell searching.
The thick synchronous method of a kind of Cell searching of the present invention comprises:
R (n) carries out preparatory difference processing to the received signal, and the mode of employing r (n)-r (n-M) is carried out preparatory difference processing and obtained pretreated reception signal r ' (n), and said n representes the chip sequence number, and M representes preparatory differential delay; It is slightly synchronous (n) to carry out Cell searching according to pretreated reception signal r ', confirms the position of descending synchronous code.
Said pretreated reception signal r ' is the data that are used for the thick synchronous computation of characteristic values of Cell searching that obtain after the process preparatory difference processing provided by the invention (n).Pretreated reception signal r ' (n) can be defined as:
r′(n)＝r(n)-r(n-M)
＝[x(n)+α+η
1(nT
s)]-[x(n-M)+α+η
1((n-M)T
s)]
＝[x(n)-x(n-M)]+η′
1(nT
s)
Wherein, signal the sampled value on n chip (chip) of r (n) for receiving; M is the preparatory differential delay of the present invention's definition; X (n) is through the sampled value of signal on n chip behind the channel; η
1(nT
s) be the sampled value of noise on n chip; DC component is expressed as α=α
x+ α
yJ.
Obtain pretreated reception signal r ' (n) after,, also can may further comprise the steps (n) when carrying out the thick position of confirming descending synchronous code synchronously of Cell searching according to pretreated reception signal r ':
At first, will pass through pretreated signal is that unit calculates the signal power on each chip according to empty subframe;
Then, descending synchronous code energy feature (energy of middle 64 chips divided by the energy of each 32 chip of both sides with) is calculated in the descending synchronous code position of each supposition;
At last, the descending synchronous code position that slightly obtains synchronously as Cell searching with the eigenvalue of maximum position.
Through theory analysis,, do not influence the validity of thick synchronous characteristic value result of calculation though signal and noise are all before different with preparatory difference processing.Thick synchronous estimation method after the present invention improves has been eliminated the influence that DC component is calculated the thick synchronous characteristic value of Cell searching fully.As shown in Figure 3; When M=2; Emulation receive the influence degree of DC component to the thick synchronous characteristic value of TD-SCDMA terminal Cell searching result of calculation; Simulation result has confirmed of the present invention improving one's methods to DC component and insensitive equally, under DC component in various degree, can obtain comparatively effectively eigenvalue calculation result.
Realizing on the complexity, the present invention with r ' (n)=r (n)-r (n-M) replaced r (n), each synchronizing symbol sampling point has only increased subtraction one time, is fit to very much the software and hardware realization.And the present invention is because not enabled RF DC component compensation, can not introduce non-ideal factors such as remaining component that RF compensation brings and burr, helps further improving the thick net synchronization capability of Cell searching.
In the present invention, difference result still satisfies add up this characteristic of condition of power, can eliminate the influence of DC component.When carrying out preliminary treatment, can synchronizing symbol be passed through 1-Z
MFilter.Filter is a kind of general structure here, has explained the combination of a plurality of delayers and different gains thereof, and the delayer that adopts during subsequent implementation only is a kind of concrete application special case of filter construction.Carry out preliminary treatment because this filter has a zero point at Z=1, therefore through pretreated signal cancellation DC component.In addition; Because the active ingredient of TD-SCDMA baseband signal mainly concentrates in the 480kHz; High band available signal power spectrum density is less; Introduce another zero point at the Z=-1 place, can suppress the influence of out-of-band noise to a certain extent estimated performance, but need not any implementation complexity of extra increase.Fig. 4 is 1-Z
2The amplitude-frequency response sketch map, M=2 is a kind of typical application parameter provided by the invention.
As shown in Figure 5, the thick synchronous device of Cell searching of the present invention comprises: the pretreated module of difference, and the sync bit estimation unit, wherein said difference pretreatment module comprises: filter and adder,
Filter exports adder to after the signal r (n) that receives is postponed to handle;
The signal r (n) that the adder utilization receives with postpone after reception signal r (n-M) carry out preparatory difference processing, obtain pretreated reception signal r ' (n)=r (n)-r (n-M) exports the sync bit estimation unit to;
Wherein, said n representes the chip sequence number, and M representes preparatory differential delay, and M is a natural number.
Said filter is a retarder group, and retarder group comprises one or more delayers of series connection successively.
The pretreated module of difference is used to realize the difference preliminary treatment.The signal r (n) that receives is input to retarder group and adder respectively; Retarder group exports adder to after the signal r (n) that receives is postponed to handle; The signal r (n) that the adder utilization receives with postpone after reception signal r (n-M) carry out preparatory difference processing, obtain pretreated reception signal r ' (n)=r (n)-r (n-M).Said pretreated reception signal r ' (n) can send into existing sync bit estimation unit, proceeds thick synchronization and estimation and can obtain the descending synchronous code position.
As shown in Figure 6, the modular structure figure of the preparatory difference processing when having provided M=2.Retarder group adopts the delayer of two-stage series connection, and the delayer of two-stage series connection postpones to produce r (n-2) data to the input data.Adder is configured to subtract compute mode; Minuend input termination input data r (n), the data r (n-2) after subtrahend input termination postpones, it is poor to subtract the computing gained; The calculus of differences result of output output just is connected to the input that has the sync bit estimation unit now.
The present invention adopts the combination of filter and adder to realize the difference pretreatment module, and filter is made up of multiplier and some registers usually, and implementation complexity is higher.The present invention adopts retarder group; Preferred embodiment down; The delayer that only adopts 2 series connection is as retarder group; This retarder group cooperates adder to realize the difference preprocessing function as filter, can suppress the influence of out-of-band noise to estimated performance to a certain extent through the difference preliminary treatment, but need not any implementation complexity of extra increase.Thereby the present invention has simple in structure, can greatly simplify hard-wired scheme, has the DC component of inhibition outstanding effect distinguishing feature simultaneously.
The above is merely embodiments of the invention, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.All within spirit of the present invention and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within the claim scope of the present invention.
Claims (10)
1. the thick synchronous method of a Cell searching comprises:
R (n) carries out preparatory difference processing to the received signal, and the mode of employing r (n)-r (n-M) is carried out preparatory difference processing and obtained pretreated reception signal r ' (n);
It is slightly synchronous (n) to carry out Cell searching according to pretreated reception signal r ', confirms the position of descending synchronous code;
Wherein, said n representes the chip sequence number, and M representes preparatory differential delay, and M is a natural number.
2. the method for claim 1 is characterized in that,
Saidly (n) carrying out the thick position of confirming descending synchronous code synchronously of Cell searching according to pretreated reception signal r ', is to carry out according to following steps:
To pass through pretreated signal is that unit calculates the signal power on each chip according to empty subframe;
According to said signal power, descending synchronous code energy feature value is calculated in the descending synchronous code position of each supposition;
The descending synchronous code position that slightly obtains synchronously as Cell searching with ceiling capacity characteristic value position.
3. according to claim 1 or claim 2 method is characterized in that,
The value of said preparatory differential delay M is 2.
4. according to claim 1 or claim 2 method is characterized in that,
Said pretreated reception signal r ' (n) is expressed as:
r′(n)＝r(n)-r(n-M)
＝[x(n)+α+η
1(nT
s)]-[x(n-M)+α+η
1((n-M)T
s)]
＝[x(n)-x(n-M)]+η′
1(nT
s)
Wherein, signal the sampled value on n chip of r (n) for receiving; The preparatory differential delay of M; X (n) is through the sampled value of signal on n chip behind the channel; η
1(nT
s) be the sampled value of noise on n chip; DC component is expressed as α=α
x+ α
yJ.
5. the thick synchronous device of a Cell searching comprises: the pretreated module of difference, and the sync bit estimation unit, wherein:
Said difference pretreatment module; Be used for the signal r (n) that receives is postponed to handle; The signal r (n) that utilize to receive with postpone to handle after reception signal r (n-M) carry out preparatory difference processing, obtain pretreated reception signal r ' and (n) export the sync bit estimation unit to;
Said sync bit estimation unit, it is slightly synchronous to be used for (n) carrying out Cell searching according to pretreated reception signal r ', confirms the position of descending synchronous code;
Wherein, said n representes the chip sequence number, and M representes preparatory differential delay, and M is a natural number.
6. device as claimed in claim 5 is characterized in that, said difference pretreatment module comprises: filter and adder, wherein:
Filter is used for the signal r (n) that receives is postponed to export adder to after the processing;
Adder, the signal r (n) that is used to utilize reception with postpone after reception signal r (n-M) carry out preparatory difference processing, obtain pretreated reception signal r ' (n)=r (n)-r (n-M) exports the sync bit estimation unit to.
7. device as claimed in claim 6 is characterized in that,
Said filter is a retarder group, and retarder group comprises one or more delayers of series connection successively.
8. like claim 5 or 6 described devices, it is characterized in that,
The value of said preparatory differential delay M is 2.
9. pretreated module of difference comprises: filter and adder,
Said filter is used for the signal r (n) that receives is postponed to export adder to after the processing;
Said adder, the signal r (n) that is used to utilize reception with postpone after reception signal r (n-M) carry out preparatory difference processing, obtain pretreated reception signal r ' (n)=r (n)-r (n-M) exports the sync bit estimation unit to;
Wherein, said n representes the chip sequence number, and M representes preparatory differential delay, and M is a natural number.
10. module as claimed in claim 9 is characterized in that,
Said filter is a retarder group, and retarder group comprises one or more delayers of series connection successively, and the value of said preparatory differential delay M is 2.
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| CN106506134A (en) * | 2016-09-28 | 2017-03-15 | 全球能源互联网研究院 | A kind of line differential protection method of data synchronization of Packet Transport Network and system |
| CN106506134B (en) * | 2016-09-28 | 2021-08-06 | 全球能源互联网研究院 | Line differential protection data synchronization method and system for packet transport network |
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