CN102437114A - Manufacturing method of thin film transistor substrate - Google Patents
Manufacturing method of thin film transistor substrate Download PDFInfo
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- CN102437114A CN102437114A CN2010105015293A CN201010501529A CN102437114A CN 102437114 A CN102437114 A CN 102437114A CN 2010105015293 A CN2010105015293 A CN 2010105015293A CN 201010501529 A CN201010501529 A CN 201010501529A CN 102437114 A CN102437114 A CN 102437114A
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Abstract
The invention provides a manufacturing method of a thin film transistor substrate. A multi-tone mask (MTM) with different transmittances is substituted for a mask with a single transmittance in the existing thin film transistor manufacturing process, so that the existing thin film transistor five-layer mask manufacturing process can be simplified, thereby integrating the equipment, lowering the equipment investment and the material and manufacturing cost, simplifying the mask, lowering the mask design cost, effectively enhancing the yield of the manufacturing process, shortening the cycle time and lowering the cost of the manufacturing process.
Description
Technical field
The present invention relates to a kind of manufacture method of semiconductor element, particularly relate to a kind of manufacture method of thin film transistor base plate.
Background technology
Consult Fig. 1; Thin film transistor base plate is one of most important element in the LCD; It mainly is by a clear glass substrate 11, and most proper alignment are formed on 12 formations in picture element unit (pixel unit) on the base material 11, this each picture element unit 12 comprise a thin-film transistor structure (TFT) 18, one with this thin-film transistor structure 18 storage capacitors (Cst) 19 of settings at interval; And one make this thin-film transistor (TFT) structure 18 and this storage capacitors (Cst) 19 be electrically connected to each other pixel electrode 17; This storage capacitors 19 is provided with difference and distinguishes two kinds according to its position, and a kind of is to be connected (Cs on gate) with the gate cabling, and another kind is to be connected (Cs on common with the common cabling; Figure does not show), this storage capacitors 19 is for to do explanation with Cs on gate in present embodiment.
Fig. 2 is a cutaway view of taking from the A-A straight line among Fig. 1, and Fig. 3-1 reaches Fig. 3-the 2nd, takes from the cutaway view of B-B straight line among Fig. 1.
Consult Fig. 2; This thin-film transistor structure 18 comprise one be formed on a base material 11 gate electrode 182, the insulating barriers 183, that cover this base material 11 and this gate electrode 182 surfaces active semiconductor layer 184a, that are formed on these insulating barrier 183 surfaces to be formed on this active semiconductor layer 184a surperficial; And the doping semiconductor layer 184b that each interval one passage 184e is provided with, correspondingly respectively be formed on the one source pole electrode 185a that this doping semiconductor layer 184b upper surface and this passage of each interval 184e be oppositely arranged and be formed at this source electrode 185a and the surperficial protective layer 186 of this drain electrode 185b with a drain electrode 185b; This protective layer 186 has two leg 186a, and this each leg 186a defines one respectively and makes source electrode 185a, and drain electrode 185b contact hole (Contact hole) 185c of surface exposure partly.
The structure of this storage capacitors 19 can have the structure shown in Fig. 3-1 or 3-2 respectively; Fig. 3-1 is for having the storage capacitors 19 of MIS (Metal-Insulator-Semiconductor) structure, and Fig. 3-2 is for having the storage capacitors 19 of MIM (Metal-Insulator-Metal) structure.Consult Fig. 3-1; This storage capacitors 19 with MIS structure comprise one be formed on this base material 11 first electrode 192, the insulating barriers 193, that cover this base material 11 and this first electrode 192 surfaces active semiconductor layer 194a, that are formed on these insulating barrier 193 surfaces doping semiconductor layer 194b, that is formed on this active semiconductor layer 194a surface be formed on the surperficial metal level 195 of this doping semiconductor layer 194b; And one be formed on this metal level 195 surfaces conductive layer 196, and this conductive layer 196 is promptly served as reasons and is covered 17 formation of pixel electrode on these metal level 195 surfaces; Consult Fig. 3-2; This storage capacitors 19 with mim structure comprise one be formed on this base material 11 first electrode 192, cover the insulating barrier 193 on this base material 11 and this first electrode 192 surfaces; And one cover these insulating barrier 193 surfaces conductive layer 196, and this conductive layer 196 is promptly served as reasons and is covered 17 formation of pixel electrode on these insulating barrier 193 surfaces.
17 of this pixel electrodes are the predetermined surfaces that covers this thin-film transistor structure 18 and this storage capacitors 19, and make this thin-film transistor structure 18 be electrically connected to each other by this pixel electrode 17 with this storage capacitors 19.
Consult Fig. 4; Be used for making the method for aforementioned thin film transistor base plate shown in Figure 1 at present; Most display panels dealer adopts to comprise that gate electrode formation step 101, semi-conductor layer form step 102, one source/drain electrode forms step 103, contact hole formation step 104, and five layers of light shield processing procedure (5-PEP Process) of pixel electrode formation step 105 are manufactured.
Cooperate and consult Fig. 5; It is behind the photoresist layer 200 that deposition formation one the first metal layer 12a and is made up of the eurymeric photoresist on the base material 11 that this gate electrode forms step 101, cooperates gate light shield (Gate Mask) M1 to make this first metal layer 12a form this gate electrode (Gate electrode) 182 with micro image etching procedure.
Cooperate and consult Fig. 6; It is to form a dielectric film 183, initiatively semiconductor film 14a, a doped semiconductor film 14b in regular turn from this base material 11 and this gate electrode 182 surfaces that this semiconductor layer forms step 102; And one behind the photoresist layer 200 that is made up of the eurymeric photoresist; Cooperate semi-conductor layer light shield (Active mask) M2 with micro image etching procedure; Remove this active semiconductor film 14a, this doped semiconductor film 14b that are not covered, and the structure of this dielectric film 183a, and form a pair of an insulating barrier 183, initiatively semiconductor layer 184a, a doping semiconductor layer 184b that should gate electrode 182 tops by this photoresist layer 200.
Cooperate and consult Fig. 7; It is to become one second metal level 15 in this doping semiconductor layer 184b surface that this source/drain electrode forms step 103; An and photoresist layer 200; Cooperate one source/drain electrode light shield (S/DMask) M3 in to should gate electrode 182 tops forming the passage 184e that lets this active semiconductor layer 184a expose with micro image etching procedure, and the one source pole electrode 185a and the drain electrode 185b that make this second metal level 15 this passage of formation each interval 184e be oppositely arranged.
Cooperate and consult Fig. 8; It is in this source electrode 185a, drain electrode 185b that this contact hole forms step 104; And this exposed active semiconductor layer 184a surface forms a protective layer 186; An and photoresist layer 200; Cooperate contact hole light shield (Contact-hole mask) M4 with micro image etching procedure, will to should source electrode 185a and drain electrode 185b top protective layer 186 structures of estimating to form this contact hole 185c position remove to the part surface exposure of this source electrode 185a and drain electrode 185b, and form contact hole (Contact-hole) 185c that makes this source electrode 185a and drain electrode 185b part surface expose respectively.
Cooperate and consult Fig. 9; It is to go up formation one transparency conducting layer 17a in this protective layer 186 and this two contact hole 185c that this pixel electrode forms step 105; An and photoresist layer 200; Cooperate pixel electrode light shield (Pixel Mask) M5 will be scheduled to transparency conducting layer 17a partly with micro image etching procedure and remove, form pixel electrode 17, promptly accomplish the making of this thin film transistor base plate as shown in Figure 2.
In addition, 19 of this storage capacitors can make in aforesaid micro image etching procedure in the lump, because this processing procedure is therefore well known in the art, do not add to detail at this.
In order to reduce equipment cost, also development adopts four layers of light shield processing procedure or three-layer light cover processing procedure to make thin film transistor base plate at present; Just adopt and have except complete printing opacity and complete lighttight light transmittance; Also have light transmittance between complete printing opacity and fully light tight between many gray-level masks (Multi-tone mask; MTM) replace aforementioned this gate light shield M1, this semiconductor layer light shield M2, this source/drain electrode light shield M3, this contact hole light shield M4 with single light transmittance (promptly only having complete printing opacity and complete lighttight light transmittance), or this pixel electrode light shield M5.For instance; Four layers of light shield processing procedure be exactly with have a light transmittance between complete printing opacity and light tight fully between many gray-level masks directly replace this semiconductor layer light shield M2 and source/drain electrode light shield M3, and form the implementation process making thin film transistor base plate that step 102, this source/drain electrode form step 103 with foregoing this semiconductor layer; And the three-layer light cover processing procedure be exactly with two have a light transmittance between complete printing opacity and fully light tight between many gray-level masks; Replace this semiconductor layer light shield M2, this source/drain electrode light shield M3 respectively; With this contact hole light shield M4; And this pixel electrode light shield M5, and the implementation process that combines foregoing this semiconductor layer to form step 102, this source/drain electrode formation step 103 and this contact hole formation step 104, this pixel electrode formation step 105 is made thin film transistor base plate.
In other words; Reduce the processing procedure of light shield at present; All be directly to replace the single light transmittance light shield in the existing processing procedure, cooperate original fabrication steps to make thin film transistor base plate, and reach the purpose that reduces expensive light shield equipment cost with many gray-level masks with different light transmittances.
Consult Figure 10; Though the single light transmittance light shield that directly uses with many gray-level masks replacement different steps can reduce the number of light shield use and reach the purpose that reduces equipment cost,, be example with present three-layer light cover processing procedure; When replacing this contact hole light shield M4 and this pixel electrode light shield M5 with many gray-level masks; And will form this pixel electrode 17 time, because this transparency conducting layer 17a can be formed on this patterning photoresistance 200, therefore; Can remove unnecessary light resistance structure to peel off (lift-off) fabrication steps at last; And simultaneously correspondence is formed on transparency conducting layer 17a unnecessary on this patterning photoresistance 200 and removes in the lump and form this pixel electrode 17, but when removing the process of this conductive layer 17a, (lift-off) mode reduces process rate to peel off easily at present, simultaneously; Conductive layer 17a after peeling off also is insoluble in the removing photoresistance liquid, and causes the obstruction of the filter screen of filtration system to cause the consume of miscellaneous equipment on the contrary easily.
Therefore, how to introduce many gray-level masks in the processing procedure of existing thin film transistor base plate to reduce equipment cost, can simplify processing procedure simultaneously again, promote process rate, be the direction that present technique field dealer constantly pursues improvement always.
Summary of the invention
The objective of the invention is is providing a kind of many gray-level masks (Multi-tone mask, MTM) method of making thin film transistor base plate utilized.
Therefore; The manufacture method of a kind of thin film transistor base plate of the present invention; It is characterized in that: the manufacture method of this thin film transistor base plate comprises that a gate electrode forms step, a thin-film transistor forms step; And a pixel electrode forms step; It is upwards to form a first metal layer in regular turn from a base material that this gate electrode forms step, and behind one first photoresist layer, cooperates a gate light shield to make the first metal layer form a gate electrode with micro image etching procedure; It is from this base material that this thin-film transistor forms step; Reach this gate electrode and upwards form an insulating barrier, initiatively semiconductor layer, a doping semiconductor layer, one second metal level, a protective layer in regular turn, and behind one second photoresist layer, cooperate gray-level mask more than to make this second photoresist layer form one with micro image etching procedure and cover this protective layer, this second metal level, this doping semiconductor layer; And the patterning photoresist layer of this active semiconductor layer predetermined structure; And this patterning photoresist layer then removes this protective layer, this second metal level, this doping semiconductor layer of not covered by this patterning photoresist layer to having different-thickness by opposite two side positions with this gate electrode of gate electrode, and the structure of this active semiconductor layer; And then be shade with this patterning photoresist layer; Cooperate repeatedly etching mode form a pair of should gate electrode top and the passage that makes this active semiconductor layer expose, and two contact holes that are positioned at this passage two opposite sides and make this second metal level expose make a thin-film transistor structure corresponding to this gate electrode; It is to form the pixel electrode that is made up of transparent conductive material in the precalculated position of this thin-film transistor structure that this pixel electrode forms step, accomplishes the making of this thin film transistor base plate.
The manufacture method of thin film transistor base plate of the present invention; It is upwards to form a transparency conducting layer in regular turn from this thin-film transistor structure earlier that this pixel electrode forms step; And behind one the 3rd photoresist layer; Make this transparency conducting layer form this pixel electrode in the precalculated position with micro image etching procedure, again this pixel electrode with non crystalline structure is carried out tempering, make non crystalline structure change crystalline texture into.
The manufacture method of thin film transistor base plate of the present invention; It is the transparency conducting layer that is constituted and had non crystalline structure earlier from this thin-film transistor structure surface formation one by transparent conductive material that this pixel electrode forms step; With the annealing laser mode structure in this transparency conducting layer precalculated position is transformed into polycrystalline structure by non crystalline structure again; Then the non crystalline structure etching with this transparency conducting layer removes; Make this residual transparency conducting layer form a pixel electrode in the precalculated position, make this thin film transistor base plate.
The manufacture method of thin film transistor base plate of the present invention; It is the transparency conducting layer that is constituted and had non crystalline structure earlier from this thin-film transistor structure surface formation one by transparent conductive material that this pixel electrode forms step; Utilizing laser to remove mode again removes the predetermined structure of this transparency conducting layer; Make residual transparency conducting layer form a pixel electrode in the precalculated position, make this thin film transistor base plate.
The manufacture method of thin film transistor base plate of the present invention, these many gray-level masks that this thin-film transistor forms in the step have a complete printing opacity GTG, a complete light tight GTG, and the printing opacity GTG of at least two different light transmittances.
The manufacture method of thin film transistor base plate of the present invention; This thin-film transistor forms this insulating barrier, this active semiconductor layer, this doping semiconductor layer of step; And this protective layer is to be formed by the chemical deposition mode; This second metal level is to form with sputtering way, and is setting adjacent one another are in order to the equipment that carries out chemical deposition and sputter.
In addition, the manufacture method of a kind of thin film transistor base plate of the present invention is characterized in that: the manufacture method of this thin film transistor base plate comprises that a gate electrode forms step, a thin-film transistor forms step; And a pixel electrode forms step; It is upwards to form a first metal layer in regular turn from a base material that this gate electrode forms step, and behind one first photoresist layer, cooperates a gate light shield to make the first metal layer form a gate electrode separately with micro image etching procedure; And one first electrode; It is from this base material, this gate electrode that this thin-film transistor forms step, reach this first electrode surface and upwards form an insulating barrier, initiatively semiconductor layer, a doping semiconductor layer, one second metal level, a protective layer in regular turn, and behind one second photoresist layer; Cooperate gray-level mask more than to make this second photoresist layer form one with micro image etching procedure and cover this protective layer, this second metal level, this doping semiconductor layer; And this predetermined structure of semiconductor layer initiatively, and to should gate electrode, opposite two side positions of this gate electrode, and this first electrode has the patterning photoresist layer of different-thickness; Then remove this protective layer, this second metal level, this doping semiconductor layer of not covered by this patterning photoresist layer; And the structure of this active semiconductor layer, be shade with this patterning photoresist layer then, cooperate repeatedly etching mode to remove corresponding to this protective layer structure of this first electrode top; Form a pair of should gate electrode top and the passage that makes this active semiconductor layer expose; Reach two and be positioned at this passage two opposite sides and make the exposed contact hole of this second metal level, and make a thin-film transistor structure corresponding to this gate electrode, and a dielectric structure corresponding to this first electrode; This pixel electrode forms step, forms the pixel electrode that is made up of transparent conductive material in the precalculated position of this thin-film transistor structure.
The manufacture method of thin film transistor base plate of the present invention; It is upwards to form a transparency conducting layer in regular turn from this thin-film transistor structure earlier that this pixel electrode forms step; And behind one the 3rd photoresist layer, cooperating a pixel electrode light shield to make this transparency conducting layer form a pixel electrode in the precalculated position with micro image etching procedure, the pixel electrode with this non crystalline structure carries out tempering again; Make non crystalline structure change crystalline texture into, make this thin film transistor base plate.
The manufacture method of thin film transistor base plate of the present invention; It is the transparency conducting layer that is constituted and had non crystalline structure earlier from this thin-film transistor structure surface formation one by transparent conductive material that this pixel electrode forms step; With the annealing laser mode structure in this transparency conducting layer precalculated position is transformed into polycrystalline structure by non crystalline structure again; Non crystalline structure etching with this transparency conducting layer removes again; Make this residual transparency conducting layer form a pixel electrode in the precalculated position, make this thin film transistor base plate.
The manufacture method of thin film transistor base plate of the present invention; It is the transparency conducting layer that is constituted and had non crystalline structure earlier from this thin-film transistor structure surface formation one by transparent conductive material that this pixel electrode forms step; Utilizing laser to remove mode again removes the predetermined structure of this transparency conducting layer; Make residual transparency conducting layer form a pixel electrode in the precalculated position, make this thin film transistor base plate.
The manufacture method of thin film transistor base plate of the present invention; This thin-film transistor forms these many gray-level masks that cooperate in the step and has a complete printing opacity GTG, a complete light tight GTG; And at least two different printing opacity GTGs, and this thin-film transistor to form the patterning photoresist layer that step forms be to make it have minimum thickness in the predetermined position that forms this passage of correspondence.
It is when forming this two contact hole, will to remove corresponding to this protective layer structure of this first electrode position in the lump that the manufacture method of thin film transistor base plate of the present invention, this thin-film transistor form step.
The manufacture method of thin film transistor base plate of the present invention; This thin-film transistor forms these many gray-level masks that cooperate in the step and has a complete printing opacity GTG, a complete light tight GTG; And at least three different printing opacity GTGs, and position that should first electrode had minimum thickness.
The manufacture method of thin film transistor base plate of the present invention; It is after will removing photoresist layer structure that should first electrode position earlier that this thin-film transistor forms step, removes the active semiconductor layer structure at protective layer structure to this place that should the first electrode position place exposed again.
The manufacture method of thin film transistor base plate of the present invention; This thin-film transistor forms this insulating barrier, this active semiconductor layer, this doping semiconductor layer of step; And this protective layer is to be formed by the chemical deposition mode; This second metal level is to form with sputtering way, and is setting adjacent one another are in order to the equipment that carries out chemical deposition and sputter.
Beneficial effect of the present invention is: utilize the many gray-level masks with multiple different printing opacity GTGs; Processing procedure in conjunction with five layers of light shield of tradition; Not only can effectively promote process rate, and can lower light shield quantity, effectively reduce the light shield equipment cost of integral manufacturing process.
Description of drawings
Fig. 1 is the auxilliary sketch map of looking of a kind of " thin film transistor base plate " in the past;
Fig. 2 be this in the past thin film transistor base plate along the cutaway view of A-A straight line;
Fig. 3-the 1st, thin film transistor base plate was along the cutaway view of B-B straight line in the past for this, and this storage capacitors is the MIS structure;
Fig. 3-the 2nd, thin film transistor base plate was along the cutaway view of B-B straight line in the past for this, and this storage capacitors is a mim structure;
Fig. 4 is this processing flow figure of manufacture method of thin film transistor base plate in the past;
Fig. 5 is the sketch map that this gate electrode of aid illustration Fig. 4 forms step;
Fig. 6 is the sketch map that this active semiconductor layer of aid illustration Fig. 4 forms step;
Fig. 7 is the sketch map that this source of aid illustration Fig. 4/drain electrode forms step;
Fig. 8 is the sketch map that this contact hole of aid illustration Fig. 4 forms step;
Fig. 9 is the sketch map that this pixel electrode of aid illustration Fig. 4 forms step;
Figure 10 explains in the past with the three-layer light cover processing procedure to carry out photoresistance when peeling off, and the light resistance structure that conductive layer is removed in the lump drives and the sketch map peeled off;
Figure 11 is the flow chart of first preferred embodiment of the manufacture method of explanation thin film transistor base plate of the present invention;
Figure 12 be an explanation make with first preferred embodiment of the manufacture method of thin film transistor base plate of the present invention and the cutaway view of thin film transistor base plate;
Figure 13 is the sketch map that this gate electrode of aid illustration Figure 11 forms step;
Figure 14 is the sketch map that this thin-film transistor structure of aid illustration Figure 11 forms step;
Figure 15 is the sketch map that this pixel electrode of aid illustration Figure 11 forms step;
Figure 16 be an explanation make with second preferred embodiment of the manufacture method of thin film transistor base plate of the present invention and the cutaway view of thin film transistor base plate;
Figure 17 is the sketch map that the thin-film transistor structure of this second preferred embodiment of aid illustration forms step.
Embodiment
Below in conjunction with accompanying drawing and embodiment the present invention is elaborated:
At first be noted that; The manufacture method of thin film transistor base plate of the present invention can be used to make independent thin-film transistor structure simultaneously; And the thin film transistor base plate that has thin-film transistor structure and storage capacitors simultaneously, two following preferred embodiments are that example is explained for the thin film transistor base plate that has thin-film transistor structure and storage capacitors with making simultaneously.
Consult Figure 11, Figure 12, one first preferred embodiment of the manufacture method of a kind of thin film transistor base plate of the present invention is to make thin film transistor base plate shown in figure 12.
Please consult Figure 12 earlier, similar with existing thin film transistor base plate, this thin film transistor base plate is by a clear glass substrate 31, and most proper alignment are formed on 4 formations in picture element unit on the base material 31.
This each picture element unit 4 comprises that the thin-film transistor structure 32, that is formed on this base material 31 is formed on this base material 31; The storage capacitors 33 that is provided with at interval with this thin-film transistor structure 32, and one cover this thin-film transistor structure 32 and this storage capacitors 33, the pixel electrode 34 that makes this thin-film transistor structure 32 and this storage capacitors 33 be electrically connected to each other.
This thin-film transistor structure 32 comprise one be formed on this base material 31 gate 321, the insulating barriers 322, that cover this base material 31 and this gate electrode 321 surfaces active semiconductor layer 323a, that are formed on these insulating barrier 322 surfaces to be formed on this active semiconductor layer 323a surperficial; And the doping semiconductor layer 323b that each interval one passage 35 is provided with, be formed on the protective layer 326 that one source pole electrode 324 that this doping semiconductor layer 323b upper surface and this passage 35 of each interval be oppositely arranged and a drain electrode 325, are formed at this source electrode 324 and these drain electrode 325 upper surfaces; This protective layer 326 has two leg 326a, and this each leg 326a defines one respectively and makes this source electrode 324, and this drain electrode 325 exposed contact hole 36 of faces partly.
The structure of this storage capacitors 33 is MIS (metal-insulator-Semiconductor) structure of general common name; Comprise one be formed on base material 31 first electrode 331, the insulating barrier 332, that covers this first electrode 331 active semiconductor layer 333a, that are formed on these insulating barrier 332 surfaces be formed on the doping semiconductor layer 333b on this active semiconductor layer 333a surface, and one is formed on the second surperficial metal 334 of this doping semiconductor layer 333b.
This pixel electrode 34 covers this two leg 326a; And the exposed surface of the source electrode that defines of this two contact hole 36 324 and drain electrode 325; And this drain electrode 325 extends a side that covers these thin-film transistor structure 32 contiguous these storage capacitors 33 certainly; And base material 31 surfaces between this thin-film transistor structure 32 and this storage capacitors 33, to covering storage capacitors 33 end faces.
Say that at length this gate electrode 321 is to be selected from Al, Cu, Mo, Ti, Cr, MoW, AlNd, AlNiHf with this first electrode 331, or the single layer structure that constitutes wherein, or sandwich construction, for example bilayer such as Mo/AlNd or Mo/Al/Mo or three-decker; This insulating barrier 322,332 can be selected from silicon nitride (SiNx), silica (SiOx), silicon-oxygen nitride materials such as (SiOxNy); This active semiconductor layer 323a, 333a are for being made up of amorphous silicon (a-Si) and being formed on this insulating barrier 322,332 surfaces; This doping semiconductor layer 323b, 333b are made up of N type doped amorphous silicon (n+-a-Si); It is to be selected from the single or multiple lift structure that is constituted with this gate electrode 321 identical materials that electrode 324, drain electrode 325 and this second electrode 334 are drawn in this source; This protective layer 326 is constituted by being selected from this insulating barrier 322,332 identical materials; This pixel electrode 34 transparent conductive materials such as ITO, AZO, GZO, IZO, CNTs of for example serving as reasons constitute, and therefore present technique field dealer institute is known and non-no longer adds to give unnecessary details for emphasis of the present invention because each material category of this picture element unit 4 is chosen as.
Above-mentioned this thin film transistor base plate is in the explanation of first preferred embodiment of the manufacture method that cooperates following thin film transistor base plate of the present invention, when can be clearer.
Consult Figure 11, first preferred embodiment of the manufacture method of thin film transistor base plate of the present invention comprises that a gate electrode forms step 61, a thin-film transistor forms step 62, and a pixel electrode forms step 63.
Cooperate and consult Figure 13; This gate electrode forms step 61; Be on a base material 31, to deposit earlier to form one deck the first metal layer 100, make this first metal layer 100 form those gate electrodes that are provided with at interval (gate electrode) 321 with micro image etching procedure again, and first electrode 331.
In more detail; Be on this first metal layer 100, to form a photoresist layer 200 earlier; The material of this photoresist layer 200 can be selected from eurymeric photoresist or minus photoresist; Because the present technique field that the is chosen as person of photoresist institute is known, and non-ly therefore do not add to give unnecessary details for emphasis of the present invention, this photoresist layer 200 is to be that example is explained with the eurymeric photoresist in present embodiment.
Re-use the gate light shield M1 of single printing opacity in the existing mask processing procedure; After the photoresist layer 200 of aforementioned formation formed the predetermined pattern photoresistance in the precalculated position; The first metal layer 100 that will do not covered by the predetermined pattern photoresistance with wet type or dry-etching mode again removes; Again the predetermined pattern photoresistance is removed at last, can make the first metal layer form the gate electrode 321 and first electrode 331.
Cooperate and consult Figure 14; Then implement this thin-film transistor and form step 62; Earlier from this base material 31, this gate electrode 321; And these first electrode, 331 surfaces form an insulating barrier 301, initiatively semiconductor layer 302a, a doping semiconductor layer 302b, one second metal level 303 in regular turn, and a protective layer 304; In present embodiment; Be with relevant chemical vapor deposition (CVD) mode; For example electricity slurry strengthen chemical vapour deposition (CVD) (hereinafter to be referred as PECVD) certainly this base material 31, this gate electrode 321, and these first electrode, 331 surfaces deposit the active semiconductor layer 302a that the insulating barrier that is made up of silicon nitride (SiNx) 301, is made up of amorphous silicon (a-Si) in regular turn; With a doping semiconductor layer 302b by n+ type amorphous silicon (n+-a-Si) formation; Then go up second metal level 303 that formation one is made up of Mo/Al/Mo in this doping semiconductor layer 302b, deposit the protective layer 304 that formation is made up of silicon nitride (SiNx) with the PECVD mode more at last with sputter (sputtering) or vapor deposition (evaporation) mode.
Be noted that especially owing to this insulating barrier 301 of the present invention, active semiconductor layer 302a, doping semiconductor layer 302b, second metal level 303, and protective layer 304 makes for successive sedimentation; Therefore; In order to form the equipment of those different layers bodies, for example in this enforcement in order to depositing this insulating barrier 301, initiatively semiconductor layer 302a, doping semiconductor layer 302b, and the PECVD equipment of this protective layer 304 can adjacent one another arely be provided with the equipment of crossing that spatters that forms this second metal level 303; Not only can be in order to save the device space; And because this processing procedure is to carry out follow-up deposition, little shadow again behind those different coating of successive sedimentation, or etching step,, each layer coating must pass through micro image etching procedure unlike convention after forming; Or must because of discontinuous deposition draw again shift out depositing device after; Because of environmental pollution must be cleaned the deposition that just can carry out next processing procedure again, therefore, can avoid because of the pollution that repeatedly gets into each processing procedure and caused and can effectively reduce processing procedure and transmission time.
For example; In present embodiment in order to deposit aforementioned should by a-Si the insulating barrier that constituted 301 initiatively semiconductor layer 302a doping semiconductor layer 302b second metal level 303 the PECVD and the sputtering equipment of protective layer 304; Can arrange in the form of a ring according to process requirement is adjacent one another are respectively, or be in line arrangement; Or can be further with respectively in order to the deposition different materials, but for using the same deposition mode, as in present embodiment a-Si be and utilize the PECVD mode to deposit; Al be to form with sputtering way, therefore, can be respectively in order to deposition SiNx, a-Si; And the PECVD equipment of n+a-Si, the sputtering equipment that reaches deposition Mo, Al is integrated into single process apparatus separately, and makes its adjacent arrangement; So, can more effectively reduce the device space and processing procedure and transmission time.
Then on this protective layer 304, form a photoresist layer 200, cooperate the MTM1 of gray-level mask more than to make this photoresist layer 200 form patterning photoresist layer 201 with micro image etching procedure again.
This many gray-level mask MTM1 that is applicable to present embodiment can be half light modulation cover (Half-tone mask) or gray-level mask Gray-tone mask); Half light modulation cover (Half-tone mask) is for being utilized in the light blocking film layer that forms different-thickness on the transparent substrates; And can make light have the light shield of different penetrations; Light can cause exposure inhomogeneous when the light blocking film layer through this different-thickness; And make the photoresistance surface receive different exposure energies, therefore, the photoresistance after the exposure can form the patterning photoresistance that highly differs after development; Gray-level mask (Gray-tone mask) then is a kind of light shield that on transparent substrates, has the micro-structural of being made up of the grating of different in width; Utilize light to pass interference and diffraction effect that this micro-structural causes; Cause exposure inhomogeneous; And make the photoresistance surface receive different exposure energies, therefore, also can form the patterning photoresistance that highly differs after the development.
In present embodiment; This many gray-level mask MTM1 is to be that example is explained with half light modulation cover, by the control of light blocking film layer, can make it have complete printing opacity GTG G1, complete light tight GTG G2; And two printing opacity GTG G3, the G4s of light transmittance between complete printing opacity GTG G1 and complete light tight GTG G2; Therefore, cooperate this many gray-level masks MTM1 with micro-photographing process, can make this patterning photoresist layer 201 to should gate electrode the 321 predetermined positions that form these passages 35, be positioned at the position of this two contact hole 36 of the predetermined formation in these gate electrode 321 both sides; And to should having different-thickness a and b respectively in first electrode, 331 positions, and thickness a has minimum thickness.
Then; This protective layer 304 and this second metal level 303 that will do not covered by this patterning photoresist layer 201 respectively with Wet-type etching and dry-etching mode remove; Be shade then again with this patterning photoresist layer 201; Utilize repeatedly etching mode,, reach two contact holes 36 that are positioned at these both sides, gate electrode 321 position in to forming this passage 35 in gate electrode 321 positions.
At length say; Be first, 201 pairs of this patterning photoresist layers should be removed by the gate electrode 321 predetermined light resistance structures that form passages 35 positions, make this protective layer 304 expose with ashing (Ashing) mode; Then; Remove to this active semiconductor layer 302a from these protective layer that exposes 304 downward etchings with Wet-type etching or dry-etching mode again and expose this source electrode 324 that makes this second metal level 303 form, and this drain electrode 325 with these passage 35 each intervals; Then again this patterning photoresist layer 201 is positioned at the predetermined light resistance structure that forms contact hole 36 in these gate electrode 321 both sides; And light resistance structure that should first electrode, 331 positions removed with the ashing mode; Make this protective layer 304 expose; With the dry-etching mode aforementioned this protective layer 304 that exposes is removed to this source electrode 324 and this drain electrode 325 part surface exposures again; Form two respectively to should source electrode 324 and the contact hole 36 of these drain electrode 325 positions, and obtain thin-film transistor structure 32 corresponding to this gate electrode 321, and to storage capacitors 33 that should first electrode 331.
Then, again in this thin-film transistor structure 32, and this active semiconductor layer 302a of exposing of the sidewall of this storage capacitors 33; And this doping semiconductor layer 302b surface formation one obstruct insulating barrier, preventing short circuit to protect this passage 35, this obstruct insulating barrier can utilize oxynitriding (Oxyintridation) processing procedure; Or can add PSG processing procedure, BSG processing procedure again, or the BPSG processing procedure, make through the Reflow processing procedure again; Since those processing procedures for this reason art know, and non-be the emphasis of present technique, therefore; No longer add to give unnecessary details; In present embodiment is to utilize the oxynitriding processing procedure in this thin-film transistor structure 32, reaches this active semiconductor layer 302a that these storage capacitors 33 sidewalls expose, and reaches the obstruct insulating barrier that the formation one of this doping semiconductor layer 302b surface is made up of SiOxNy.
Cooperate and consult Figure 15, implement this pixel electrode at last and form step 63, the pixel electrode 34 that the precalculated position formation one in this thin-film transistor structure 32 and this storage capacitors 33 surfaces is made up of transparent conductive material.
Detailed says; It is that upwards forming one in regular turn comprises transparent conductive materials such as ITO, AZO, IZO, GZO, CNTs from this thin-film transistor structure earlier with sputter (sputtering) or vapor deposition (evaporation) mode that this pixel electrode forms step 63; And be the transparency conducting layer of non crystalline structure; And behind one the 3rd photoresist layer, cooperate a pixel electrode light shield M5, remove with the predetermined portions of micro image etching procedure again this transparency conducting layer; Make this residual transparency conducting layer form this pixel electrode 34 in the precalculated position; Again this pixel electrode 34 with non crystalline structure is carried out tempering, make it change crystalline texture into, promptly accomplish the making of this thin film transistor base plate by non crystalline structure.
In present embodiment; This step 63 is to be the material formation by tin indium oxide (ITO) and to be the transparency conducting layer 305 of non crystalline structure from this thin-film transistor structure 32 and the 33 surface formation one of this storage capacitors with sputter (sputtering) mode earlier; On this transparency conducting layer 305, form a photoresist layer 200 again; Then cooperate this pixel electrode light shield M5 in the existing five road light shield processing procedures with micro-photographing process, with this photoresist layer 200 in to should passage 35 and the light resistance structure of adjacent channel 35 remove, form the patterning photoresistance; Transparency conducting layer 305 structures that will do not covered by this patterning photoresistance with the Wet-type etching mode again remove; After then again this patterning photoresistance etching being removed, can form this pixel electrode 34, under the activation temperature of TFT, this pixel electrode 34 carried out tempering more at last in the precalculated position on this thin-film transistor structure 32 and this storage capacitors 33 surfaces; Make its structure be transformed into crystalline texture, promptly obtain thin film transistor base plate shown in figure 12 by non crystalline structure.
What deserves to be mentioned is; This pixel electrode forms step 63 also can use micro-photographing process, and adopts the annealing laser processing mode to make laser light pass light shield, makes the crystalline texture of this transparency conducting layer 305 change; And utilize after the different poor solubility that caused of crystalline texture; With etching mode non crystalline structure is removed again, and make this pixel electrode 34, or laser also capable of using removes mode; Make laser light pass light shield and directly unnecessary transparency conducting layer 305 structures are removed, and make this pixel electrode 34.Specifically, this annealing laser processing mode is to form earlier one to comprise transparent conductive material such as ITO, AZO, IZO, GZO, CNTs and have the transparency conducting layer 305 of non crystalline structure from these thin-film transistor structure 32 surfaces, utilizes power between 50～200mJ/cm again
2The precalculated position of this transparency conducting layer 305 of laser irradiation; Make this structure be transformed into polycrystalline structure by non crystalline structure by the postradiation transparency conducting layer 305 of laser; Then,, remove not shone the transparency conducting layer 305 of still keeping non crystalline structure by laser for example with the oxalic acid etching solution with the Wet-type etching mode; Make this residual transparency conducting layer 305 form a pixel electrode 34 in the precalculated position, make this thin film transistor base plate.
No matter it is to utilize micro-photographing process or this pixel electrode 34 of annealing laser processing mode formation that this pixel electrode forms step 63; Because the transparency conducting layer 305 that it removed all is non crystalline structures; Therefore etching solution capable of using (for example oxalic acid etching solution) directly dissolves and removes; So can be as existing three road light shield processing procedures not peeling off the problem that the yield problem that caused when mode removes transparency conducting layer 17a structure and filtration system are blocked, and can effectively promote process rate.
Consult Figure 16, Figure 17, one second preferred embodiment of the manufacture method of thin film transistor base plate of the present invention can also be made thin film transistor base plate shown in figure 16.
Consult Figure 16; This second preferred embodiment of the present invention and the prepared thin film transistor base plate of this first preferred embodiment are similar; Be by a clear glass substrate 31; And the picture element unit 4 ' that most proper alignment are formed on this base material 31 constitutes, and this each picture element unit 4 ' comprises that one is formed on thin-film transistor structure 32, the storage capacitors 33 ' on this base material 31, reaches a pixel electrode 34; Difference is in MIM (Metal-insulator-metal) structure of this storage capacitors 33 ' for general common name; Have one be formed on this base material 31 first electrode 331, cover the insulating barrier 332 of this first electrode 331, and second electrode 335 that is formed on this insulating barrier 332, and this second electrode 335 is this and covers 34 formation of pixel electrode on this insulating barrier 332.
This second preferred embodiment of the manufacture method of thin film transistor base plate of the present invention and the manufacture method of this first preferred embodiment are roughly the same, and difference is in thin-film transistor and forms step 62 '.
Cooperate and consult Figure 17; This second preferred embodiment forms step 62 in carrying out this thin-film transistor ' time many gray-level masks MTM2 of using be still with half light modulation cover and explain as example; Different is; This many gray-level mask MTM2 has complete printing opacity G1, complete light tight G2, reach other three different printing opacity GTG G5, G6, G7, and light transmittance is G7＞G6＞G5; Therefore; When cooperating this many gray-level masks MTM2 to carry out micro-photographing process with micro-photographing process, can make formation patterning photoresist layer 202 can to the predetermined position that forms passage 35 above should gate electrode 321, be positioned at the predetermined position that forms contact hole 36, these gate electrode 321 both sides, reach having different-thickness a, b respectively in first electrode slice, 331 positions; And c; Wherein, c has minimum thickness, and the thickness of b is greater than a.
And be that shade is when carrying out repeatedly etching with this patterning photoresist layer 202 again; Then be will light resistance structure that should first electrode, 331 positions to be removed earlier; Make this protective layer 304 of these first electrode, 331 top positions expose, remove this protective layer 304, this second metal level 303 with Wet-type etching and the protective layer 304 downward etchings of dry-etching mode from this place respectively again, 302a exposes to this active semiconductor layer; Afterwards; Form this passage 35 and this two contact hole 36 with the etching mode identical again, and obtain a thin-film transistor structure 32 corresponding to this gate electrode 321 with this first preferred embodiment, and a pair of dielectric structure 33a that should first electrode 331; Then, the passage 35 in this thin-film transistor structure 32 forms a SiOxNy insulating barrier again, can make structure shown in figure 17.
Carry out this pixel electrode at last again and form step 63; In this thin-film transistor structure 32; And behind this formation picture electrode 34 of this dielectric structure 33a predetermined surface position, can make the picture element unit 4 ' with this storage capacitors 33 ' of this thin-film transistor structure 32 and mim structure shown in figure 16.
Many gray-level masks that utilization of the present invention has multiple different printing opacity GTGs replace semiconductor layer light shield M2, source/drain electrode light shield M3 and the contact hole light shield M4 of existing five layers of light shield processing procedure simultaneously, can be successfully the processing procedure of thin film transistor base plate be reduced to the three-layer light cover processing procedure by five layers of light shield processing procedure; Simultaneously; If further utilize the laser processing mode to form this pixel electrode; Then more can the processing procedure of thin-film transistor be simplified to and have only two layers of light shield processing procedure, and effectively simplify processing procedure, reduction light shield equipment cost, simultaneously; The implementation step process of the present invention's design is not used the lift-off processing procedure; Therefore can when removing unnecessary photoresistance and conductive coating structure, not cause process rate to reduce, and the conductive coating structure after peeling off blocks the problem that filtration system causes the miscellaneous equipment consume on the contrary, reach the object of the invention really.
Claims (15)
1. the manufacture method of a thin film transistor base plate; It is characterized in that: the manufacture method of this thin film transistor base plate comprises that a gate electrode forms step, a thin-film transistor forms step; And a pixel electrode forms step; It is upwards to form a first metal layer in regular turn from a base material that this gate electrode forms step, and behind one first photoresist layer, cooperates a gate light shield to make the first metal layer form a gate electrode with micro image etching procedure; It is from this base material that this thin-film transistor forms step; Reach this gate electrode and upwards form an insulating barrier, initiatively semiconductor layer, a doping semiconductor layer, one second metal level, a protective layer in regular turn, and behind one second photoresist layer, cooperate gray-level mask more than to make this second photoresist layer form one with micro image etching procedure and cover this protective layer, this second metal level, this doping semiconductor layer; And the patterning photoresist layer of this active semiconductor layer predetermined structure; And this patterning photoresist layer then removes this protective layer, this second metal level, this doping semiconductor layer of not covered by this patterning photoresist layer to having different-thickness by opposite two side positions with this gate electrode of gate electrode, and the structure of this active semiconductor layer; And then be shade with this patterning photoresist layer; Cooperate repeatedly etching mode form a pair of should gate electrode top and the passage that makes this active semiconductor layer expose, and two contact holes that are positioned at this passage two opposite sides and make this second metal level expose make a thin-film transistor structure corresponding to this gate electrode; It is to form the pixel electrode that is made up of transparent conductive material in the precalculated position of this thin-film transistor structure that this pixel electrode forms step, accomplishes the making of this thin film transistor base plate.
2. the manufacture method of thin film transistor base plate according to claim 1; It is characterized in that it is upwards to form a transparency conducting layer in regular turn from this thin-film transistor structure earlier that described this pixel electrode forms step; And behind one the 3rd photoresist layer; Make this transparency conducting layer form this pixel electrode in the precalculated position with micro image etching procedure, again this pixel electrode with non crystalline structure is carried out tempering, make non crystalline structure change crystalline texture into.
3. the manufacture method of thin film transistor base plate according to claim 1; It is characterized in that it is the transparency conducting layer that is constituted and had non crystalline structure earlier from this thin-film transistor structure surface formation one by transparent conductive material that described this pixel electrode forms step; With the annealing laser mode structure in this transparency conducting layer precalculated position is transformed into polycrystalline structure by non crystalline structure again; Then the non crystalline structure etching with this transparency conducting layer removes; Make this residual transparency conducting layer form a pixel electrode in the precalculated position, make this thin film transistor base plate.
4. the manufacture method of thin film transistor base plate according to claim 1; It is characterized in that it is the transparency conducting layer that is constituted and had non crystalline structure earlier from this thin-film transistor structure surface formation one by transparent conductive material that described this pixel electrode forms step; Utilizing laser to remove mode again removes the predetermined structure of this transparency conducting layer; Make residual transparency conducting layer form a pixel electrode in the precalculated position, make this thin film transistor base plate.
5. the manufacture method of thin film transistor base plate according to claim 1; It is characterized in that these many gray-level masks that described this thin-film transistor forms in the step have a complete printing opacity GTG, a complete light tight GTG, and the printing opacity GTG of at least two different light transmittances.
6. the manufacture method of thin film transistor base plate according to claim 1; It is characterized in that described this thin-film transistor forms this insulating barrier, this active semiconductor layer, this doping semiconductor layer of step; And this protective layer is to be formed by the chemical deposition mode; This second metal level is to form with sputtering way, and is setting adjacent one another are in order to the equipment that carries out chemical deposition and sputter.
7. the manufacture method of a thin film transistor base plate; It is characterized in that: the manufacture method of this thin film transistor base plate comprises that a gate electrode forms step, a thin-film transistor forms step, and pixel electrode formation step, and it is upwards to form a first metal layer in regular turn from a base material that this gate electrode forms step; And behind one first photoresist layer; Cooperate a gate light shield to make the first metal layer form a gate electrode separately with micro image etching procedure, and one first electrode, it is from this base material, this gate electrode that this thin-film transistor forms step; And this first electrode surface upwards forms an insulating barrier, initiatively semiconductor layer, a doping semiconductor layer, one second metal level, a protective layer in regular turn; And behind one second photoresist layer, cooperate gray-level mask more than to make this second photoresist layer form one with micro image etching procedure and cover this protective layer, this second metal level, this doping semiconductor layer, and the predetermined structure of this active semiconductor layer; And to should gate electrode, opposite two side positions of this gate electrode; Reach the patterning photoresist layer that this first electrode has different-thickness, then remove this protective layer, this second metal level, this doping semiconductor layer of not covered by this patterning photoresist layer, and the structure of this active semiconductor layer; Be shielding with this patterning photoresist layer then; Cooperate repeatedly etching mode to remove, forms a pair of passage of should the gate electrode top and making this active semiconductor layer expose, reach two contact holes that are positioned at this passage two opposite sides and make this second metal level expose corresponding to this protective layer structure of this first electrode top; And make a thin-film transistor structure corresponding to this gate electrode; And a dielectric structure corresponding to this first electrode, this pixel electrode forms step, forms the pixel electrode that is made up of transparent conductive material in the precalculated position of this thin-film transistor structure.
8. the manufacture method of thin film transistor base plate according to claim 7; It is characterized in that it is upwards to form a transparency conducting layer in regular turn from this thin-film transistor structure earlier that described this pixel electrode forms step; And behind one the 3rd photoresist layer, cooperating a pixel electrode light shield to make this transparency conducting layer form a pixel electrode in the precalculated position with micro image etching procedure, the pixel electrode with this non crystalline structure carries out tempering again; Make non crystalline structure change crystalline texture into, make this thin film transistor base plate.
9. the manufacture method of thin film transistor base plate according to claim 7; It is characterized in that it is the transparency conducting layer that is constituted and had non crystalline structure earlier from this thin-film transistor structure surface formation one by transparent conductive material that described this pixel electrode forms step; With the annealing laser mode structure in this transparency conducting layer precalculated position is transformed into polycrystalline structure by non crystalline structure again; Non crystalline structure etching with this transparency conducting layer removes again; Make this residual transparency conducting layer form a pixel electrode in the precalculated position, make this thin film transistor base plate.
10. the manufacture method of thin film transistor base plate according to claim 7; It is characterized in that it is the transparency conducting layer that is constituted and had non crystalline structure earlier from this thin-film transistor structure surface formation one by transparent conductive material that described this pixel electrode forms step; Utilizing laser to remove mode again removes the predetermined structure of this transparency conducting layer; Make residual transparency conducting layer form a pixel electrode in the precalculated position, make this thin film transistor base plate.
11. the manufacture method of thin film transistor base plate according to claim 7; It is characterized in that described this thin-film transistor forms these many gray-level masks that cooperate in the step and has a complete printing opacity GTG, a complete light tight GTG; And at least two different printing opacity GTGs, and this thin-film transistor to form the patterning photoresist layer that step forms be to make it have minimum thickness in the predetermined position that forms this passage of correspondence.
12. the manufacture method of thin film transistor base plate according to claim 11 is characterized in that described this thin-film transistor forms step, is when forming this two contact hole, will to remove corresponding to this protective layer structure of this first electrode position in the lump.
13. the manufacture method of thin film transistor base plate according to claim 7; It is characterized in that described this thin-film transistor forms these many gray-level masks that cooperate in the step and has a complete printing opacity GTG, a complete light tight GTG; And at least three different printing opacity GTGs, and position that should first electrode had minimum thickness.
14. the manufacture method of thin film transistor base plate according to claim 13; It is characterized in that it is after will removing photoresist layer structure that should first electrode position earlier that described this thin-film transistor forms step, remove the active semiconductor layer structure at protective layer structure to this place that should the first electrode position place exposed again.
15. the manufacture method of thin film transistor base plate according to claim 7; It is characterized in that described this thin-film transistor forms this insulating barrier, this active semiconductor layer, this doping semiconductor layer of step; And this protective layer is to be formed by the chemical deposition mode; This second metal level is to form with sputtering way, and is setting adjacent one another are in order to the equipment that carries out chemical deposition and sputter.
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| JP2010087527A (en) * | 1998-12-31 | 2010-04-15 | Samsung Electronics Co Ltd | Thin film transistor substrate for liquid crystal display device, and method of manufacturing the same |
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