CN102437049B - Method for simplifying double pattern exposure process of side wall definition - Google Patents
Method for simplifying double pattern exposure process of side wall definition Download PDFInfo
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- CN102437049B CN102437049B CN201110235262.2A CN201110235262A CN102437049B CN 102437049 B CN102437049 B CN 102437049B CN 201110235262 A CN201110235262 A CN 201110235262A CN 102437049 B CN102437049 B CN 102437049B
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Abstract
The invention relates to the field of semiconductor manufacture, in particular to a method for simplifying a double pattern exposure process of side wall definition. The invention discloses the method for simplifying the double pattern exposure process of the side wall definition, which has the advantages that through reducing the exposure process in the double pattern exposure of the traditional side wall definition, the process flow is simplified, the process cost is correspondingly reduced, and the device qualification rate is improved.
Description
Technical field
The present invention relates to field of semiconductor manufacture, relate in particular to a kind of method of the secondary image exposure technique of simplifying side wall definition.
Background technology
In the preparation process of semiconductor device, along with developing rapidly of very lagre scale integrated circuit (VLSIC), when the integrated level of chip is more and more higher, chip size is also more and more little.In process in chip preparing process, critical size (Critical Dimension is called for short CD) is also along with the development of technology generations is being dwindled step by step, so just more and more higher to the requirement of photoetching process; Owing to being subject to the restriction of mask aligner optical source wavelength, existing 193 nanometer immersion lithography machines can not meet the demand of 32 nanometers and following technique thereof, now, general secondary image exposure (Double Patterning) technology or the extreme ultra violet photoetching technique (Extreme Ultraviolet is called for short EUV) of adopting solves the problems referred to above.
Fig. 1-8 are the schematic flow sheet of the secondary image exposure photoetching technique of side wall definition in background technology of the present invention.Secondary image exposure (the Spacer Defined Double Patterning) photoetching technique of the side wall definition that secondary image exposure (Double Patterning) technology comprises, can be applied among technique prepared by groove (trench) structure, as the groove structure such as active area (Active), metal (Metal) is carried out to pattern definition.As shown in Fig. 1-8, carry out pattern definition as example take metal valley, on substrate 101, be deposited with successively from bottom to up lower dielectric layer 102 and interlayer insulating film (Inter Metal Dielectric is called for short IMD) 103, on layer insulation dielectric layer 103, deposit hard mask sacrifice layer (Sacrificial Hard Mask) 104, then spin coating photoresist covers hard mask sacrifice layer 104, expose, after developing process, on hard mask sacrifice layer 104, form two photoresistances 105,106, the pitch (pitch) between it be D(as shown in Figure 1), continue take photoresistance 105,106 as the hard mask sacrifice layer 104 of mask etching is to layer insulation dielectric layer 103, remaining hard mask sacrifice layer 107,108 after removal photoresistance 105,106 rear formation etching, the pitch between it be also D(as shown in Figure 2), cvd nitride silicon thin film 109 covers remaining hard mask sacrifice layer 107 after etching, 108 and layer insulation dielectric layer 103 after (as shown in Figure 3), utilize anisotropic dry etching method to carry out etching to silicon nitride film 109, remaining hard mask sacrifice layer 107 after etching, on the layer insulation dielectric layer 103 of 108 sidewall and contiguous its bottom, form side wall (Spacer) (as shown in Figure 4), remove remaining hard mask sacrifice layer 107 after etching, after 108, carry out loop correction (loop triming) exposure technology, form side wall 110, 111, 112 and 113(as shown in Figure 5), utilize side wall 110, 111, 112 and 113 and photoresistance 114 as mask (as shown in Figure 6), layer insulation dielectric layer 103 is carried out to etching, form required trench lithography pattern (Pattern) groove 115, 116 and 117(as shown in Figure 7), and remove side wall 110, 111, 112 and 113 and photoresistance 114(as shown in Figure 8), pitch d now only has the half of the pitch D of photoresist definition for the first time, because hard mask sacrifice layer 104 is after forming side wall technique, remaining hard mask sacrifice layer 107 after etching, 108 both sides form respectively side wall 110, 111, 112 and 113, the pattern density that is side wall is the twice of the density of the pattern of initial lithographic glue formation, so the pitch of photoengraving pattern (pitch) D also narrows down to original 1/2 d accordingly, thereby reduce critical size.
The schematic flow sheet that Fig. 9-11 are background technology intermediate ring road correction exposure technology of the present invention.Groove is carried out, in the technical process of photoengraving pattern definition, need to use third photo etching exposure technology in the secondary image exposure technology of utilizing side wall definition.As shown in Figure 9, remove the vertical view after remaining hard mask sacrifice layer 107,108 after etching, vertical view while being core pattern (Core Pattern) formation, this core pattern mainly refers to the pattern of pitch minimum, this part pattern need to adopt secondary image exposure technology to form; Due to side wall technique form be the side wall 118 of a loop structure, need to carry out photoetching process for the second time, i.e. loop correction photoetching process etches away unnecessary side wall 118
1; As shown in figure 10, for photoresist 119 covers the side wall that needs reservation, and remove unnecessary side wall 118 take it as mask
1, as shown in figure 11, form and there is the structure that forms side wall 110,111,112 and 113.
Figure 12-13 are the schematic flow sheet of photoetching for the third time in background technology of the present invention.Carry out photoetching process for the third time, to define non-core pattern, i.e. the larger pattern of pitch and size.As shown in figure 12, the side wall 110,111,112 and 113 that trench region pattern is retained afterwards by photoresist 120 and the photoetching for the second time of photoetching for the third time defines jointly, carry out etching with photoresist 120 and 110,111,112 and 113 pairs of trench regions of side wall, to form groove 121; As shown in figure 13, be the vertical view of channel patterns, remove after photoresist 120 and side wall 110,111,112 and 113, form channel patterns.
Why above-mentioned technique needs third photo etching, to be determined by the technique of the secondary image exposure that utilizes side wall to define itself, because side wall is around hard mask sacrifice layer patterning, so must utilize the photoetching process of loop correction for the second time to remove unwanted loop side wall.And because side wall can only define the size (minimum size) of single-width, so, for those non-core patterns, it is the pattern that pitch and size are larger, side wall cannot define, must utilize photoetching for the third time to define, increase accordingly the cost and the yield that has reduced device of technique.
Summary of the invention
The invention discloses a kind of method of the secondary image exposure technique of simplifying side wall definition, comprise the substrate that is sequentially coated with successively from bottom to up layer dielectric layer and layer insulation dielectric layer, on layer insulation dielectric layer, be provided with the side wall of loop structure, wherein, comprise the following steps:
Step S1: between deposition silicon dioxide film cover layer after insulating medium layer and side wall, carry out planarization, cover on side wall and partly cover the silica membrane on layer insulation dielectric layer to remove, remove part side wall, so that the upper surface of planarization back side wall and the upper surface of silica membrane are in same level simultaneously;
Step S2: remove the side wall after planarization, form the side wall groove of circulus in the silica membrane after planarization; Spin coating photoresist covers silica membrane and the side wall groove after planarization, after exposure, development, form photoresistance, and the silica membrane after mask etching planarization, to layer insulation dielectric layer, is removed photoresistance and is formed the silica membrane with channel patterns take this photoresistance;
Step S3: take the silica membrane with channel patterns as mask etching layer insulation dielectric layer is to layer dielectric layer, remove the silica membrane with channel patterns, form the structure of channel patterns.
The method of the secondary image exposure technique of above-mentioned simplification side wall definition, wherein, the material of the side wall of loop structure is silicon nitride.
The method of the secondary image exposure technique of above-mentioned simplification side wall definition, wherein, adopts chemical mechanical milling tech to carry out planarization.
The method of the secondary image exposure technique of above-mentioned simplification side wall definition, wherein, the silica membrane after the method etching planarization of employing high selectivity is to layer insulation dielectric layer.
The method of the secondary image exposure technique of above-mentioned simplification side wall definition, wherein, high selectivity is silicon dioxide/interlayer insulating film.
In sum, owing to having adopted technique scheme, the present invention proposes a kind of method of the secondary image exposure technique of simplifying side wall definition, by reducing the exposure technology in the secondary image exposure of traditional side wall definition, simplify technological process, reduce accordingly the cost of technique, and improved the yield of device.
Accompanying drawing explanation
Fig. 1-8 are the schematic flow sheet of the secondary image exposure photoetching technique of side wall definition in background technology of the present invention;
The schematic flow sheet that Fig. 9-11 are background technology intermediate ring road correction exposure technology of the present invention;
Figure 12-13 are the schematic flow sheet of photoetching for the third time in background technology of the present invention;
The schematic flow sheet of the method for the secondary image exposure technique of side wall definition is simplified for the present invention in Figure 14-25.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is further described:
As shown in Figure 14-25, the invention discloses a kind of method of the secondary image exposure technique of simplifying side wall definition, first, on substrate 201, order is deposited with lower dielectric layer 202 and interlayer insulating film 203 successively from bottom to up; On layer insulation dielectric layer 203, deposit after hard mask sacrifice layer 204, spin coating photoresist covers hard mask sacrifice layer 204, after exposure, development, as shown in figure 14, forms the structure with photoresistance 205,206 on hard mask sacrifice layer 204; Continue take photoresistance 205,206 as the hard mask sacrifice layer 204 of mask etching is to layer insulation dielectric layer 203, as shown in figure 15, remove photoresistance 205,206 and have with formation the structure of remaining hard mask sacrifice layer 207,208 after etching; As shown in figure 16, cvd nitride silicon thin film 209 covers after etching after remaining hard mask sacrifice layer 207,208 and layer insulation dielectric layer 203, utilize anisotropic dry etching method to carry out etching to silicon nitride film 209, after etching on the layer insulation dielectric layer 203 of the sidewall of remaining hard mask sacrifice layer 207,208 and contiguous its bottom, as shown in figure 17, form the side wall 210,211 of circulus, remove after etching after remaining hard mask sacrifice layer 207,208, as shown in figure 18, form the side wall groove 212,213 of circulus.
Then, as shown in figure 19, insulating medium layer 203 and side wall 210,211 and side wall groove 212,213 between deposition silicon dioxide film 214 cover layers, adopt cmp (Chemical Mechanical Polishing, being called for short CMP) technique carries out planarization, covers on side wall 210,211 and part covers the silica membrane on layer insulation dielectric layer 203 to remove, and removes the top of part side wall 210,211 simultaneously, as shown in figure 20, so that planarization back side wall 210
1, 211
1upper surface and planarization after silica membrane 214
1upper surface in same level.
Figure 22 is the vertical view of Figure 21; As shown in Figure 21,22, remove the side wall 210 after planarization
1, 211
1, the silica membrane 214 after planarization
1the side wall groove 215,216 of interior formation circulus; Spin coating photoresist 217 covers the silica membrane 214 after planarization
1with side wall groove 215,216, exposure, develop after form photoresistance (as shown in figure 23), and take this photoresistance the silica membrane 214 after the planarization that mask etching exposes
2to layer insulation dielectric layer 203, as shown in figure 24, remove photoresistance and form the silica membrane 214 with channel patterns 218
3;
Finally, to there is the silica membrane 214 of channel patterns 218
3for mask etching layer insulation dielectric layer 203 is to layer dielectric layer 202, remove the silica membrane 214 with channel patterns 218
3, as shown in figure 25, forming the structure 219 of channel patterns, its groove 220 bottoms are the upper surface of layer dielectric layer 202.
In sum, owing to having adopted technique scheme, the present invention proposes a kind of method of the secondary image exposure technique of simplifying side wall definition, by reducing the exposure technology in the secondary image exposure of traditional side wall definition, simplify technological process, reduce accordingly the cost of technique, and improved the yield of device.
Above specific embodiments of the invention be have been described in detail, but it is just as example, the present invention is not restricted to specific embodiment described above.To those skilled in the art, any equivalent modifications that the present invention is carried out and alternative also all among category of the present invention.Therefore, equalization conversion and the modification done without departing from the spirit and scope of the invention, all should contain within the scope of the invention.
Claims (4)
1. simplify the method for the secondary image exposure technique of side wall definition for one kind, comprise the substrate that is sequentially coated with successively from bottom to up layer dielectric layer and layer insulation dielectric layer, the side wall that is provided with loop structure on described layer insulation dielectric layer, is characterized in that, comprises the following steps:
Step S1: between deposition silicon dioxide film cover layer after insulating medium layer and side wall, carry out planarization, cover on side wall and partly cover the silica membrane on layer insulation dielectric layer to remove, remove part side wall, so that the upper surface of planarization back side wall and the upper surface of silica membrane are in same level simultaneously;
Step S2: remove the side wall after planarization, form the side wall groove of circulus in the silica membrane after planarization; Spin coating photoresist covers silica membrane and the side wall groove after planarization, after exposure, development, form photoresistance, and the silica membrane after mask etching planarization, to layer insulation dielectric layer, is removed photoresistance and is formed the silica membrane with channel patterns take this photoresistance; Wherein, a part for described photoresistance is rectangular patterns, and silica membrane within having covered the side wall groove of described circulus and between the side wall groove of described circulus;
Step S3: take the silica membrane with channel patterns as mask etching layer insulation dielectric layer is to layer dielectric layer, remove the silica membrane with channel patterns, form the structure of channel patterns;
Wherein, on layer insulation dielectric layer, deposit after hard mask sacrifice layer, spin coating photoresist covers hard mask sacrifice layer, after exposure imaging, form photoresistance, take photoresistance as the hard mask sacrifice layer of mask etching is to layer insulation dielectric layer, remove photoresistance to form the structure with remaining hard mask sacrifice layer after etching, cvd nitride silicon thin film covers after etching after remaining hard mask sacrifice layer and layer insulation dielectric layer, utilize anisotropic dry etching method to carry out etching to silicon nitride film, after etching on the layer insulation dielectric layer of the sidewall of remaining hard mask sacrifice layer and contiguous its bottom, form the side wall of circulus.
2. the method for the secondary image exposure technique of simplification side wall definition according to claim 1, is characterized in that, the material of the side wall of loop structure is silicon nitride.
3. the method for the secondary image exposure technique of simplification side wall definition according to claim 1, is characterized in that, adopts chemical mechanical milling tech to carry out planarization.
4. the method for the secondary image exposure technique of simplification side wall definition according to claim 1, is characterized in that, the silica membrane after the method etching planarization of employing high selectivity is to layer insulation dielectric layer.
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