CN102420234B - Manufacturing method of photosensitive structure - Google Patents
Manufacturing method of photosensitive structure Download PDFInfo
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- CN102420234B CN102420234B CN201010299874.3A CN201010299874A CN102420234B CN 102420234 B CN102420234 B CN 102420234B CN 201010299874 A CN201010299874 A CN 201010299874A CN 102420234 B CN102420234 B CN 102420234B
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Abstract
The invention discloses a manufacturing method of a photosensitive structure. The manufacturing method provided by the invention comprises the following steps of: (a) forming a circuit layer on the upper surface of a first substrate, wherein the first substrate comprises at least one light sensing subassembly and the circuit layer comprises at least one subassembly structure and at least one release characteristic structure; the release characteristic structure is formed by using metal materials and is formed on parts of the light sensing subassembly and the subassembly structure; (b) covering a first light filtering layer on the partial area of the circuit layer; and (c) removing the release characteristic structure with a wet etching process.
Description
Technical field
The invention relates to a kind of manufacture method of photosensitive circuit, and relate to a kind of manufacture method of photosensitive structure especially.
Background technology
Semiconductor technology is when electronic device applications is more and more wide, and being integrated on same chip by various different assembly, has been main trend.Such as optical sensing subassembly, driving component circuit, micro-structural etc., all after separately carrying out light sensing driving component technique and micro-structural technique, can be integrated on same base material.Manufacture method so is also called system in package (System-in-Package; SIP).
Another kind of already known processes is after formation optical sensing subassembly and driving component circuit, carry out the technique of micro-structural again, carry out the metallization process of driving component circuit again and complete the system of wafer level (wafer level), and after wafer is cut into chip, carry out the manufacture having encapsulated chip.In microfabrication process, the plasma etching mode of reactive ion etching (RIE) is usually adopted to be formed in micro-structural, moveable component or part.But the profile (profile) of the micro-structural that aforesaid way is formed is unsatisfactory.Further, reactive ion etching equipment needed thereby is expensive.In addition, after micro-structural is formed, before carrying out chip package, the particulate in environment or pollutant may fall in micro-structural, make it operate.
Therefore, how designing the manufacture method of a new photosensitive structure, to overcome above-mentioned disappearance, is an industry problem demanding prompt solution for this reason.
Summary of the invention
Therefore, the object of the present invention is to provide a kind of manufacture method of photosensitive structure, overcome the defect of prior art.
One embodiment of the present invention is in the manufacture method providing a kind of photosensitive structure, comprise the following step: (a) forms circuit layer in the upper surface of first substrate, wherein first substrate comprises at least one optical sensing subassembly, circuit layer comprises at least one modular construction and at least one release characteristic structure, and release characteristic structure is formed by metal material, and be formed on optical sensing subassembly partly and modular construction; B () covers the first filter layer on the subregion of circuit layer; And (c) removes release characteristic structure by wet etching process.
According to one embodiment of the invention, the step wherein forming circuit layer comprises formation CMOS (Complementary Metal Oxide Semiconductor) assembly and/or two-carrier CMOS (Complementary Metal Oxide Semiconductor) assembly.Comprise when wherein forming CMOS (Complementary Metal Oxide Semiconductor) assembly and/or two-carrier CMOS (Complementary Metal Oxide Semiconductor) assembly and form release characteristic structure.
According to another embodiment of the present invention, also comprise in step (a) and form protective layer on circuit layer, wherein protective layer does not cover release characteristic structure.Resistant layer is formed on the first filter layer up-protective layer front also comprising in step (c).Configuration second substrate is also comprised above circuit layer and on the first filter layer after step (c).Wherein second substrate is glass substrate or silicon substrate, and has the thickness for about 50 μm to about 500 μm.Second substrate comprises the second filter layer, to be placed on the subregion of circuit layer and the first filter layer.
According to further embodiment of this invention, wherein release characteristic structure to be formed on modular construction and around peripheral part of modular construction, to run through circuit layer, after removing release characteristic structure by wet etching process, also comprise: the upper surface exposing first substrate also comprises a step after the upper surface exposing first substrate: the part of the upper surface of anisotropic etching first substrate.Also the following step is comprised: (d) forms hole in the lower surface of first substrate, to expose the circuit layer below corresponding to connection gasket after step (c); E () filled high polymer material is in hole; And (f) removes first substrate corresponding to the part under micro electromechanical structure, to discharge micro electromechanical structure.In step (e) afterwards and step (d) is front also comprises a step: the lower surface of grinding first substrate, to reduce the thickness of first substrate.
According to yet another embodiment of the invention, wherein release characteristic structure to be formed on modular construction or optical sensing subassembly and to penetrate a degree of depth of circuit layer, after removing release characteristic structure by wet etching process, also comprises: the part exposing the corresponding degree of depth of circuit layer to the open air.
According to the embodiment that the present invention has more, wherein modular construction is essentially micro photo-electro-mechanical structure.
According to the embodiment that the present invention has again, the step wherein forming protective layer comprises formation oxide skin(coating).Wet etching process uses the etchant comprising sulfuric acid and hydrogen peroxide.
According to one embodiment of the invention, anisotropic etching comprises dark formula reactive ion etch steps.The step of the part of the upper surface of anisotropic etching first substrate, comprises and form depressed part in first substrate, and the degree of depth of depressed part is about 5 μm to about 60 μm.
According to one embodiment of the invention, wherein anisotropic etching comprises a reactive ion etch steps.
According to another embodiment of the present invention, wherein anisotropic etching comprises a reactive ion etch steps and a dark formula reactive ion etch steps.
According to further embodiment of this invention, after step (f), also comprise the following step: (g) forms the 3rd substrate under first substrate; H () forms connecting hole, to run through the 3rd substrate, macromolecular material and circuit layer, to expose connection gasket by connecting hole; I () forms conductive layer on the sidewall of connecting hole, to be connected with connection gasket; And (j) forms bonding conductor projection on conductive layer.Wherein connection gasket is electrically connected at modular construction, is connected by connection gasket, conductive layer and bonding conductor projection to make modular construction with external circuit.Connection gasket also can be electrically connected at CMOS (Complementary Metal Oxide Semiconductor) assembly and/or two-carrier CMOS (Complementary Metal Oxide Semiconductor) assembly, is connected by connection gasket, conductive layer and bonding conductor projection to make CMOS (Complementary Metal Oxide Semiconductor) assembly and/or two-carrier CMOS (Complementary Metal Oxide Semiconductor) assembly with external circuit.
Application the invention has the advantages that the manufacture method by integrated photosensitive structure, can complete assembly dissimilar in photosensitive structure, and reach above-mentioned object easily in same technique.
Accompanying drawing explanation
For above and other objects of the present invention, feature, advantage and embodiment can be become apparent, appended the description of the drawings is as follows:
Figure 1A and Figure 1B is in one embodiment of the invention, the flow chart of the manufacture method of photosensitive structure;
Fig. 2 A to Fig. 2 J is in the manufacture method in Figure 1A and Figure 1B, the generalized section of each operation stage;
Fig. 2 K is in another embodiment of the present invention, is formed with the schematic diagram of the photosensitive structure of suspension structure;
Fig. 3 is in another embodiment of the present invention, the flow chart of the manufacture method of photosensitive structure; And
Fig. 4 A to Fig. 4 C is in the manufacture method of Fig. 3, the generalized section of each operation stage.
[primary clustering symbol description]
101-109: step 200: circuit layer
201: metal level 202: modular construction
203: connection gasket 204: release characteristic structure
204a: contact 205: dielectric material
206: dielectric materials layer 207: the first filter layer
208: CMOS (Complementary Metal Oxide Semiconductor) assembly 209: lower surface
210: first substrate 212: upper surface
214a-214d: optical sensing subassembly 216: lower surface
230: protective layer 232: protective layer
240: depressed part 250: second substrate
252: adhesion coating 254: the second filter layer
260: hole 262: sidewall
264: macromolecular material 301-304: step
400: the three substrates 402: connecting hole
404: conductive layer 406: lower surface
408: bonding conductor projection
Embodiment
Referring to Figure 1A and Fig. 2 A to Fig. 2 J.Figure 1A is in one embodiment of the invention, the flow chart of the manufacture method of photosensitive structure.Fig. 2 A to Fig. 2 J is in one embodiment of the invention, the generalized section of each operation stage.The manufacture method of photosensitive structure comprises the following steps that (should be appreciated that, step mentioned in the present embodiment, except chatting its order person bright especially, all can adjust its tandem according to actual needs, even can perform simultaneously or partly simultaneously.)
Carry out step 101, form circuit layer 200 in the upper surface of first substrate 210.Please refer to Fig. 2 A, circuit layer 200 is formed at the upper surface 212 of first substrate 210.In one embodiment, first substrate 210 can be silicon wafer, and comprises optical sensing subassembly 214a, 214b, 214c and 214d.Circuit layer 200 comprises modular construction 202, release characteristic structure 204 and dielectric materials layer 206.Release characteristic structure 204 is made by metal material.In fact, in metal material, also can comprise dielectric layer material, this dielectric layer material can be removed when follow-up wet etching simultaneously.Release characteristic structure 204 can be formed on optical sensing subassembly partly and modular construction 202.
In the present embodiment, release characteristic structure 204 is formed on optical sensing subassembly 214a, 214d, and a part for periphery around modular construction 202, to run through circuit layer 200.Wherein, the release characteristic structure 204 be formed on optical sensing subassembly 214a runs through the darker degree of depth of circuit layer 200, to be formed at the more short-range top of optical sensing subassembly 214a mono-.The release characteristic structure 204 be formed on optical sensing subassembly 214d then only runs through the more shallow degree of depth of circuit layer 200 1, and has longer distance between optical sensing subassembly 214d, and the circuit layer 200 in this distance also includes the metal level 201 of shape.
In one embodiment, the step forming circuit layer 200 comprises formation one CMOS (Complementary Metal Oxide Semiconductor) (CMOS) assembly 208.In the standard technology of known CMOS (Complementary Metal Oxide Semiconductor) assembly 208, the metallization process in 4 roads and the polycide process (2P4M technique) in 2 roads can be comprised, also can comprise the metallization process in 5 roads and the polycide process (1P5M technique) in 1 road.Therefore, in one embodiment, in the process forming CMOS (Complementary Metal Oxide Semiconductor) assembly 208, by the light shield suitably designed, form release characteristic structure 204 simultaneously.Below only with assemblies such as CMOS (Complementary Metal Oxide Semiconductor) for illustrating, and be not used to limit the present invention, the assemblies such as other such as two-carrier CMOS (Complementary Metal Oxide Semiconductor) (BiCMOS), or the technique of other type and structure are also applicable to the present invention, be not limited to technique and the structure of CMOS (Complementary Metal Oxide Semiconductor) or two-carrier CMOS (Complementary Metal Oxide Semiconductor).In addition, the present invention is also not limited to 2P4M technique or 1P5M technique, and other technology mode is also applicable to the present invention.Such as, when forming the through hole of CMOS (Complementary Metal Oxide Semiconductor) assembly 208, the dielectric material being preset as release characteristic structure 204 position can be removed in dielectric layer simultaneously.Then, when forming the metal level of CMOS (Complementary Metal Oxide Semiconductor) assembly 208, metal material can be filled to above-mentioned predeterminated position simultaneously.Therefore, when forming CMOS (Complementary Metal Oxide Semiconductor) assembly 208, progressively release characteristic structure 204 can be formed.In another embodiment, the metal level forming CMOS (Complementary Metal Oxide Semiconductor) assembly 208 is aluminium, and the metal being filled in through hole in CMOS (Complementary Metal Oxide Semiconductor) assembly 208 is tungsten.Therefore, the release characteristic structure 204 be made up of aluminium and tungsten can be formed.In another embodiment, connection gasket 203 is comprised at circuit layer 200.Connection gasket 203 made by metal, and is electrically connected CMOS (Complementary Metal Oxide Semiconductor) assembly 208.
In one embodiment, in the process forming CMOS (Complementary Metal Oxide Semiconductor) assembly 208, form modular construction 202 simultaneously.In the present embodiment, modular construction 202 is positioned on optical sensing subassembly 214c.In other embodiments, modular construction 202 can not need to be formed at above optical sensing subassembly, and can independently be formed in circuit layer 200.The part-structure of modular construction 202 can be formed in the process forming CMOS (Complementary Metal Oxide Semiconductor) assembly 208 simultaneously, and the conductive metal wiring in other such as micro-structural also can be formed in the process forming CMOS (Complementary Metal Oxide Semiconductor) assembly 208.Therefore, the part-structure of modular construction 202 can comprise the metal level (such as aluminium and/or tungsten) identical with CMOS (Complementary Metal Oxide Semiconductor) assembly 208.Further, after the metal level between part-structure can be electrically connected mutually, then be connected in circuit layer 200 semiconductor circuit.
In the present embodiment, can be learnt by Fig. 2 A, circuit layer 200 comprises M1, M2, M3 and M4 tetra-metal levels and contact (contact), V1, V2, V3 tri-through holes (via).Wherein, there are the metal level 201 of shape, modular construction 202, connection gasket 203, release characteristic structure 204 and CMOS (Complementary Metal Oxide Semiconductor) assembly 208 respectively to have part-structure and correspond to the metal level of above-mentioned M1-M4 and the through hole of V1-V3.For example, CMOS (Complementary Metal Oxide Semiconductor) assembly 208 corresponds to the metal level of M1-M3 and the through hole of V1-V2.204, release characteristic structure around modular construction 202 has contact 204a and connects with first substrate 210.
In another embodiment, as shown in Figure 2 A, modular construction 202 comprises the dielectric material 205 (such as silica and/or silicon nitride) identical with CMOS (Complementary Metal Oxide Semiconductor) assembly 208, and dielectric material 205 outer surfaces at modular construction 202.The thickness of dielectric material 205 can be about 0.1 micron to about 3 microns, such as, be about 1 micron, 2 microns or 3 microns.
In one embodiment, form the step of circuit layer 200 also to comprise and form protective layer 230 simultaneously on circuit layer 200.As shown in Figure 2 A, protective layer 230 is formed at above circuit layer 200.In one embodiment, protective layer 230 can cover connection gasket 203.But protective layer 230 does not cover release characteristic structure 204.In other words, release characteristic structure 204 is exposed to external environment, to carry out subsequent step.
In one embodiment, protective layer 230 can be such as silicon oxide layer or silicon nitride layer, or protective layer 230 can be the sandwich construction comprising silica and silicon nitride.Protective layer 230 can utilize known chemical vapour deposition technique or other technology to be formed.
In a step 102, the first filter layer 207 is covered on the subregion of circuit layer 200.As shown in Figure 2 B; in the present embodiment; first filter layer 207 is formed and is covered on the protective layer 230 on the circuit layer 200 of corresponding optical sensing subassembly 214b, and is formed and be covered on the circuit layer 200 of corresponding modular construction 202 (comprising optical sensing subassembly 214c).First filter layer 207 can provide the function of an optical filtering, make light when through the first filter layer 207, only have the light of subband to pass through, the optical sensing subassembly 214b covered to make it, modular construction 202 and optical sensing subassembly 214c can perform specific function for the light of these wave bands.It is noted that in different regions, can have different demands in response to assembly corresponding below it institute, formation has the first filter layer 207 of different light-filtering characteristics.For example, being formed at the first filter layer 207 on optical sensing subassembly 214b can in order to carry out filtering only to allow green glow to pass through, and the first filter layer 207 be formed on modular construction 202 can in order to carry out filtering only to allow ruddiness to pass through.
In one embodiment; when forming the first filter layer 207, resistant layer 232 can be formed simultaneously, except can provide the top of circuit layer 200 further protect with against corrosion except; also when the material of the first filter layer 207 does not have corrosion stability, the effect that the first filter layer 207 is protected can be provided.Resistant layer 232 can be identical material with protective layer 230 in fact, as oxide layer (oxide).And in another embodiment, when the material of the first filter layer 207 itself is tool corrosion stability, can not need to form resistant layer 232 thereon.
In step 103, remove release characteristic structure 204 by wet etching process, to expose first substrate 210.As shown in Figure 2 C, by wet etching process, the release characteristic structure 204 in Fig. 2 B is removed.In the present embodiment, release characteristic structure 204 above optical sensing subassembly 214a and optical sensing subassembly 214d to be formed on optical sensing subassembly 214a and optical sensing subassembly 214d and to penetrate the degree of depth of a correspondence of circuit layer 200, therefore, after removing release characteristic structure 204 by wet etching process, the part of circuit layer 200 this degree of depth corresponding is exposed.
And in the release characteristic structure 204 of modular construction 202 periphery, then expose first substrate 210 after its removal.After removing release characteristic structure 204, between the other parts of modular construction 202 itself and modular construction 202 and circuit layer 200, form a gap d.In one embodiment, the width of gap d is about 1 micron to about 4 microns, such as, can be 2 microns or 3 microns.At step 104, the etchant adopted has high etching selectivity for metal material and oxide material (or nitride), such as, higher than 15: 1 or higher than 20: 1, such as, can be about 30: 1 or higher.Therefore, when removing release characteristic structure 204, preferably side wall profile can be obtained.In one embodiment, release characteristic structure 204 is formed by aluminium and tungsten, and protective layer 230 is silicon oxide layer.Wet etching process use one comprises the etchant of sulfuric acid and hydrogen peroxide.In a specific embodiment, the weight ratio of sulfuric acid and hydrogen peroxide is about 2: 1, when etching the metal material of release characteristic structure 204, can obtain satisfied side wall profile.
In known technology, usually adopt reactive ion etching (reactive ion etching; RIE) dielectric material (such as silica or silicon nitride) in circuit layer is removed.But use reactive ion etching, the etching side wall profile formed is unsatisfactory.And reactive ion etching is required obtains apparatus expensive.Therefore, according to one embodiment of the invention, be insert metal material in advance in the region that removes, form release characteristic structure 204.And then utilize wet etching release characteristic structure 204 to be removed.By using the etchant with high etching selectivity, better etching side wall profile (compared to reactive ion etching) can be reached.Moreover release characteristic structure 204 can be formed while formation circuit layer 200, need not additional technique.So the present invention has the advantage of low process costs, and better etching outline can be reached.
At step 104, the part of first substrate 210 exposed of anisotropic etching.As shown in Figure 2 E (part of Fig. 2 D describes in rear), a part for the first substrate 210 exposed in step 103 is removed by anisotropic etching.In one embodiment, anisotropic etching comprises a dark formula reactive ion etching (Deep Ion reactive Etching; DRIE) step.In another embodiment, the step of anisotropic etching first substrate 210 comprises formation one depressed part 240 in first substrate 210, and the degree of depth of depressed part 240 is about 10 microns to about 60 microns, such as, be about 20 microns, 30 microns, 40 microns or 50 microns.In anisotropic etching process; protective layer 230 (such as silica or silicon nitride etc.) can protect metal level (metal level in such as connection gasket 203 and circuit layer 200) under it or the first filter layer 207, avoids destroying metal level in anisotropic etching process due electrically or the function of the first filter layer 207.
Step 103 remove release characteristic structure 204 after, in some cases, the upper surface (i.e. the position of gap d) of the first substrate 210 exposed may form oxide, such as silica.Therefore, in an embodiment, before carry out step 104, a RIE technique can be carried out non-essential, first to form the structure of Fig. 2 D, then carry out the structure that aforesaid dark formula reactive ion etching forms Fig. 2 E.By RIE technique, the oxide on first substrate 210 surface in gap d can be removed, and the groove that exposes owing to removing release characteristic structure 204 of part, will comparatively in Fig. 2 C, further for RIE technique etches darker.
Then please refer to Figure 1B.Flow chart after the A point that the step 104 that Figure 1B is the manufacture method of the photosensitive structure of the Figure 1A that continues connects.
In step 105 after step 104, configure a second substrate 250 above circuit layer 200.As shown in Figure 2 F, above circuit layer 200, second substrate 250 is configured.Second substrate 250 can cover the top of modular construction 202, to protect modular construction 202, and avoids particulate to fall to depressed part 240.In one embodiment, second substrate 250 can be such as glass substrate or a silicon substrate, and the thickness of glass substrate or silicon substrate is about 50 microns to about 500 microns, such as, be 100 microns, 200,300 microns or 400 microns.In another embodiment, between second substrate 250 and protective layer 230, configure adhesion coating 252, in order to fixing second substrate 250.In fact, adhesion coating 252, due to the sectional view that Fig. 2 F is part, therefore only shows the adhesion coating 252 of side round second substrate 250 and circuit layer 200 around.
In another embodiment, second substrate 250 in fact also comprises the second filter layer 254.As shown in Figure 2 F, in the present embodiment, the second filter layer 254 is formed at the top of corresponding optical sensing subassembly 214a, 214b and 214d.Second filter layer 254 can be formed at the either side of second substrate 250, and can overlap.The function of optical filtering also can be provided as the first filter layer 207, second filter layer 254, make light when through the second filter layer 254, only have the light of subband to pass through.Be coated with the first filter layer 207 part, as optical sensing subassembly 214b also correspondingly again can form the second filter layer 254 above, to strengthen the effect filtered, or the light of extra other wave band of filtering again.As the first filter layer 207, the second filter layer 254 formed in corresponding zones of different, can have different light-filtering characteristics in response to different demands.
After step 105, can carry out step 106 non-essential.In step 106, the lower surface 216 of grinding first substrate 210, to reduce the thickness of first substrate 210, as shown in Figure 2 G.Such as, thickness after first substrate 210 grinds can be about 50 microns to micron 300 microns.
In step 107, form a hole 260 in the lower surface of first substrate 210, to expose the circuit layer 200 be positioned at below connection gasket 203, as illustrated in figure 2h.The method forming hole 260 at first substrate 210 can be dry ecthing method, wet etch method, machine drilling or laser drill.In one embodiment, hole 260 has the sidewall 262 of an inclination.Sidewall 262 forms an angle theta being greater than 90 degree with the lower surface 209 of circuit layer 200, such as, can be about 100 degree, 110 degree, 120 degree, 140 degree or 150 degree.
In step 108, a macromolecular material is filled in hole, as shown in figure 2i.Macromolecular material 264 is filled in hole 260.In one embodiment, macromolecular material 264 can be epoxy resin (epoxy).In another embodiment, macromolecular material 264 surface of filling is substantially flush with the lower surface 216 of first substrate 210.
In step 109, remove the part of a lower surface 216 of first substrate 210, with releasing unit structure 202.In the present embodiment, modular construction 202 becomes a micro photo-electro-mechanical structure by the auxiliary of optical sensing subassembly 214c.And in another embodiment, the lower optical sensing subassembly 214c that can not arrange of modular construction 202, and be only a micro electromechanical structure." releasing unit structure " instigates above-mentioned micro electromechanical structure or micro photo-electro-mechanical structure to produce to have relatively-movable structure or parts.In one embodiment, anisotropic etching is utilized to remove a part for the lower surface 216 of first substrate 210, with " release micro electromechanical structure ", as shown in fig. 2j.In another embodiment, removed a part for the first substrate 210 be positioned at below depressed part 240 and modular construction 202 by DRIE technique, make modular construction 202 can produce displacement relative to first substrate 210 or second substrate 250.In another embodiment, modular construction 202 by such as elastic supporting member for supporting optical member (not illustrating) structure and be connected to the other parts of circuit layer 200.Therefore, when modular construction 202 is by external force, small relative displacement can be produced.
It is noted that in one embodiment, when forming circuit layer 200, also can form the optical sensing subassembly structure 202 being only a suspension structure, and covering without metal level with optical sensing subassembly superstructure, as shown in figure 2k.
The manufacture method of above-mentioned photosensitive structure, can form assemblies different in photosensitive structure in same technique, and by release characteristic structure, makes the assembly in photosensitive structure have preferably side wall profile.Further, by comprising the setting of the second substrate of the second filter layer, not only can reach and preventing assembly by effect of particle contamination, more can outside the first filter layer on accentuator layer, better filter effect.
In other embodiments, after completing steps 101 to step 109, can continue and carry out step 301 to step 304.Refer to Fig. 3, it illustrates the manufacturing flow chart after completing steps 101 to step 109.Fig. 4 A to Fig. 4 C is the generalized section illustrating each operation stage in above-mentioned steps 301 to step 304.
In step 301, one the 3rd substrate 400 is configured below first substrate 210, as shown in Figure 4 A.In one embodiment, the 3rd substrate 400 can be same material with second substrate 250, such as silicon substrate or glass substrate.Second substrate 250 and the 3rd substrate 400 form the enclosure space of an encirclement modular construction 202.Therefore, second substrate 250 and the 3rd substrate 400 can protect modular construction 202 to avoid being undermined and prevent particulate from entering, and guarantee modular construction 202 normal operation.
In step 302, connecting hole 402 is formed by the side of the 3rd substrate 400, as shown in Figure 4 B.Connecting hole 402 is roughly positioned at filled high polymer material 264 part, and runs through the 3rd substrate 400, macromolecular material 264 and circuit layer 200 and expose connection gasket 203.The method forming connecting hole 402 can be machine drilling or Laser drill etc.In one embodiment, connection gasket 203 is electrically connected CMOS (Complementary Metal Oxide Semiconductor) assembly 208.In another embodiment, connection gasket 203 electrical connection component structure 202.
In step 303, form conductive layer 404 in connecting hole 402, as shown in Figure 4 C.Conductive layer 404 is connected with connection gasket 203, enters Circuits System in circuit layer 200 in order to input or output electronic signal.Generally known sputtering process can be utilized to form conductive layer 404, and the material of conductive layer 404 can be such as copper, aluminium, silver or tungsten.In one embodiment, conductive layer 404 is extended to the lower surface 406 of the 3rd substrate 400 by connecting hole 402.
In step 304, form bonding conductor projection 408 on conductive layer 404.Please again see Fig. 4 C, in one embodiment, bonding conductor projection 408 is formed in the conductive layer 404 be positioned on the 3rd substrate 400, and therefore electronic signal can input or output modular construction 202 via bonding conductor projection 408.In one embodiment, electronic signal also can input or output other assembly in circuit layer 200 via bonding conductor projection 408, as CMOS (Complementary Metal Oxide Semiconductor) assembly 208 and/or two-carrier CMOS (Complementary Metal Oxide Semiconductor) assembly etc.Any known method can be used to form bonding conductor projection 408, and such as screen printing process or cloth plant tin ball mode etc.Modular construction 202 can be connected to other external circuit (not illustrating) via bonding conductor projection 408.Completing steps 304, namely completes the micro electromechanical structure encapsulation of wafer level.
In the present embodiment, the manufacture method of photosensitive structure is further reached by the setting of the 3rd substrate and prevents the assembly in photosensitive structure by effect of particle contamination in same technique, and assembly can be made to be encapsulated by the micro electromechanical structure of wafer level, can carry out being electrically connected and linking up with external circuit.
Although the present invention discloses as above with execution mode; so itself and be not used to limit the present invention; anyly be familiar with this those skilled in the art; without departing from the spirit and scope of the present invention; when being used for a variety of modifications and variations, the scope that therefore protection scope of the present invention ought define depending on appending claims is as the criterion.
Claims (11)
1. a manufacture method for photosensitive structure, is characterized in that, comprises the following step:
A () forms a circuit layer in a upper surface of a first substrate, wherein this first substrate comprises at least one optical sensing subassembly, this circuit layer comprises at least one modular construction, a connection gasket, and at least one release characteristic structure, and this release characteristic structure is formed by a metal material, and be formed on this optical sensing subassembly partly and this modular construction, wherein this modular construction is a micro electromechanical structure, and form a protective layer on this circuit layer, wherein this protective layer does not cover this release characteristic structure;
B () covers one first filter layer on the subregion of this circuit layer;
C () removes this release characteristic structure by a wet etching process;
D () forms a hole in a lower surface of this first substrate, to expose corresponding to this circuit layer below this connection gasket;
E () fills a macromolecular material in this hole;
F () removes this first substrate corresponding to the part under this micro electromechanical structure, to discharge this micro electromechanical structure;
G () forms one the 3rd substrate under this first substrate;
H () forms a connecting hole, to run through the 3rd substrate, this macromolecular material and this circuit layer, to expose this connection gasket by this connecting hole;
I () forms a conductive layer on a sidewall of this connecting hole, to be connected with this connection gasket; And
J () forms a bonding conductor projection on this conductive layer, wherein this connection gasket is electrically connected at this modular construction, is connected by this connection gasket, this conductive layer and this bonding conductor projection to make this modular construction with an external circuit.
2. the manufacture method of photosensitive structure according to claim 1, it is characterized in that, the step forming this circuit layer comprises formation one CMOS (Complementary Metal Oxide Semiconductor) assembly and/or a pair of BiCMOS thing semiconductor subassembly, and comprises this release characteristic structure of formation when forming this CMOS (Complementary Metal Oxide Semiconductor) assembly and/or this two-carrier CMOS (Complementary Metal Oxide Semiconductor) assembly.
3. the manufacture method of photosensitive structure according to claim 1, it is characterized in that, configuration one second substrate is also comprised above this circuit layer and on this first filter layer after step (c), wherein this second substrate is a glass substrate or a silicon substrate, and to have be the thickness of 50 μm to 500 μm.
4. the manufacture method of photosensitive structure according to claim 3, is characterized in that, this second substrate comprises one second filter layer, to be placed on the subregion of this circuit layer and this first filter layer.
5. the manufacture method of photosensitive structure according to claim 1, it is characterized in that, this release characteristic structure to be formed on this modular construction and around peripheral part of this modular construction, to run through this circuit layer, after removing this release characteristic structure by this wet etching process, also comprise:
Expose this upper surface of this first substrate; And
A part for this upper surface of this first substrate of anisotropic etching.
6. the manufacture method of photosensitive structure according to claim 1, is characterized in that, also comprises a step step (d) is front:
Grind this lower surface of this first substrate, to reduce the thickness of this first substrate.
7. the manufacture method of photosensitive structure according to claim 1, it is characterized in that, this release characteristic structure to be formed on this modular construction or this optical sensing subassembly and to penetrate a degree of depth of this circuit layer, after removing this release characteristic structure by this wet etching process, also comprises:
Expose this circuit layer to the open air to should the part of the degree of depth.
8. the manufacture method of photosensitive structure according to claim 1, is characterized in that, this modular construction is a micro photo-electro-mechanical structure.
9. the manufacture method of photosensitive structure according to claim 5, is characterized in that, this anisotropic etching comprises a reactive ion etch steps and/or a dark formula reactive ion etch steps.
10. the manufacture method of photosensitive structure according to claim 5, it is characterized in that, the step of this part of this upper surface of this this first substrate of anisotropic etching, comprises formation one depressed part in this first substrate, and the degree of depth of this depressed part is 5 μm to 60 μm.
The manufacture method of 11. photosensitive structures according to claim 1, it is characterized in that, the step forming this circuit layer comprises formation one CMOS (Complementary Metal Oxide Semiconductor) assembly and/or a pair of BiCMOS thing semiconductor subassembly, this connection gasket is electrically connected at this CMOS (Complementary Metal Oxide Semiconductor) assembly and/or this two-carrier CMOS (Complementary Metal Oxide Semiconductor) assembly, to make this CMOS (Complementary Metal Oxide Semiconductor) assembly and/or this two-carrier CMOS (Complementary Metal Oxide Semiconductor) assembly by this connection gasket, this conductive layer and this bonding conductor projection are connected with an external circuit.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201010299874.3A CN102420234B (en) | 2010-09-28 | 2010-09-28 | Manufacturing method of photosensitive structure |
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| CN201010299874.3A CN102420234B (en) | 2010-09-28 | 2010-09-28 | Manufacturing method of photosensitive structure |
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| CN102420234A CN102420234A (en) | 2012-04-18 |
| CN102420234B true CN102420234B (en) | 2015-04-08 |
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| CN201010299874.3A Expired - Fee Related CN102420234B (en) | 2010-09-28 | 2010-09-28 | Manufacturing method of photosensitive structure |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1870281A (en) * | 2005-05-27 | 2006-11-29 | 台湾积体电路制造股份有限公司 | Photosensitive measuring integrated circuit element |
| CN101312161A (en) * | 2007-05-21 | 2008-11-26 | 国际商业机器公司 | Electronic structure and manufacturing method |
| CN101468784A (en) * | 2007-12-25 | 2009-07-01 | 微智半导体股份有限公司 | Semiconductor miniature suspension structure and method of producing the same |
| CN101630657A (en) * | 2008-07-15 | 2010-01-20 | 台湾积体电路制造股份有限公司 | Integrated circuit chip and manufacturing method for integrated circuit device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US6940142B2 (en) * | 2001-07-02 | 2005-09-06 | Xerox Corporation | Low data line capacitance image sensor array using air-gap metal crossover |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1870281A (en) * | 2005-05-27 | 2006-11-29 | 台湾积体电路制造股份有限公司 | Photosensitive measuring integrated circuit element |
| CN101312161A (en) * | 2007-05-21 | 2008-11-26 | 国际商业机器公司 | Electronic structure and manufacturing method |
| CN101468784A (en) * | 2007-12-25 | 2009-07-01 | 微智半导体股份有限公司 | Semiconductor miniature suspension structure and method of producing the same |
| CN101630657A (en) * | 2008-07-15 | 2010-01-20 | 台湾积体电路制造股份有限公司 | Integrated circuit chip and manufacturing method for integrated circuit device |
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