CN102420209A - Structure and method for increasing density of capacitors - Google Patents
Structure and method for increasing density of capacitors Download PDFInfo
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- CN102420209A CN102420209A CN2011101638459A CN201110163845A CN102420209A CN 102420209 A CN102420209 A CN 102420209A CN 2011101638459 A CN2011101638459 A CN 2011101638459A CN 201110163845 A CN201110163845 A CN 201110163845A CN 102420209 A CN102420209 A CN 102420209A
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Abstract
The invention generally relates to the field of manufacturing of semiconductor integrated circuits, in particular to a structure and method for increasing the density of capacitors. According to the structure for increasing the density of the capacitors and a manufacturing method of the structure, on the basis of a metal-insulator-metal (MIM) structure adopting a traditional process, the density of the capacitors is increased by continuously increasing an insulating layer and a metal layer, that is to say, two parallel capacitors are formed by overlapping the capacitors, thereby the density of the capacitors is greatly increased.
Description
Technical field
The present invention relates generally to semiconductor integrated circuit manufacturing field, more precisely, the present invention relates to a kind of structure and method that improves capacitance density.
Background technology
Along with the continuous progress of semiconductor integrated circuit manufacturing technology, performance also is accompanied by device miniaturization, microminiaturized process when constantly promoting; At more and more advanced processing procedure, require in as far as possible little zone, to realize device as much as possible, to obtain high as far as possible performance.
Capacitor is the important composition unit in the integrated circuit; Extensively apply in the chips such as memory, microwave, radio frequency, smart card, high pressure and filtering; Minimizing along with chip size; And performance is to the demand of big electric capacity, and how under limited area, obtaining highdensity electric capacity becomes a problem that haves a great attraction.
As shown in Figure 1, the capacity plate antenna model of the capacitance structure single-layer capacitor metal 11-insulating barrier 12-metal 13 that at present the most frequently used traditional handicraft forms; For example at present typical capacitor arrangement is exactly the sandwich structure by copper metal layer-the silicon nitride medium layer-the Tan metal level constitutes; Wherein the selection of metal level has multiple material; Like copper, aluminium, tantalum, titanium and alloy thereof etc., and dielectric layer also has the material of multiple differing dielectric constant optional.
In order to obtain higher unit-area capacitance density; Usually the method that adopts has three kinds; But its certain limitation is all arranged, and wherein a kind of is to adopt more that the dielectric material of high-k improves capacitance density, and dielectric material at present available in this kind method is limited; Can combine still less with existing technology, the room for promotion of promptly using high dielectric constant material instead is limited; The 2nd, reduce medium thickness, but thickness of dielectric layers reduces, then puncture voltage can reduce, so this method is of limited application; The 3rd, improve electric capacity through increasing area, such as utilizing the pattern that rises and falls to increase the capacitor plate area on the unit are, still this technology has reduced mismatch parameter, thereby has reduced the electric property of single-layer capacitor metal-insulator-metal structure.
Summary of the invention
In view of the above problems, the invention provides a kind of structure that improves capacitance density, wherein, comprising:
One substrate, said substrate are provided with substrate metal copper and following insulating barrier; One lower metal layer is arranged on the said down insulating barrier, and insulating barrier is arranged on the said lower metal layer in one, in one metal level be arranged on said on the insulating barrier, on one insulating barrier be arranged on said on the metal level, metal level is arranged on said going up on the insulating barrier on one;
Substrate terminal, the first terminal, second terminal and the 3rd terminal are connected with base metal copper, said lower metal layer, said middle metal level and the said metal level of going up through interconnection line respectively successively; The substrate terminal is connected with the 3rd terminal; The first terminal is connected with second terminal, forms shunt capacitance.
The structure of above-mentioned raising capacitance density, wherein, said insulating barrier down, said lower metal layer, said middle metal level and the said metal level length that goes up reduce to form ladder-type structure successively.
The structure of above-mentioned raising capacitance density, wherein, said middle insulating barrier is identical with said middle metal level length, and said last insulating barrier is identical with said last metal level length.
The structure of above-mentioned raising capacitance density, wherein, said the 3rd terminal is connected with the said metal level of going up through two interconnection lines.
The structure of above-mentioned raising capacitance density, wherein, the material of said metal level is Ti, TiNTa compound, TaN, AlCu alloy or Cu metal, its thickness is 500A ~ 2000A.
The structure of above-mentioned raising capacitance density, wherein, the material of said insulating barrier is SiO2, SiN, Ta2O5, BaTiO3, HfO2, ZrO2 or Al2O3, its thickness are 150A ~ 600A.
The structure of above-mentioned raising capacitance density wherein, comprises that also one covers the etching barrier layer of above-mentioned insulating barrier and metal level.
The present invention also provides a kind of method that improves capacitance density, wherein, may further comprise the steps:
Utilize metal level chemical mechanical milling tech preparation one to be provided with the substrate of substrate metal copper; Surface deposition SiN film forms down insulating barrier on it; The metal deposit is said to form lower metal layer on the insulating barrier down; Deposition insulating material forms insulating barrier in said lower metal layer, repeats depositing metal material and insulating material successively, with metal level, last insulating barrier and last metal level in forming;
Adopt photoetching, etching and photoresistance to remove metal level and last insulating barrier on the technology etching successively, repeat with metal level in the sampling technology etching and middle insulating barrier, lower metal layer and following insulating barrier; After the deposit etching barrier layer covers above-mentioned insulating barrier and metal level; Continuation is with the said metal level of thin film deposition; Utilize photoetching, etching and filling and cmp all to form several through holes in every layer of metal level; And being provided with interconnection line in said through hole, substrate terminal, the first terminal, second terminal and the 3rd terminal are arranged on substrate metal copper, lower metal layer, middle metal level and the last metal level under it through said interconnection line respectively successively; Said substrate terminal is connected with said the 3rd terminal, and said the first terminal is connected with said second terminal, forms shunt capacitance.
The method of above-mentioned raising capacitance density, wherein, said lower metal layer, said middle metal level and the said metal level length that goes up reduce to form ladder-type structure successively.
The method of above-mentioned raising capacitance density, wherein, said down insulating barrier is identical with said lower metal layer length, said in insulating barrier with said in metal level length identical, said upward insulating barrier is with said upward metal level length is identical.
The method of above-mentioned raising capacitance density, wherein, the material of said metal level is Ti, TiNTa compound, TaN, AlCu alloy or Cu metal, its thickness is 500A ~ 2000A.
The method of above-mentioned raising capacitance density, wherein, the material of said insulating barrier is SiO2, SiN, Ta2O5, BaTiO3, HfO2, ZrO2 or Al2O3, its thickness are 150A ~ 600A.
The present invention improves the structure and the manufacturing approach thereof of capacitance density; On the electric capacity basis of metal-insulator-metal (MIM) structure of traditional handicraft; Through continuing increase insulating barrier and metal level to increase capacitance density; Promptly adopt the stack of electric capacity, with form the parallel connection two electric capacity, thereby increased capacitance density greatly.
Those skilled in the art reads the detailed description of following preferred embodiment, and with reference to after the accompanying drawing, of the present invention these are incited somebody to action obvious with otherwise advantage undoubtedly.
Description of drawings
With reference to appended accompanying drawing, to describe embodiments of the invention more fully.Yet appended accompanying drawing only is used for explanation and sets forth, and does not constitute limitation of the scope of the invention.
Fig. 1 is the structural representation of the electric capacity that traditional handicraft is processed in the background technology of the present invention;
Fig. 2 is the structural representation that the present invention improves capacitance density;
Fig. 3-the 7th, the present invention improve the flow chart of the method for capacitance density;
Fig. 8 is the circuit diagram that the present invention improves the structure and the method for capacitance density.
Embodiment
Referring to shown in Figure 2, a kind of structure that improves capacitance density of the present invention wherein, comprising:
One substrate 41 embeds and is provided with substrate copper metal 40; Following insulating barrier 42 is arranged on the substrate 41 and covers base metallic copper 40; Lower metal layer 43 is arranged on down on the insulating barrier 42, and middle insulating barrier 44 is arranged on the lower metal layer 43, and middle metal is arranged on the middle insulating barrier 44 for 45 layers; On the metal level 45, last metal level 47 was arranged on the insulating barrier 46 during last insulating barrier 46 was arranged on; Substrate terminal 50, the first terminal 51, second terminal 52 and the 3rd terminal 53 are connected with base metal copper 40, lower metal layer 43, middle metal level 45 and last metal level 47 through interconnection line 49 respectively successively.
Wherein, middle insulating barrier 44 is identical with middle insulating barrier 45 length, and last insulating barrier 46 is identical with last metal level 47 length; And following insulating barrier 42, lower metal layer 43, middle metal level 45 and last metal level 47 length reduce successively, form ladder-type structure.
Further, the material of above-mentioned metal level is metals such as Ti, TiNTa compound, TaN, AlCu alloy or Cu, and its thickness is set to 500A ~ 2000A; The material of insulating barrier is SiO
2, SiN, Ta
2O
5, BaTiO
3, HfO
2, ZrO
2Or Al
2O
3Deng insulating material, its thickness is set to 150A ~ 600A.
Wherein, etching barrier layer 48 covers above-mentioned insulating barrier and metal level.
The 3rd terminal 51 adopts two interconnection lines to be connected with metal level 47; Substrate terminal 50 is connected with the 3rd terminal 53, and the first terminal 51 is connected with second terminal 52, forms the electric capacity of parallel connection; Be as shown in Figure 8, capacitor C equals capacitor C 1, capacitor C 2 and capacitor C 3 sums.
The above-mentioned condition that is provided with is as a reference, and listed parameters also only is construed as limiting the invention.For example, conditions such as thickness, metal material, insulating material all can be carried out adaptive adjustment.
Shown in Fig. 3-7, a kind of method that improves capacitance density of the present invention wherein, may further comprise the steps:
Utilize the metal level chemical mechanical milling tech to prepare substrate 21; And prepare base metal copper 20 on it; Form down insulating barrier 22 in substrate 21 upper surface deposit SiN films, form lower metal layer 23 under the metal deposit on the insulating barrier 22, deposition insulating material is insulating barrier 24 in lower metal layer 23 forms; Repeat depositing metal material and insulating material successively, with metal level 25, last insulating barrier 26 and last metal level 27 in forming;
Adopt photoetching, etching and photoresistance to remove metal level 27 and last insulating barrier 26 on the technology etching successively, to form the shortest last metal level 27
1The shortest last insulating barrier 26
1, repeat in the above-mentioned same technology etching metal level 25 and middle insulating barrier 24 to form short middle metal level 25
1With short middle insulating barrier 24
1, same etching lower metal layer 23 and following insulating barrier 22 are to form and the lower metal layer 23 of substrate 21 with length
1With following insulating barrier 22
1 Metal level 27 on it
1With last insulating barrier 26
1Length is identical, middle metal level 25
1With middle insulating barrier 24
1Length is identical, with lower metal layer 23
1, down insulating barrier 22 forms the level Four ladder-type structures; Deposit etching barrier layer 28 covers above-mentioned metal level and insulating barriers, continues then with the above-mentioned metal level of thin film deposition, utilizes photoetching, etching and filling and cmp to form 4 groups of through holes, passes the etching barrier layer 28 after the etching respectively
1In metal level 27
1, 25
1, 23
1On substrate copper metal 20, and on every group of through hole, be provided with interconnection line 29, substrate terminal 30, the first terminal 31, second terminal 32 and the 3rd terminal 33 respectively successively through interconnection line 29 be arranged under substrate copper metal 20, metal level 23
1, middle metal level 25
1With last metal level 27
1Connect; Wherein, substrate terminal 30 is connected with the 3rd terminal 33, and the first terminal 31 is connected with second terminal 32; Form the electric capacity of parallel connection; Promptly as shown in Figure 8, the capacitor C that substrate terminal 30 and the 3rd terminal 33 form is the capacitor C 1 of substrate terminal 30 and the first terminal 31 formation, the capacitor C 2 that the first terminal 31 and second terminal 32 form; Capacitor C 3 sums that second terminal 32 and the 3rd terminal 33 form, promptly capacitor C equals capacitor C 1, capacitor C 2 and capacitor C 3 sums.
Wherein, the material of above-mentioned metal level adopts metals such as Ti, TiNTa compound, TaN, AlCu alloy or Cu, and its thickness is 500A ~ 2000A; The material of above-mentioned insulating barrier adopts SiO
2, SiN, Ta
2O
5, BaTiO
3, HfO
2, ZrO
2Or Al
2O
3Deng insulating material, its thickness is 150A ~ 600A.
The structure of raising capacitance density of the present invention and manufacturing approach thereof are on the electric capacity basis of metal-insulator-metal (MIM) structure of traditional handicraft, through continuing to increase insulating barrier and metal level with the increase capacitance density; Promptly adopt the stack of electric capacity, forming two electric capacity of parallel connection, thereby improve the nearly twice of capacitance density; And occupying under the situation that chip area do not have to change; Kept electrology characteristic, the particularly mismatch parameter same with the double layer of metal layer structure, a promptly same block plate is done electrode; Mismatch parameter can be subdued mutually, also with traditional handicraft very strong compatibility is arranged simultaneously.
Through explanation and accompanying drawing, provided the exemplary embodiments of the ad hoc structure of embodiment, for example, this case is to set forth with the stack of two electric capacity, based on the present invention's spirit, electric capacity stack number also can be done other conversion.Although foregoing invention has proposed existing preferred embodiment, yet these contents are not as limitation.
For a person skilled in the art, read above-mentioned explanation after, various variations and revise undoubtedly will be obvious.Therefore, appending claims should be regarded whole variations and the correction of containing true intention of the present invention and scope as.Any and all scope of equal value and contents all should be thought still to belong in the intent of the present invention and the scope in claims scope.
Claims (12)
1. a structure that improves capacitance density is characterized in that, comprising:
One substrate, said substrate are provided with substrate metal copper and following insulating barrier; One lower metal layer is arranged on the said down insulating barrier, and insulating barrier is arranged on the said lower metal layer in one, in one metal level be arranged on said on the insulating barrier, on one insulating barrier be arranged on said on the metal level, metal level is arranged on said going up on the insulating barrier on one;
Substrate terminal, the first terminal, second terminal and the 3rd terminal are connected with base metal copper, said lower metal layer, said middle metal level and the said metal level of going up through interconnection line respectively successively; The substrate terminal is connected with the 3rd terminal; The first terminal is connected with second terminal, forms shunt capacitance.
2. the structure of raising capacitance density as claimed in claim 1 is characterized in that, said insulating barrier down, said lower metal layer, said middle metal level and the said metal level length that goes up reduce to form ladder-type structure successively.
3. the structure of raising capacitance density as claimed in claim 1 is characterized in that, said middle insulating barrier is identical with said middle metal level length, and said last insulating barrier is identical with said last metal level length.
4. the structure of raising capacitance density as claimed in claim 1 is characterized in that, said the 3rd terminal is connected with the said metal level of going up through two interconnection lines.
5. the structure of raising capacitance density as claimed in claim 1 is characterized in that, the material of said metal level is Ti, TiNTa compound, TaN, AlCu alloy or Cu metal, and its thickness is 500A ~ 2000A.
6. the structure of raising capacitance density as claimed in claim 1 is characterized in that, the material of said insulating barrier is SiO
2, SiN, Ta
2O
5, BaTiO
3, HfO
2, ZrO
2Or Al
2O
3, its thickness is 150A ~ 600A.
7. the structure of raising capacitance density as claimed in claim 1 is characterized in that, comprises that also one covers the etching barrier layer of above-mentioned insulating barrier and metal level.
8. a method that improves capacitance density is characterized in that, may further comprise the steps:
Utilize metal level chemical mechanical milling tech preparation one to be provided with the substrate of substrate metal copper; Surface deposition SiN film forms down insulating barrier on it; The metal deposit is said to form lower metal layer on the insulating barrier down; Deposition insulating material forms insulating barrier in said lower metal layer, repeats depositing metal material and insulating material successively, with metal level, last insulating barrier and last metal level in forming;
Adopt photoetching, etching and photoresistance to remove metal level and last insulating barrier on the technology etching successively, repeat with metal level in the sampling technology etching and middle insulating barrier, lower metal layer and following insulating barrier; After the deposit etching barrier layer covers above-mentioned insulating barrier and metal level; Continuation is with the said metal level of thin film deposition; Utilize photoetching, etching and filling and cmp all to form several through holes in every layer of metal level; And being provided with interconnection line in said through hole, substrate terminal, the first terminal, second terminal and the 3rd terminal are arranged on substrate metal copper, lower metal layer, middle metal level and the last metal level under it through said interconnection line respectively successively; Said substrate terminal is connected with said the 3rd terminal, and said the first terminal is connected with said second terminal, forms shunt capacitance.
9. the method for raising capacitance density as claimed in claim 8 is characterized in that, said lower metal layer, said middle metal level and the said metal level length that goes up reduce to form ladder-type structure successively.
10. the method for raising capacitance density as claimed in claim 8 is characterized in that, said down insulating barrier is identical with said lower metal layer length, said in insulating barrier with said in metal level length identical, said upward insulating barrier is with said upward metal level length is identical.
11. the method for raising capacitance density as claimed in claim 8 is characterized in that, the material of said metal level is Ti, TiNTa compound, TaN, AlCu alloy or Cu metal, and its thickness is 500A ~ 2000A.
12. the method for raising capacitance density as claimed in claim 8 is characterized in that, the material of said insulating barrier is SiO
2, SiN, Ta
2O
5, BaTiO
3, HfO
2, ZrO
2Or Al
2O
3, its thickness is 150A ~ 600A.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011101638459A CN102420209A (en) | 2011-06-17 | 2011-06-17 | Structure and method for increasing density of capacitors |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011101638459A CN102420209A (en) | 2011-06-17 | 2011-06-17 | Structure and method for increasing density of capacitors |
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| CN102420209A true CN102420209A (en) | 2012-04-18 |
Family
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| CN2011101638459A Pending CN102420209A (en) | 2011-06-17 | 2011-06-17 | Structure and method for increasing density of capacitors |
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| CN103456601A (en) * | 2012-05-31 | 2013-12-18 | 台湾积体电路制造股份有限公司 | Capacitor for interposers and methods of manufacture thereof |
| CN105304615A (en) * | 2014-06-05 | 2016-02-03 | 联华电子股份有限公司 | Semiconductor structure |
| WO2016173184A1 (en) * | 2015-04-29 | 2016-11-03 | 京东方科技集团股份有限公司 | Film layer structure and test method, display substrate and test method and preparation method |
| CN110071096A (en) * | 2019-03-13 | 2019-07-30 | 福建省福联集成电路有限公司 | A kind of stacked capacitor and production method improving capacitance and pressure resistance |
| CN110556357A (en) * | 2018-05-30 | 2019-12-10 | 世界先进积体电路股份有限公司 | Capacitor structure and manufacturing method thereof |
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Inventor after: Hu Youcun Inventor after: Zhang Liang Inventor after: Ji Feng Inventor after: Li Lei Inventor after: Chen Yuwen Inventor before: Xu Qiang Inventor before: Zhang Wenguang Inventor before: Zheng Chunsheng |
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Application publication date: 20120418 |