CN102420168A - Method of carrying out wet process cleaning on plasma etching residues - Google Patents
Method of carrying out wet process cleaning on plasma etching residues Download PDFInfo
- Publication number
- CN102420168A CN102420168A CN2011101103815A CN201110110381A CN102420168A CN 102420168 A CN102420168 A CN 102420168A CN 2011101103815 A CN2011101103815 A CN 2011101103815A CN 201110110381 A CN201110110381 A CN 201110110381A CN 102420168 A CN102420168 A CN 102420168A
- Authority
- CN
- China
- Prior art keywords
- wet
- cleaned
- etching
- plasma etching
- dry
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Cleaning Or Drying Semiconductors (AREA)
Abstract
The invention discloses a method of carrying out wet process cleaning plasma etching residues. The method comprises the following steps: after finishing dielectric substance layer plasma dry etching in a semiconductor integrated circuit rear-section copper manufacture procedure, carrying out primary wet process cleaning so as to remove polymer residues after dry etching; and carrying out secondary wet process cleaning so as to remove a side wall affected layer. The method of carrying out wet process cleaning on the plasma etching residues provided by the invention can be used for solving the problem that the cleaning effect of a single cleaning fluid is not ideal in the prior art; and a good cleaning effect is realized through respectively carrying out the primary wet process cleaning and the secondary wet process cleaning to remove the residues and the side wall affected layer.
Description
Technical field
The invention discloses a kind of wet clean process, relate in particular to a kind of method of removing a kind of wet-cleaned plasma etching residue of dielectric medium plasma etching residue and sidewall affected layer in the semiconductor rear section processing procedure that is applicable to.
Background technology
In the copper wiring of semiconductor integrated circuit back segment, along with reducing and the introducing of advanced low-k materials (Low-k) of characteristic size, for wet-cleaned behind the plasma etching require increasingly high.Characteristic size reduces, and polymer residues is more difficult after plasma etching or the photoresistance ashing removes.Introduce advanced low-k materials (Low-k) (particularly porous low dielectric constant material), plasma etching, photoresistance ashing etc. is easy to damage advanced low-k materials (Low-k) and causes dielectric constant to raise.And, tend to use the heavier etching mode of polymer to protect advanced low-k materials (Low-k) sidewall in order to reduce the damage of etching to advanced low-k materials (Low-k).In order to reduce effective dielectric constant, require to remove advanced low-k materials (Low-k) sidewall affected layer simultaneously.Wet-cleaned not only can effectively be removed polymer residues after this just required plasma etching, also will remove the sidewall affected layer.
In the back segment copper wiring in the industry cycle, select for use in copper corrosion liquid (ST250) and the dilute hydrogen fluoride acid (DHF, Dilute HF) a kind of cleaning fluid to carry out wet-cleaned after the etching usually.Fig. 1 is the design sketch that the available technology adopting dilute hydrogen fluoride acid carries out wet etching; See also Fig. 1, it is more effective that copper corrosion liquid (ST250) is removed polymer residues, but can't effectively remove the sidewall affected layer; Moreover copper corrosion liquid (ST250) is a kind of organic solution that contains; After fine and close sidewall affected layer was removed, organic solvent can infiltrate during advanced low-k materials (Low-k) hole can't discharge, and causes the bigger rising of dielectric constant.
Fig. 2 is the design sketch that available technology adopting copper corrosion liquid carries out wet etching, sees also Fig. 2, and the process window of DHF removal polymer residues is smaller, and especially along with characteristic size reduces, the position of residual object height is difficult to remove fully, causes integrity problem.
Before and after the wet-cleaned, but also using plasma (H2, H2/N2, H2/He etc.) is handled the removal polymer residues, increases process window.But Cement Composite Treated by Plasma is bigger to advanced low-k materials (Low-k) damage, particularly porous low dielectric constant material (Low-k).
Summary of the invention
The invention discloses a kind of method of wet-cleaned plasma etching residue, in order to solve the single unfavorable problem of cleaning fluid cleaning performance of available technology adopting.
Above-mentioned purpose of the present invention realizes through following technical scheme:
A kind of method of wet-cleaned plasma etching residue wherein, in the copper wiring of semiconductor integrated circuit back segment, behind the completion dielectric substance layer dry plasma etch, is carried out first wet-cleaned, with the polymer residue behind the removal dry etching; And carry out second wet-cleaned, to remove the sidewall affected layer.
The method of aforesaid wet-cleaned plasma etching residue, wherein, the cleaning fluid that said first wet-cleaned is adopted is a copper corrosion liquid.
The method of aforesaid wet-cleaned plasma etching residue, wherein, the cleaning fluid that said second wet-cleaned is adopted is a dilute hydrogen fluoride acid.
The method of aforesaid wet-cleaned plasma etching residue, wherein, the concentration range of said dilute hydrogen fluoride acid is 1:100 ~ 1:1000.
The method of aforesaid wet-cleaned plasma etching residue, wherein, said dielectric substance layer dry plasma etch comprises: at the spin coating photoresist; And carry out after the photoetching process formation via hole image; Carry out first dry etching,, and remove photoresist with the formation through hole.
The method of aforesaid wet-cleaned plasma etching residue wherein, behind said first dry etching, is carried out first wet-cleaned; And carry out second wet-cleaned.
The residual method of aforesaid wet-cleaned plasma etching, wherein, said dielectric substance layer dry plasma etch comprises: at the spin coating bottom antireflective coating, filling vias, and spin coating photoresistance, photoetching forms second dry etching after the groove figure.
The residual method of aforesaid wet-cleaned plasma etching, wherein, said second dry etching comprises: dry etching forms groove, removes residue photoresist and bottom antireflective coating, and etching is opened through hole.
The residual method of aforesaid wet-cleaned plasma etching wherein, after said second dry etching, is carried out first wet-cleaned; Carry out second wet-cleaned.
The residual method of aforesaid wet-cleaned plasma etching wherein, is carried out conventional successive process after accomplishing first wet-cleaned and second wet-cleaned, all the other technologies and step in the copper wiring of semiconductor integrated circuit last part is not impacted.
In sum; Owing to adopted technique scheme; The residual method of a kind of wet-cleaned plasma etching of the present invention has solved the single unfavorable problem of cleaning fluid cleaning performance of available technology adopting; Remove residue and sidewall affected layer through carrying out first wet-cleaned and second wet-cleaned respectively, realize excellent cleaning effect.
Description of drawings
Fig. 1 is the design sketch that the available technology adopting dilute hydrogen fluoride acid carries out wet etching;
Fig. 2 is the design sketch that available technology adopting copper corrosion liquid carries out wet etching;
Fig. 3 is the flow chart of semiconductor integrated circuit back segment copper wiring in the prior art;
Fig. 4 is the flow chart of the residual method of wet-cleaned plasma etching of the present invention;
Fig. 5 is the block diagram of the residual method of wet-cleaned plasma etching of the present invention.
Embodiment
Be further described below in conjunction with the accompanying drawing specific embodiments of the invention:
Fig. 4 is the flow chart of the residual method of wet-cleaned plasma etching of the present invention; Fig. 5 is the block diagram of the residual method of wet-cleaned plasma etching of the present invention, sees also Fig. 4, Fig. 5, a kind of method of wet-cleaned plasma etching residue; Wherein, In the copper wiring of semiconductor integrated circuit back segment, behind the completion dielectric substance layer dry plasma etch, carry out first wet-cleaned; The cleaning fluid that first wet-cleaned is adopted is more intense to the removal ability of polymer; Can remove cleaning fluid that some second wet-cleaned are adopted the polymer residue that forms in the etching process that can't remove, through carrying out first wet-cleaned, reach the purpose of removing the polymer residue behind the dry etching; Carry out second wet-cleaned; The cleaning fluid power that second wet-cleaned is adopted is effectively removed etching rear wall affected layer, also can remove polymer residues after most of etchings, through second wet-cleaned; Remove the sidewall affected layer; Can realize the cleaning of polymer residue and sidewall affected layer after first wet-cleaned and second wet-cleaned organically combine, after twice wet-cleaned, the sidewall damage after polymer residue and the etching all is removed efficiently.
The cleaning fluid that said first wet-cleaned among the present invention is adopted is copper corrosion liquid (ST250); Copper corrosion liquid (ST250) is to the removal ability force rate dilute hydrogen fluoride acid (DHF of polymer; Dilute HF) strong; Can remove the polymer residue that forms in the etching process that some dilute hydrogen fluoride acids (DHF, Dilute HF) can't remove.Yet copper corrosion liquid (ST250) is low to the sidewall affected layer etch rate that forms after the etching, is difficult to remove the high-k affected layer that sidewall forms, and this can improve the effective dielectric constant of dielectric layer.The thickness of Low-k sidewall affected layer can reach 2～3nm after the etching, even thicker.Along with dwindling gradually of characteristic size, this layer affected layer can't be ignored the current-limiting resistor delayed impact, must remove, and therefore, need carry out second wet-cleaned.
The cleaning fluid that said second wet-cleaned among the present invention is adopted is dilute hydrogen fluoride acid (DHF), and dilute hydrogen fluoride acid (DHF) can effectively be removed etching rear wall affected layer, also can remove the polymer residues after most of etchings.But be difficult to remove for some polymer residue that forms in some etching process; This can cause the deterioration of electric property and reliability; Particularly at the polymer of via bottoms, yet, adopt dilute hydrogen fluoride acid (DHF) to carry out the polymer residue that wet-cleaned originally can't remove and in the first wet-cleaned process, be removed; So after accomplishing second wet-cleaned, can reach good removing effect.
The concentration range of the said dilute hydrogen fluoride acid among the present invention is 1:100 ~ 1:1000; Dilute hydrogen fluoride acid cleaning fluid in this scope has good cleaning effect; Can not cause damage by the offside parietal layer again, the concentration of diluted hydrofluoric acid (DHF) requires to take different values according to different processes.
Fig. 3 is the flow chart of semiconductor integrated circuit back segment copper wiring in the prior art; See also Fig. 3; Semiconductor integrated circuit back segment copper cash processing procedure among the present invention specifically may further comprise the steps: step 1 101, dielectric layer deposit wherein, dielectric barrier layer: SiCN; Dielectric layer: SiOCH, dielectric protection layer: SiO2; Step 2 102, the spin coating photoresist, photoetching forms via hole image; Step 3 103, dry etching forms through hole, and photoresist is removed in ashing; Step 4 104, spin coating bottom antireflective coating (BARC), filling vias; The spin coating photoresistance, photoetching forms groove figure; Step 5 105, the dry etching groove forms groove; Residue photoresist and BARC are removed in ashing, and etching is opened through hole; Step 6 106, depositing metal barrier layer (TaN/Ta) and copper seed layer 106; Through hole and groove are filled up in electro-coppering; Step 7 107, excess metal 107 is removed in cmp (CMP) planarization.
We can draw from above-mentioned step: the step of carrying out said dielectric substance layer dry plasma etch among the present invention has twice; Wherein, Dry etching comprises for the first time: at step 2 102 spin coating photoresists, photoetching forms step 3 103, the first dry etchings that carry out after the via hole image; With the formation through hole, and photoresist is removed in ashing.
Behind said first dry etching, carry out first wet-cleaned in one embodiment of the invention; Carry out second wet-cleaned afterwards again, to reach the effect of removing residue and sidewall affected layer respectively.
The dry etching second time of the dry plasma etch of dielectric substance layer described in the present invention comprises: in step 4 104, and spin coating bottom antireflective coating (BARC), filling vias, and spin coating photoresistance, photoetching forms second dry etching after the groove figure.
Second dry etching comprises described in the present invention: dry etching forms groove, and residue photoresist and bottom antireflective coating are removed in ashing, and etching is opened through hole.
After said second dry etching, carry out first wet-cleaned in another embodiment of the present invention; Carry out second wet-cleaned afterwards again, to reach the effect of removing residue and sidewall affected layer respectively.
Owing to there is the step of two dry etchings in the semiconductor process flow that the present invention was applied in; And all satisfy the condition of the wet-etching technology of embodiment of the present invention after the step of these two dry etchings; So behind step 3 103 first dry etchings or step 5 105 second dry etchings, adopt wet-etching technology of the present invention all can, can both reach the technique effect of removing residue and sidewall affected layer respectively
In a preferred embodiment of the present invention; Second wet-cleaned is carried out after first wet-cleaned is accomplished; After at first accomplishing first wet-cleaned polymer residue behind the dry etching is removed, the sidewall affected layer becomes smooth, carries out second wet etching afterwards; The sidewall affected layer is removed, thereby reached excellent cleaning effect.
Carry out conventional successive process after accomplishing first wet-cleaned and second wet-cleaned among the present invention, all the other technologies and step in the copper wiring of semiconductor integrated circuit last part are not impacted.
In sum; Owing to adopted technique scheme; The residual method of a kind of wet-cleaned plasma etching of the present invention has solved the single unfavorable problem of cleaning fluid cleaning performance of available technology adopting; Remove residue and sidewall affected layer through carrying out first wet-cleaned and second wet-cleaned respectively, realize excellent cleaning effect, adopt method provided by the present invention can improve the electric property and the reliability of copper-connection.
More than specific embodiment of the present invention is described in detail, but it is just as example, the present invention is not restricted to the specific embodiment of above description.To those skilled in the art, any equivalent modifications that the present invention is carried out with substitute also all among category of the present invention.Therefore, not breaking away from impartial conversion and the modification of being done under the spirit and scope of the present invention, all should contain within the scope of the invention.
Claims (9)
1. the method for a wet-cleaned plasma etching residue is characterized in that, in the copper wiring of semiconductor integrated circuit back segment, behind the completion dielectric substance layer dry plasma etch, carries out first wet-cleaned, with the polymer residue behind the removal dry etching; Carry out second wet-cleaned, to remove the sidewall affected layer.
2. the method for wet-cleaned plasma etching residue according to claim 1 is characterized in that, the cleaning fluid that said first wet-cleaned is adopted is a copper corrosion liquid.
3. the method for wet-cleaned plasma etching residue according to claim 1 is characterized in that, the cleaning fluid that said second wet-cleaned is adopted is a dilute hydrogen fluoride acid.
4. the method for wet-cleaned plasma etching residue according to claim 3 is characterized in that the concentration range of said dilute hydrogen fluoride acid is 1:100 ~ 1:1000.
5. the method for wet-cleaned plasma etching residue according to claim 1; It is characterized in that; Said dielectric substance layer dry plasma etch comprises: at the spin coating photoresist, and carry out carrying out first dry etching after the photoetching process formation via hole image; With the formation through hole, and remove photoresist.
6. the method for wet-cleaned plasma etching residue according to claim 5 is characterized in that, behind said first dry etching, carries out first wet-cleaned; And carry out second wet-cleaned.
7. the residual method of wet-cleaned plasma etching according to claim 1; It is characterized in that said dielectric substance layer dry plasma etch comprises: at spin coating bottom antireflective coating, filling vias; And the spin coating photoresistance, photoetching forms second dry etching after the groove figure.
8. the residual method of wet-cleaned plasma etching according to claim 7 is characterized in that, said second dry etching comprises: dry etching forms groove, removes residue photoresist and bottom antireflective coating, and etching is opened through hole.
9. the residual method of wet-cleaned plasma etching according to claim 8 is characterized in that, after said second dry etching, carries out first wet-cleaned; And carry out second wet-cleaned.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011101103815A CN102420168A (en) | 2011-04-29 | 2011-04-29 | Method of carrying out wet process cleaning on plasma etching residues |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011101103815A CN102420168A (en) | 2011-04-29 | 2011-04-29 | Method of carrying out wet process cleaning on plasma etching residues |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102420168A true CN102420168A (en) | 2012-04-18 |
Family
ID=45944506
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011101103815A Pending CN102420168A (en) | 2011-04-29 | 2011-04-29 | Method of carrying out wet process cleaning on plasma etching residues |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102420168A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103021817A (en) * | 2012-12-27 | 2013-04-03 | 上海集成电路研发中心有限公司 | Method of cleaning after wet etching |
| CN103730409A (en) * | 2012-10-16 | 2014-04-16 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method, cleaning method and cleaning system of semiconductor device |
| CN104051238A (en) * | 2014-05-20 | 2014-09-17 | 上海华力微电子有限公司 | Method for eliminating polymer residues in dual-damascene technology |
| CN105084299A (en) * | 2014-05-12 | 2015-11-25 | 中芯国际集成电路制造(上海)有限公司 | Forming method of semiconductor structure |
| CN110854019A (en) * | 2019-11-26 | 2020-02-28 | 上海华力集成电路制造有限公司 | Semiconductor manufacturing method |
| CN111312584A (en) * | 2020-04-07 | 2020-06-19 | 沈阳拓荆科技有限公司 | Wafer surface cleaning method |
| CN114078694A (en) * | 2020-08-19 | 2022-02-22 | 和舰芯片制造(苏州)股份有限公司 | Method for forming semiconductor etching structure and method for removing residual polymer |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020119672A1 (en) * | 2001-02-28 | 2002-08-29 | Chih-Ning Wu | Post-etching cleaning process in dual damascene structure manufacturing |
| US20060063308A1 (en) * | 2004-09-17 | 2006-03-23 | Dongbuanam Semiconductor Inc. | Method for cleaning semiconductor device having dual damascene structure |
| CN102148187A (en) * | 2010-02-09 | 2011-08-10 | 中芯国际集成电路制造(上海)有限公司 | Method for removing etching residues of Kelvin through hole |
-
2011
- 2011-04-29 CN CN2011101103815A patent/CN102420168A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020119672A1 (en) * | 2001-02-28 | 2002-08-29 | Chih-Ning Wu | Post-etching cleaning process in dual damascene structure manufacturing |
| US20060063308A1 (en) * | 2004-09-17 | 2006-03-23 | Dongbuanam Semiconductor Inc. | Method for cleaning semiconductor device having dual damascene structure |
| CN102148187A (en) * | 2010-02-09 | 2011-08-10 | 中芯国际集成电路制造(上海)有限公司 | Method for removing etching residues of Kelvin through hole |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103730409A (en) * | 2012-10-16 | 2014-04-16 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method, cleaning method and cleaning system of semiconductor device |
| CN103021817A (en) * | 2012-12-27 | 2013-04-03 | 上海集成电路研发中心有限公司 | Method of cleaning after wet etching |
| CN105084299A (en) * | 2014-05-12 | 2015-11-25 | 中芯国际集成电路制造(上海)有限公司 | Forming method of semiconductor structure |
| CN105084299B (en) * | 2014-05-12 | 2017-02-01 | 中芯国际集成电路制造(上海)有限公司 | Forming method of semiconductor structure |
| CN104051238A (en) * | 2014-05-20 | 2014-09-17 | 上海华力微电子有限公司 | Method for eliminating polymer residues in dual-damascene technology |
| CN110854019A (en) * | 2019-11-26 | 2020-02-28 | 上海华力集成电路制造有限公司 | Semiconductor manufacturing method |
| CN111312584A (en) * | 2020-04-07 | 2020-06-19 | 沈阳拓荆科技有限公司 | Wafer surface cleaning method |
| CN114078694A (en) * | 2020-08-19 | 2022-02-22 | 和舰芯片制造(苏州)股份有限公司 | Method for forming semiconductor etching structure and method for removing residual polymer |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102420168A (en) | Method of carrying out wet process cleaning on plasma etching residues | |
| US9006106B2 (en) | Method of removing a metal hardmask | |
| KR101082993B1 (en) | Separation-material composition for photo-resist and manufacturing methods of semiconductor device | |
| US20150280113A1 (en) | Method to etch non-volatile metal materials | |
| TWI651805B (en) | Method for forming self-aligned contacts/ vias with high corner selectivity | |
| JP2004140196A (en) | Manufacturing method of semiconductor device and substrate washing equipment | |
| US20050245082A1 (en) | Process for removing organic materials during formation of a metal interconnect | |
| JP2006261687A (en) | Method for manufacturing semiconductor device | |
| CN101393842A (en) | Slot forming method | |
| KR20190035900A (en) | Pre-cleaning method for manufacturing superconductor interconnect | |
| WO2008147756A2 (en) | In-situ photoresist strip during plasma etching of active hard mask | |
| CN101452879A (en) | Cleaning method after opening etching | |
| CN103377913A (en) | Method of forming opening | |
| CN101762993A (en) | Method for removing photoresist and method for manufacturing connecting hole | |
| US8455362B2 (en) | Chemical mechanical polishing method | |
| KR20140114385A (en) | Method of making device | |
| TW507286B (en) | Method and apparatus for fabricating semiconductor devices | |
| CN104979273B (en) | The method for forming interconnection structure | |
| US9064819B2 (en) | Post-etch treating method | |
| CN102903667A (en) | Method for forming semiconductor device | |
| US20140216504A1 (en) | Silicon wafer cleaning method | |
| CN106033719A (en) | Formation method of semiconductor structure | |
| CN101989545A (en) | Method for removing residue on silicon oxynitride (SiON) film | |
| CN105336664A (en) | Etching method | |
| CN103839885A (en) | Method for removing defects |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20120418 |
|
| WD01 | Invention patent application deemed withdrawn after publication |