CN102413001B - Intelligent BYPASS system - Google Patents

Intelligent BYPASS system Download PDF

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Publication number
CN102413001B
CN102413001B CN201110453731.8A CN201110453731A CN102413001B CN 102413001 B CN102413001 B CN 102413001B CN 201110453731 A CN201110453731 A CN 201110453731A CN 102413001 B CN102413001 B CN 102413001B
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pin
relay
resistance
semiconductor
oxide
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CN102413001A (en
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刘辉
王青国
秦伟
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SHENZHEN NORCO INTELLIGENT TECHNOLOGY CO LTD
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SHENZHEN NORCO INTELLIGENT TECHNOLOGY CO LTD
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Abstract

The invention discloses an intelligent BYPASS system which mainly comprises a network interface circuit (1); and the intelligent BYPASS system is characterized by also comprising a relay switching circuit (2), a GPIO (general purpose input/output) logic control circuit (3) and a power supply circuit (4), wherein the relay switching circuit (2) is used for controlling the network switch state of the network interface circuit (1); the GPIO logic control circuit (3) is used for providing control signals for the relay switching circuit (2) so as to control the connection and disconnection of a relay in the relay switching circuit (2); and the power supply circuit (4) is used for providing a working power supply for the relay switching circuit (2) and the GPIO logic control circuit (3). By using the intelligent BYPASS system disclosed by the invention, an effect that the BYPASS system can be shut off or started under the condition that a device is not electrified can be achieved; and after the device is electrified, the BYPASS system also can be shut off or started, thereby providing a strong support for firewall servers.

Description

A kind of Intelligent BYPASS system
Technical field
The present invention relates to field of network communication, specifically refer to a kind of Intelligent BYPASS system.
Background technology
In scientific and technological high speed development today, the operation of network and enterprise is closely related, and in order to ensure the safety of enterprise in network, SOCKS server gets a lot of applications; If SOCKS server breaks down, as deadlock, power-off suddenly etc., will interrupt the network path of enterprise, affect enterprise and normally run, cause very large loss.
In order to overcome the above problems, a lot of SOCKS server supplier has expected use BYPASS(bypass) method guarantee the unimpeded continuously of enterprise network.At present, existing BYPASS is that the mode triggering by power supply realizes, yet adopts in this way, generally that BYPASS function is opened in the situation that equipment is not switched on, once after equipment energising, BYPASS is adjusted into closed condition immediately, and BYPASS just can not realize Based Intelligent Control.
Summary of the invention
The object of the invention is to overcome current BYPASS system at equipment not energising in the situation that, BYPASS function can be opened, once and after energising, will be adjusted into immediately closed condition, can not realize the defect of Based Intelligent Control, a kind of Intelligent BYPASS system is provided.
The present invention is achieved through the following technical solutions: a kind of Intelligent BYPASS system, mainly by network interface circuit, formed, also comprise for controlling the relay switching circuit of network interface circuit network switching state simultaneously, for relay switching circuit provides the GPIO logic control circuit of control signal with the repeat circuit conducting of control relay switching circuit and cut-off, for providing the power-supplying circuit of working power, relay switching circuit and GPIO logic control circuit form.
Described network interface circuit consists of LANA port and LANB port, described LANA port is comprised of RJ45 connector, resistance R 50, resistance R 51 and capacitor C 56, resistance R 51 is connected with TX-port with the TX+ of RJ45 connector respectively with after resistance R 50 serial connections, one end of capacitor C 56 is connected with the tie point of resistance R 51 with resistance R 50, and its other end is ground connection.
Described relay switching circuit is for by resistance, metal-oxide-semiconductor, relay and the switching circuit that forms with door.
Described GPIO logic control circuit is comprised of resistance R 6, metal-oxide-semiconductor Q4 and diode D1; Resistance R 6 is in parallel with diode D1, and its P utmost point is connected with metal-oxide-semiconductor Q4.
Described power-supplying circuit comprises power supply chip Q7, and resistance R 1 is connected with power supply chip Q7 with its tie point after resistance R 2 serial connections, the other end ground connection of resistance R 2; The other end of resistance R 1 is connected with power supply chip Q7; One end of capacitor C 1 is connected with power supply chip Q7, and its other end is ground connection.
Described logic control switch electricity routing resistance, metal-oxide-semiconductor, relay and form with door, wherein VBYPASS power supply through resistance R 12 after resistance R 13 respectively with door U1, be connected with a U2; GPIOC, GPIOB be connected respectively to door U1 and with 1 pin of door U2; With door U1, with door U2 3 pin ground connection, with door U1, with door U2 5 pin connect VBYPASS power supply; Extremely be connected with the G of metal-oxide-semiconductor Q6 with the output pin 4 of door U1, be connected to the G utmost point of metal-oxide-semiconductor Q5 with output pin 4 pin of door U2, the S utmost point ground connection of metal-oxide-semiconductor Q5 and metal-oxide-semiconductor Q6, the D utmost point of metal-oxide-semiconductor Q5 and metal-oxide-semiconductor Q6 is received VBYPASS power supply by resistance R 9, resistance R 10;
The D utmost point of metal-oxide-semiconductor Q5 and metal-oxide-semiconductor Q6 is connected respectively to 1 pin and 8 pin of relay K 11 simultaneously, GPIOD is connected to the G utmost point of metal-oxide-semiconductor Q1, VBYPASS power supply is connected to the D utmost point of metal-oxide-semiconductor Q1 by R11, the D utmost point of metal-oxide-semiconductor Q1 is directly connected to 8 pin of relay K 1, 1 pin of relay K 1 is directly connected to VBYPASS power supply, 2 pin of relay K 11 and 3 pin of relay K 1, 2 pin of relay K 4 connect, 3 pin of relay K 11 and 4 pin of relay K 1, 2 pin of relay K 2 connect, 7 pin of relay K 11 and 6 pin of relay K 1, 7 pin of relay K 4 connect, 6 pin of relay K 11 and 5 pin of relay K 1, 7 pin of relay K 2 connect, 3 of relay K 2, 6 pin respectively with 1 of LANA1, 2 pin connect, 3 of relay K 4, 6 pin respectively with 1 of LANB1, 2 pin connect.
The present invention compared with prior art, has the following advantages and beneficial effect:
(1) the present invention is not only simple in structure, and realize with low cost, flexible operation.
(2) the present invention can realize in the situation that equipment is not switched on, and this BYPASS system can be closed or open, and after equipment energising, the function that this BYPASS system also can be closed or open, for SOCKS server provides strong support.
Accompanying drawing explanation
Fig. 1 is overall structure schematic block diagram of the present invention.
Fig. 2 is network interface circuit structure chart of the present invention.
Fig. 3 is the structure chart of logic control switch circuit.
Fig. 4 is GPIO logic control circuit structure chart.
Fig. 5 is power-supplying circuit structure chart.
Wherein, the Reference numeral title in accompanying drawing is respectively:
1-network interface circuit, 2-relay switching circuit, 3-GPIO logic control circuit, 4-power-supplying circuit.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited to this.
Embodiment
As shown in Fig. 1~5, the present invention includes network interface circuit 1, relay switching circuit 2, GPIO logic control circuit 3 and power-supplying circuit 4.Wherein, network interface circuit 1 consists of LANA and two network ports of LANB, and described LANA port is by RJ45 connector, and resistance R 51, R50 and capacitor C 56 form, during connection, resistance R 51 is connected with TX-interface with the TX+ of RJ45 connector respectively with after resistance R 50 serial connections; Between one end of capacitor C 56 and resistance R 51 and resistance R 50, the other end is ground connection.
Described network interface circuit consists of LANA port and LANB port, described LANA port is comprised of RJ45 connector, resistance R 50, resistance R 51 and capacitor C 56, resistance R 51 is connected with TX-port with the TX+ of RJ45 connector respectively with after resistance R 50 serial connections, one end of capacitor C 56 is connected with the tie point of resistance R 51 with resistance R 50, and its other end is ground connection.
2, described logic control switch circuit is by resistance, metal-oxide-semiconductor, relay, form with door, VBYPASS power supply after resistance R 12, resistance R 13 respectively with door U1, be connected with 2 pin of a U2, GPIOC, GPIOB be connected respectively to door U1, with door U2 1 pin, with door U1, with door U2 3 pin ground connection, with door U1, with door U2 5 pin connect VBYPASS power supply, be extremely connected with the G of metal-oxide-semiconductor Q6 with the output pin 4 of door U1, be connected to the G utmost point of metal-oxide-semiconductor Q5 with output pin 4 pin of door U2, 2 pin source electrodes (the S utmost point) ground connection of metal-oxide-semiconductor Q5, metal-oxide-semiconductor Q6, the 3 pin drain electrodes (the D utmost point) of metal-oxide-semiconductor Q5, metal-oxide-semiconductor Q6 are received VBYPASS power supply by resistance R 9, resistance R 10, while metal-oxide-semiconductor Q5, the 3 pin drain electrodes (the D utmost point) of metal-oxide-semiconductor Q6 are connected respectively to 1 pin and 8 pin of relay K 11, GPIOD is connected to the 1 pin grid (the G utmost point) of metal-oxide-semiconductor Q1, VBYPASS power supply is connected to the drain electrode (the D utmost point) of metal-oxide-semiconductor Q1 by resistance R 11, the 3 pin drain electrodes (the D utmost point) of metal-oxide-semiconductor Q1 are directly connected to 8 pin of relay K 1, 1 pin of relay K 1 is directly connected to VBYPASS power supply, 2 pin of relay K 11 and 3 pin of relay K 1, 2 pin of relay K 4 connect, 3 pin of relay K 11 and 4 pin of relay K 1, 2 pin of relay K 2 connect, 7 pin of relay K 11 and 6 pin of relay K 1, 7 pin of relay K 4 connect, 6 pin of relay K 11 and 5 pin of relay K 1, 7 pin of relay K 2 connect, 3 of relay K 2, 6 pin respectively with 1 of LANA1, 2 pin connect, 3 of relay K 4, 6 pin respectively with 1 of LANB1, 2 pin connect.
Described GPIO logic control circuit 3 is comprised of resistance R 6, metal-oxide-semiconductor Q4 and diode D1; Resistance R 6 is in parallel with diode D1, and its P utmost point is connected with metal-oxide-semiconductor Q4.
Described power-supplying circuit comprises power supply chip Q7, and resistance R 1 is connected with power supply chip Q7 with its tie point after resistance R 2 serial connections, the other end ground connection of resistance R 2; The other end of resistance R 1 is connected with power supply chip Q7; One end of capacitor C 1 is connected with power supply chip Q7, and its other end is ground connection.
During operation, first by power supply chip Q7, provide VBYPASS Power supply, and then the state of GPIOA, GPIOB, GPIOC, GPIOD is set, and by GPIOA, GPIOB, GPIOC, GPIOD, control the conducting cut-off state of metal-oxide-semiconductor Q1, metal-oxide-semiconductor Q4, metal-oxide-semiconductor Q5 and metal-oxide-semiconductor Q6; Finally, by the conducting cut-off state of metal-oxide-semiconductor Q1, metal-oxide-semiconductor Q4, metal-oxide-semiconductor Q5 and metal-oxide-semiconductor Q6, carry out the switch closed condition of control relay K1, K2, K4, K11, and then by the switch closed condition of relay K 1, relay K 2, relay K 4 and relay K 11, control the BYPASS state of LANA1 and LANB1.
For example:
Under operating system, close BYPASS function: working procedure makes GPIOA=1, GPIOD=0.
The first step: power supply chip Q7 provides VBYPASS power supply;
Second step: GPIOA=1 → metal-oxide-semiconductor Q4 is in conducting state → RELAY_A=1, Cathode=0 →, 3 pin of relay K 2, K4 and 4 pin, 5 pin and 6 pin conductings;
The 3rd step: 1 pin of GPIOD=0 → metal-oxide-semiconductor Q1 in cut-off state → relay K 1 is 1,8 pin of relay K 1 are 2 pin and 3 pin, 6 pin and the 7 pin conductings of 1 → relay K 1;
The 4th step: the operation by 1,2 disconnects 1,2 pin of LANA1 and 1,2 pin of LANB1; Close BYPASS function.
As mentioned above, just can realize preferably the present invention.

Claims (4)

1. an Intelligent BYPASS system, it is characterized in that: mainly by network interface circuit (1), for controlling network interface circuit (1), carry out network switching state relay switching circuit (2), for relay switching circuit (2), provide the GPIO logic control circuit (3) of control signal with control relay switching circuit (2) repeat circuit conducting and cut-off, and provide power-supplying circuit (4) composition of working power for relay switching circuit (2) and GPIO logic control circuit (3); Described relay switching circuit (2) is for by resistance, metal-oxide-semiconductor, relay and the logic control switch circuit that forms with door; Described GPIO logic control circuit (3) is comprised of resistance R 6, metal-oxide-semiconductor Q4 and diode D1; Resistance R 6 is in parallel with diode D1, and the P utmost point of diode D1 is connected with metal-oxide-semiconductor Q4.
2. a kind of Intelligent BYPASS system according to claim 1, it is characterized in that: described network interface circuit (1) consists of LANA port and LANB port, described LANA port is comprised of RJ45 connector, resistance R 50, resistance R 51 and capacitor C 56, resistance R 51 is connected with TX-port with the TX+ of RJ45 connector respectively with after resistance R 50 serial connections, one end of capacitor C 56 is connected with the tie point of resistance R 51 with resistance R 50, and its other end is ground connection.
3. a kind of Intelligent BYPASS system according to claim 1, is characterized in that: described power-supplying circuit (4) comprises power supply chip Q7, and resistance R 1 is connected with power supply chip Q7 with its tie point after resistance R 2 serial connections, the other end ground connection of resistance R 2; The other end of resistance R 1 is connected with power supply chip Q7; One end of capacitor C 1 is connected with power supply chip Q7, and its other end is ground connection.
4. a kind of Intelligent BYPASS system according to claim 1, it is characterized in that: described logic control switch electricity routing resistance, metal-oxide-semiconductor, relay and form with door, wherein VBYPASS power supply through resistance R 12 after resistance R 13 respectively with door U1, be connected with a U2, GPIOC, GPIOB be connected respectively to door U1 and with 1 pin of door U2, with door U1, with door U2 3 pin ground connection, with door U1, with door U2 5 pin connect VBYPASS power supply, extremely be connected with the G of metal-oxide-semiconductor Q6 with the output pin 4 of door U1, be connected to the G utmost point of metal-oxide-semiconductor Q5 with output pin 4 pin of door U2, the S utmost point ground connection of metal-oxide-semiconductor Q5 and metal-oxide-semiconductor Q6, the D utmost point of metal-oxide-semiconductor Q5 and metal-oxide-semiconductor Q6 is received VBYPASS power supply by resistance R 9, resistance R 10 respectively, the D utmost point of metal-oxide-semiconductor Q5 and metal-oxide-semiconductor Q6 is connected respectively to 1 pin and 8 pin of relay K 11 simultaneously, GPIOD is connected to the G utmost point of metal-oxide-semiconductor Q1, VBYPASS power supply is connected to the D utmost point of metal-oxide-semiconductor Q1 by R11, the D utmost point of metal-oxide-semiconductor Q1 is directly connected to 8 pin of relay K 1, 1 pin of relay K 1 is directly connected to VBYPASS power supply, 2 pin of relay K 11 and 3 pin of relay K 1, 2 pin of relay K 4 connect, 3 pin of relay K 11 and 4 pin of relay K 1, 2 pin of relay K 2 connect, 7 pin of relay K 11 and 6 pin of relay K 1, 7 pin of relay K 4 connect, 6 pin of relay K 11 and 5 pin of relay K 1, 7 pin of relay K 2 connect, 3 of relay K 2, 6 pin respectively with 1 of LANA1, 2 pin connect, 3 of relay K 4, 6 pin respectively with 1 of LANB1, 2 pin connect.
CN201110453731.8A 2011-12-29 2011-12-29 Intelligent BYPASS system Active CN102413001B (en)

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CN103902928B (en) * 2014-03-24 2017-01-11 同方计算机有限公司 Network physical isolation device
CN116501397B (en) * 2023-05-04 2024-08-23 深圳市联瑞电子有限公司 Method for implementing BYPASS control by PCIe board card

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101626311A (en) * 2008-07-10 2010-01-13 英业达股份有限公司 Bypass control module and device and method for managing network
CN202042898U (en) * 2011-05-17 2011-11-16 公安部第三研究所 Program controlled bypass protection circuit of network equipment

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040229647A1 (en) * 2003-05-14 2004-11-18 Mr. George Simmons Cellular Communication Computer Intranet Internet Interface Design
TW201004215A (en) * 2008-07-04 2010-01-16 Inventec Corp The bypass control module and network system apparatus thereof and control method of the network system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101626311A (en) * 2008-07-10 2010-01-13 英业达股份有限公司 Bypass control module and device and method for managing network
CN202042898U (en) * 2011-05-17 2011-11-16 公安部第三研究所 Program controlled bypass protection circuit of network equipment

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